2 * linux/drivers/serial/imx.c
4 * Driver for Motorola IMX serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Author: Sascha Hauer <sascha@saschahauer.de>
9 * Copyright (C) 2004 Pengutronix
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <linux/config.h>
28 #if defined(CONFIG_SERIAL_IMX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
32 #include <linux/module.h>
33 #include <linux/ioport.h>
34 #include <linux/init.h>
35 #include <linux/console.h>
36 #include <linux/sysrq.h>
37 #include <linux/device.h>
38 #include <linux/tty.h>
39 #include <linux/tty_flip.h>
40 #include <linux/serial_core.h>
41 #include <linux/serial.h>
45 #include <asm/hardware.h>
47 /* We've been assigned a range on the "Low-density serial ports" major */
48 #define SERIAL_IMX_MAJOR 204
49 #define MINOR_START 41
53 #define IMX_ISR_PASS_LIMIT 256
56 * This is the size of our serial port register set.
58 #define UART_PORT_SIZE 0x100
61 * This determines how often we check the modem status signals
62 * for any change. They generally aren't connected to an IRQ
63 * so we have to poll them. We also check immediately before
64 * filling the TX fifo incase CTS has been dropped.
66 #define MCTRL_TIMEOUT (250*HZ/1000)
68 #define DRIVER_NAME "IMX-uart"
71 struct uart_port port;
72 struct timer_list timer;
73 unsigned int old_status;
78 * Handle any change of modem status signal since we were last called.
80 static void imx_mctrl_check(struct imx_port *sport)
82 unsigned int status, changed;
84 status = sport->port.ops->get_mctrl(&sport->port);
85 changed = status ^ sport->old_status;
90 sport->old_status = status;
92 if (changed & TIOCM_RI)
93 sport->port.icount.rng++;
94 if (changed & TIOCM_DSR)
95 sport->port.icount.dsr++;
96 if (changed & TIOCM_CAR)
97 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
98 if (changed & TIOCM_CTS)
99 uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
101 wake_up_interruptible(&sport->port.info->delta_msr_wait);
105 * This is our per-port timeout handler, for checking the
106 * modem status signals.
108 static void imx_timeout(unsigned long data)
110 struct imx_port *sport = (struct imx_port *)data;
113 if (sport->port.info) {
114 spin_lock_irqsave(&sport->port.lock, flags);
115 imx_mctrl_check(sport);
116 spin_unlock_irqrestore(&sport->port.lock, flags);
118 mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
123 * interrupts disabled on entry
125 static void imx_stop_tx(struct uart_port *port, unsigned int tty_stop)
127 struct imx_port *sport = (struct imx_port *)port;
128 UCR1((u32)sport->port.membase) &= ~UCR1_TXMPTYEN;
132 * interrupts disabled on entry
134 static void imx_stop_rx(struct uart_port *port)
136 struct imx_port *sport = (struct imx_port *)port;
137 UCR2((u32)sport->port.membase) &= ~UCR2_RXEN;
141 * Set the modem control timer to fire immediately.
143 static void imx_enable_ms(struct uart_port *port)
145 struct imx_port *sport = (struct imx_port *)port;
147 mod_timer(&sport->timer, jiffies);
150 static inline void imx_transmit_buffer(struct imx_port *sport)
152 struct circ_buf *xmit = &sport->port.info->xmit;
155 /* send xmit->buf[xmit->tail]
156 * out the port here */
157 URTX0((u32)sport->port.membase) = xmit->buf[xmit->tail];
158 xmit->tail = (xmit->tail + 1) &
159 (UART_XMIT_SIZE - 1);
160 sport->port.icount.tx++;
161 if (uart_circ_empty(xmit))
163 } while (!(UTS((u32)sport->port.membase) & UTS_TXFULL));
165 if (uart_circ_empty(xmit))
166 imx_stop_tx(&sport->port, 0);
170 * interrupts disabled on entry
172 static void imx_start_tx(struct uart_port *port, unsigned int tty_start)
174 struct imx_port *sport = (struct imx_port *)port;
176 UCR1((u32)sport->port.membase) |= UCR1_TXMPTYEN;
178 if(UTS((u32)sport->port.membase) & UTS_TXEMPTY)
179 imx_transmit_buffer(sport);
182 static irqreturn_t imx_txint(int irq, void *dev_id, struct pt_regs *regs)
184 struct imx_port *sport = (struct imx_port *)dev_id;
185 struct circ_buf *xmit = &sport->port.info->xmit;
188 spin_lock_irqsave(&sport->port.lock,flags);
189 if (sport->port.x_char)
192 URTX0((u32)sport->port.membase) = sport->port.x_char;
196 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
197 imx_stop_tx(&sport->port, 0);
201 imx_transmit_buffer(sport);
203 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
204 uart_write_wakeup(&sport->port);
207 spin_unlock_irqrestore(&sport->port.lock,flags);
211 static irqreturn_t imx_rxint(int irq, void *dev_id, struct pt_regs *regs)
213 struct imx_port *sport = dev_id;
214 unsigned int rx,flg,ignored = 0;
215 struct tty_struct *tty = sport->port.info->tty;
218 rx = URXD0((u32)sport->port.membase);
219 spin_lock_irqsave(&sport->port.lock,flags);
223 sport->port.icount.rx++;
225 if( USR2((u32)sport->port.membase) & USR2_BRCD ) {
226 USR2((u32)sport->port.membase) |= USR2_BRCD;
227 if(uart_handle_break(&sport->port))
231 if (uart_handle_sysrq_char
232 (&sport->port, (unsigned char)rx, regs))
235 if( rx & (URXD_PRERR | URXD_OVRRUN | URXD_FRMERR) )
239 tty_insert_flip_char(tty, rx, flg);
241 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
245 rx = URXD0((u32)sport->port.membase);
246 } while(rx & URXD_CHARRDY);
249 spin_unlock_irqrestore(&sport->port.lock,flags);
250 tty_flip_buffer_push(tty);
255 sport->port.icount.parity++;
256 else if (rx & URXD_FRMERR)
257 sport->port.icount.frame++;
258 if (rx & URXD_OVRRUN)
259 sport->port.icount.overrun++;
261 if (rx & sport->port.ignore_status_mask) {
267 rx &= sport->port.read_status_mask;
271 else if (rx & URXD_FRMERR)
273 if (rx & URXD_OVRRUN)
277 sport->port.sysrq = 0;
283 * Return TIOCSER_TEMT when transmitter is not busy.
285 static unsigned int imx_tx_empty(struct uart_port *port)
287 struct imx_port *sport = (struct imx_port *)port;
289 return USR2((u32)sport->port.membase) & USR2_TXDC ? TIOCSER_TEMT : 0;
292 static unsigned int imx_get_mctrl(struct uart_port *port)
294 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
297 static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl)
302 * Interrupts always disabled.
304 static void imx_break_ctl(struct uart_port *port, int break_state)
306 struct imx_port *sport = (struct imx_port *)port;
309 spin_lock_irqsave(&sport->port.lock, flags);
311 if ( break_state != 0 )
312 UCR1((u32)sport->port.membase) |= UCR1_SNDBRK;
314 UCR1((u32)sport->port.membase) &= ~UCR1_SNDBRK;
316 spin_unlock_irqrestore(&sport->port.lock, flags);
319 #define TXTL 2 /* reset default */
320 #define RXTL 1 /* reset default */
322 static int imx_startup(struct uart_port *port)
324 struct imx_port *sport = (struct imx_port *)port;
329 /* set receiver / transmitter trigger level. We assume
330 * that RFDIV has been set by the arch setup or by the bootloader.
332 val = (UFCR((u32)sport->port.membase) & UFCR_RFDIV) | TXTL<<10 | RXTL;
333 UFCR((u32)sport->port.membase) = val;
335 /* disable the DREN bit (Data Ready interrupt enable) before
338 UCR4((u32)sport->port.membase) &= ~UCR4_DREN;
343 retval = request_irq(sport->rxirq, imx_rxint, 0,
345 if (retval) goto error_out2;
347 retval = request_irq(sport->txirq, imx_txint, 0,
349 if (retval) goto error_out1;
352 * Finally, clear and enable interrupts
355 UCR1((u32)sport->port.membase) |=
356 (UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_UARTEN);
358 UCR2((u32)sport->port.membase) |= (UCR2_RXEN | UCR2_TXEN);
360 * Enable modem status interrupts
362 spin_lock_irqsave(&sport->port.lock,flags);
363 imx_enable_ms(&sport->port);
364 spin_unlock_irqrestore(&sport->port.lock,flags);
369 free_irq(sport->rxirq, sport);
371 free_irq(sport->txirq, sport);
375 static void imx_shutdown(struct uart_port *port)
377 struct imx_port *sport = (struct imx_port *)port;
382 del_timer_sync(&sport->timer);
385 * Free the interrupts
387 free_irq(sport->txirq, sport);
388 free_irq(sport->rxirq, sport);
391 * Disable all interrupts, port and break condition.
394 UCR1((u32)sport->port.membase) &=
395 ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_UARTEN);
399 imx_set_termios(struct uart_port *port, struct termios *termios,
402 struct imx_port *sport = (struct imx_port *)port;
404 unsigned int ucr2, old_ucr1, old_txrxen, baud, quot;
405 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
408 * If we don't support modem control lines, don't allow
412 termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
413 termios->c_cflag |= CLOCAL;
417 * We only support CS7 and CS8.
419 while ((termios->c_cflag & CSIZE) != CS7 &&
420 (termios->c_cflag & CSIZE) != CS8) {
421 termios->c_cflag &= ~CSIZE;
422 termios->c_cflag |= old_csize;
426 if ((termios->c_cflag & CSIZE) == CS8)
427 ucr2 = UCR2_WS | UCR2_SRST | UCR2_IRTS;
429 ucr2 = UCR2_SRST | UCR2_IRTS;
431 if (termios->c_cflag & CSTOPB)
433 if (termios->c_cflag & PARENB) {
435 if (!(termios->c_cflag & PARODD))
440 * Ask the core to calculate the divisor for us.
442 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
443 quot = uart_get_divisor(port, baud);
445 spin_lock_irqsave(&sport->port.lock, flags);
447 sport->port.read_status_mask = 0;
448 if (termios->c_iflag & INPCK)
449 sport->port.read_status_mask |= (URXD_FRMERR | URXD_PRERR);
450 if (termios->c_iflag & (BRKINT | PARMRK))
451 sport->port.read_status_mask |= URXD_BRK;
454 * Characters to ignore
456 sport->port.ignore_status_mask = 0;
457 if (termios->c_iflag & IGNPAR)
458 sport->port.ignore_status_mask |= URXD_PRERR;
459 if (termios->c_iflag & IGNBRK) {
460 sport->port.ignore_status_mask |= URXD_BRK;
462 * If we're ignoring parity and break indicators,
463 * ignore overruns too (for real raw support).
465 if (termios->c_iflag & IGNPAR)
466 sport->port.ignore_status_mask |= URXD_OVRRUN;
469 del_timer_sync(&sport->timer);
472 * Update the per-port timeout.
474 uart_update_timeout(port, termios->c_cflag, baud);
477 * disable interrupts and drain transmitter
479 old_ucr1 = UCR1((u32)sport->port.membase);
480 UCR1((u32)sport->port.membase) &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN);
482 while ( !(USR2((u32)sport->port.membase) & USR2_TXDC))
485 /* then, disable everything */
486 old_txrxen = UCR2((u32)sport->port.membase) & ( UCR2_TXEN | UCR2_RXEN );
487 UCR2((u32)sport->port.membase) &= ~( UCR2_TXEN | UCR2_RXEN);
489 /* set the parity, stop bits and data size */
490 UCR2((u32)sport->port.membase) = ucr2;
492 /* set the baud rate. We assume uartclk = 16 MHz
495 * --------- = --------
498 UBIR((u32)sport->port.membase) = (baud / 100) - 1;
499 UBMR((u32)sport->port.membase) = 10000 - 1;
501 UCR1((u32)sport->port.membase) = old_ucr1;
502 UCR2((u32)sport->port.membase) |= old_txrxen;
504 if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
505 imx_enable_ms(&sport->port);
507 spin_unlock_irqrestore(&sport->port.lock, flags);
510 static const char *imx_type(struct uart_port *port)
512 struct imx_port *sport = (struct imx_port *)port;
514 return sport->port.type == PORT_IMX ? "IMX" : NULL;
518 * Release the memory region(s) being used by 'port'.
520 static void imx_release_port(struct uart_port *port)
522 struct imx_port *sport = (struct imx_port *)port;
524 release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
528 * Request the memory region(s) being used by 'port'.
530 static int imx_request_port(struct uart_port *port)
532 struct imx_port *sport = (struct imx_port *)port;
534 return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
535 "imx-uart") != NULL ? 0 : -EBUSY;
539 * Configure/autoconfigure the port.
541 static void imx_config_port(struct uart_port *port, int flags)
543 struct imx_port *sport = (struct imx_port *)port;
545 if (flags & UART_CONFIG_TYPE &&
546 imx_request_port(&sport->port) == 0)
547 sport->port.type = PORT_IMX;
551 * Verify the new serial_struct (for TIOCSSERIAL).
552 * The only change we allow are to the flags and type, and
553 * even then only between PORT_IMX and PORT_UNKNOWN
556 imx_verify_port(struct uart_port *port, struct serial_struct *ser)
558 struct imx_port *sport = (struct imx_port *)port;
561 if (ser->type != PORT_UNKNOWN && ser->type != PORT_IMX)
563 if (sport->port.irq != ser->irq)
565 if (ser->io_type != UPIO_MEM)
567 if (sport->port.uartclk / 16 != ser->baud_base)
569 if ((void *)sport->port.mapbase != ser->iomem_base)
571 if (sport->port.iobase != ser->port)
578 static struct uart_ops imx_pops = {
579 .tx_empty = imx_tx_empty,
580 .set_mctrl = imx_set_mctrl,
581 .get_mctrl = imx_get_mctrl,
582 .stop_tx = imx_stop_tx,
583 .start_tx = imx_start_tx,
584 .stop_rx = imx_stop_rx,
585 .enable_ms = imx_enable_ms,
586 .break_ctl = imx_break_ctl,
587 .startup = imx_startup,
588 .shutdown = imx_shutdown,
589 .set_termios = imx_set_termios,
591 .release_port = imx_release_port,
592 .request_port = imx_request_port,
593 .config_port = imx_config_port,
594 .verify_port = imx_verify_port,
597 static struct imx_port imx_ports[] = {
599 .txirq = UART1_MINT_TX,
600 .rxirq = UART1_MINT_RX,
603 .iotype = SERIAL_IO_MEM,
604 .membase = (void *)IMX_UART1_BASE,
605 .mapbase = IMX_UART1_BASE, /* FIXME */
606 .irq = UART1_MINT_RX,
609 .flags = ASYNC_BOOT_AUTOCONF,
614 .txirq = UART2_MINT_TX,
615 .rxirq = UART2_MINT_RX,
618 .iotype = SERIAL_IO_MEM,
619 .membase = (void *)IMX_UART2_BASE,
620 .mapbase = IMX_UART2_BASE, /* FIXME */
621 .irq = UART2_MINT_RX,
624 .flags = ASYNC_BOOT_AUTOCONF,
632 * Setup the IMX serial ports.
633 * Note also that we support "console=ttySMXx" where "x" is either 0 or 1.
634 * Which serial port this ends up being depends on the machine you're
635 * running this kernel on. I'm not convinced that this is a good idea,
636 * but that's the way it traditionally works.
639 static void __init imx_init_ports(void)
641 static int first = 1;
648 for (i = 0; i < ARRAY_SIZE(imx_ports); i++) {
649 init_timer(&imx_ports[i].timer);
650 imx_ports[i].timer.function = imx_timeout;
651 imx_ports[i].timer.data = (unsigned long)&imx_ports[i];
654 imx_gpio_mode(PC9_PF_UART1_CTS);
655 imx_gpio_mode(PC10_PF_UART1_RTS);
656 imx_gpio_mode(PC11_PF_UART1_TXD);
657 imx_gpio_mode(PC12_PF_UART1_RXD);
658 imx_gpio_mode(PB28_PF_UART2_CTS);
659 imx_gpio_mode(PB29_PF_UART2_RTS);
661 imx_gpio_mode(PB30_PF_UART2_TXD);
662 imx_gpio_mode(PB31_PF_UART2_RXD);
664 #if 0 /* We don't need these, on the mx1 the _modem_ side of the uart
667 imx_gpio_mode(PD7_AF_UART2_DTR);
668 imx_gpio_mode(PD8_AF_UART2_DCD);
669 imx_gpio_mode(PD9_AF_UART2_RI);
670 imx_gpio_mode(PD10_AF_UART2_DSR);
676 #ifdef CONFIG_SERIAL_IMX_CONSOLE
679 * Interrupts are disabled on entering
682 imx_console_write(struct console *co, const char *s, unsigned int count)
684 struct imx_port *sport = &imx_ports[co->index];
685 unsigned int old_ucr1, old_ucr2, i;
688 * First, save UCR1/2 and then disable interrupts
690 old_ucr1 = UCR1((u32)sport->port.membase);
691 old_ucr2 = UCR2((u32)sport->port.membase);
693 UCR1((u32)sport->port.membase) =
694 (old_ucr1 | UCR1_UARTCLKEN | UCR1_UARTEN)
695 & ~(UCR1_TXMPTYEN | UCR1_RRDYEN);
696 UCR2((u32)sport->port.membase) = old_ucr2 | UCR2_TXEN;
699 * Now, do each character
701 for (i = 0; i < count; i++) {
703 while ((UTS((u32)sport->port.membase) & UTS_TXFULL))
706 URTX0((u32)sport->port.membase) = s[i];
709 while ((UTS((u32)sport->port.membase) & UTS_TXFULL))
711 URTX0((u32)sport->port.membase) = '\r';
716 * Finally, wait for transmitter to become empty
719 while (!(USR2((u32)sport->port.membase) & USR2_TXDC));
721 UCR1((u32)sport->port.membase) = old_ucr1;
722 UCR2((u32)sport->port.membase) = old_ucr2;
726 * If the port was already initialised (eg, by a boot loader),
727 * try to determine the current setup.
730 imx_console_get_options(struct imx_port *sport, int *baud,
731 int *parity, int *bits)
733 if ( UCR1((u32)sport->port.membase) | UCR1_UARTEN ) {
734 /* ok, the port was enabled */
735 unsigned int ucr2, ubir,ubmr, uartclk;
737 ucr2 = UCR2((u32)sport->port.membase);
740 if (ucr2 & UCR2_PREN) {
741 if (ucr2 & UCR2_PROE)
752 ubir = UBIR((u32)sport->port.membase) & 0xffff;
753 ubmr = UBMR((u32)sport->port.membase) & 0xffff;
754 uartclk = sport->port.uartclk;
756 *baud = ((uartclk/16) * (ubir + 1)) / (ubmr + 1);
761 imx_console_setup(struct console *co, char *options)
763 struct imx_port *sport;
770 * Check whether an invalid uart number has been specified, and
771 * if so, search for the first available port that does have
774 if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports))
776 sport = &imx_ports[co->index];
779 uart_parse_options(options, &baud, &parity, &bits, &flow);
781 imx_console_get_options(sport, &baud, &parity, &bits);
783 return uart_set_options(&sport->port, co, baud, parity, bits, flow);
786 extern struct uart_driver imx_reg;
787 static struct console imx_console = {
789 .write = imx_console_write,
790 .device = uart_console_device,
791 .setup = imx_console_setup,
792 .flags = CON_PRINTBUFFER,
797 static int __init imx_rs_console_init(void)
800 register_console(&imx_console);
803 console_initcall(imx_rs_console_init);
805 #define IMX_CONSOLE &imx_console
807 #define IMX_CONSOLE NULL
810 static struct uart_driver imx_reg = {
811 .owner = THIS_MODULE,
812 .driver_name = DRIVER_NAME,
813 .dev_name = "ttySMX",
814 .devfs_name = "ttsmx/",
815 .major = SERIAL_IMX_MAJOR,
816 .minor = MINOR_START,
817 .nr = ARRAY_SIZE(imx_ports),
821 static int serial_imx_suspend(struct device *_dev, u32 state, u32 level)
823 struct imx_port *sport = dev_get_drvdata(_dev);
825 if (sport && level == SUSPEND_DISABLE)
826 uart_suspend_port(&imx_reg, &sport->port);
831 static int serial_imx_resume(struct device *_dev, u32 level)
833 struct imx_port *sport = dev_get_drvdata(_dev);
835 if (sport && level == RESUME_ENABLE)
836 uart_resume_port(&imx_reg, &sport->port);
841 static int serial_imx_probe(struct device *_dev)
843 struct platform_device *dev = to_platform_device(_dev);
845 imx_ports[dev->id].port.dev = _dev;
846 uart_add_one_port(&imx_reg, &imx_ports[dev->id].port);
847 dev_set_drvdata(_dev, &imx_ports[dev->id]);
851 static int serial_imx_remove(struct device *_dev)
853 struct imx_port *sport = dev_get_drvdata(_dev);
855 dev_set_drvdata(_dev, NULL);
858 uart_remove_one_port(&imx_reg, &sport->port);
863 static struct device_driver serial_imx_driver = {
865 .bus = &platform_bus_type,
866 .probe = serial_imx_probe,
867 .remove = serial_imx_remove,
869 .suspend = serial_imx_suspend,
870 .resume = serial_imx_resume,
873 static int __init imx_serial_init(void)
877 printk(KERN_INFO "Serial: IMX driver\n");
881 ret = uart_register_driver(&imx_reg);
885 ret = driver_register(&serial_imx_driver);
887 uart_unregister_driver(&imx_reg);
892 static void __exit imx_serial_exit(void)
894 uart_unregister_driver(&imx_reg);
897 module_init(imx_serial_init);
898 module_exit(imx_serial_exit);
900 MODULE_AUTHOR("Sascha Hauer");
901 MODULE_DESCRIPTION("IMX generic serial port driver");
902 MODULE_LICENSE("GPL");