2 * linux/drivers/serial/pxa.c
4 * Based on drivers/serial/8250.c by Russell King.
6 * Author: Nicolas Pitre
7 * Created: Feb 20, 2003
8 * Copyright: (C) 2003 Monta Vista Software, Inc.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * Note 1: This driver is made separate from the already too overloaded
16 * 8250.c because it needs some kirks of its own and that'll make it
17 * easier to add DMA support.
19 * Note 2: I'm too sick of device allocation policies for serial ports.
20 * If someone else wants to request an "official" allocation of major/minor
21 * for this driver please be my guest. And don't forget that new hardware
22 * to come from Intel might have more than 3 or 4 of those UARTs. Let's
23 * hope for a better port registration and dynamic device allocation scheme
24 * with the serial core maintainer satisfaction to appear soon.
27 #include <linux/config.h>
28 #include <linux/module.h>
29 #include <linux/tty.h>
30 #include <linux/ioport.h>
31 #include <linux/init.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/serial_reg.h>
35 #include <linux/circ_buf.h>
36 #include <linux/serial.h>
37 #include <linux/delay.h>
38 #include <linux/interrupt.h>
41 #include <asm/hardware.h>
44 #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
48 #include <linux/serial_core.h>
51 struct uart_pxa_port {
52 struct uart_port port;
56 unsigned int lsr_break_flag;
61 static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
64 return readl(up->port.membase + offset);
67 static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
70 writel(value, up->port.membase + offset);
73 static void serial_pxa_enable_ms(struct uart_port *port)
75 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
77 up->ier |= UART_IER_MSI;
78 serial_out(up, UART_IER, up->ier);
81 static void serial_pxa_stop_tx(struct uart_port *port, unsigned int tty_stop)
83 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
85 if (up->ier & UART_IER_THRI) {
86 up->ier &= ~UART_IER_THRI;
87 serial_out(up, UART_IER, up->ier);
91 static void serial_pxa_stop_rx(struct uart_port *port)
93 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
95 up->ier &= ~UART_IER_RLSI;
96 up->port.read_status_mask &= ~UART_LSR_DR;
97 serial_out(up, UART_IER, up->ier);
101 receive_chars(struct uart_pxa_port *up, int *status, struct pt_regs *regs)
103 struct tty_struct *tty = up->port.info->tty;
108 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
110 * FIXME: Deadlock can happen here if we're a
111 * low-latency port. We're holding the per-port
112 * spinlock, and we call flush_to_ldisc->
113 * n_tty_receive_buf->n_tty_receive_char->
114 * opost->uart_put_char.
116 tty->flip.work.func((void *)tty);
117 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
118 return; // if TTY_DONT_FLIP is set
120 ch = serial_in(up, UART_RX);
121 *tty->flip.char_buf_ptr = ch;
122 *tty->flip.flag_buf_ptr = TTY_NORMAL;
123 up->port.icount.rx++;
125 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
126 UART_LSR_FE | UART_LSR_OE))) {
128 * For statistics only
130 if (*status & UART_LSR_BI) {
131 *status &= ~(UART_LSR_FE | UART_LSR_PE);
132 up->port.icount.brk++;
134 * We do the SysRQ and SAK checking
135 * here because otherwise the break
136 * may get masked by ignore_status_mask
137 * or read_status_mask.
139 if (uart_handle_break(&up->port))
141 } else if (*status & UART_LSR_PE)
142 up->port.icount.parity++;
143 else if (*status & UART_LSR_FE)
144 up->port.icount.frame++;
145 if (*status & UART_LSR_OE)
146 up->port.icount.overrun++;
149 * Mask off conditions which should be ignored.
151 *status &= up->port.read_status_mask;
153 #ifdef CONFIG_SERIAL_PXA_CONSOLE
154 if (up->port.line == up->port.cons->index) {
155 /* Recover the break flag from console xmit */
156 *status |= up->lsr_break_flag;
157 up->lsr_break_flag = 0;
160 if (*status & UART_LSR_BI) {
161 *tty->flip.flag_buf_ptr = TTY_BREAK;
162 } else if (*status & UART_LSR_PE)
163 *tty->flip.flag_buf_ptr = TTY_PARITY;
164 else if (*status & UART_LSR_FE)
165 *tty->flip.flag_buf_ptr = TTY_FRAME;
167 if (uart_handle_sysrq_char(&up->port, ch, regs))
169 if ((*status & up->port.ignore_status_mask) == 0) {
170 tty->flip.flag_buf_ptr++;
171 tty->flip.char_buf_ptr++;
174 if ((*status & UART_LSR_OE) &&
175 tty->flip.count < TTY_FLIPBUF_SIZE) {
177 * Overrun is special, since it's reported
178 * immediately, and doesn't affect the current
181 *tty->flip.flag_buf_ptr = TTY_OVERRUN;
182 tty->flip.flag_buf_ptr++;
183 tty->flip.char_buf_ptr++;
187 *status = serial_in(up, UART_LSR);
188 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
189 tty_flip_buffer_push(tty);
192 static void transmit_chars(struct uart_pxa_port *up)
194 struct circ_buf *xmit = &up->port.info->xmit;
197 if (up->port.x_char) {
198 serial_out(up, UART_TX, up->port.x_char);
199 up->port.icount.tx++;
203 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
204 serial_pxa_stop_tx(&up->port, 0);
208 count = up->port.fifosize / 2;
210 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
211 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
212 up->port.icount.tx++;
213 if (uart_circ_empty(xmit))
215 } while (--count > 0);
217 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
218 uart_write_wakeup(&up->port);
221 if (uart_circ_empty(xmit))
222 serial_pxa_stop_tx(&up->port, 0);
225 static void serial_pxa_start_tx(struct uart_port *port, unsigned int tty_start)
227 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
229 if (!(up->ier & UART_IER_THRI)) {
230 up->ier |= UART_IER_THRI;
231 serial_out(up, UART_IER, up->ier);
235 static inline void check_modem_status(struct uart_pxa_port *up)
239 status = serial_in(up, UART_MSR);
241 if ((status & UART_MSR_ANY_DELTA) == 0)
244 if (status & UART_MSR_TERI)
245 up->port.icount.rng++;
246 if (status & UART_MSR_DDSR)
247 up->port.icount.dsr++;
248 if (status & UART_MSR_DDCD)
249 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
250 if (status & UART_MSR_DCTS)
251 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
253 wake_up_interruptible(&up->port.info->delta_msr_wait);
257 * This handles the interrupt from one port.
259 static inline irqreturn_t
260 serial_pxa_irq(int irq, void *dev_id, struct pt_regs *regs)
262 struct uart_pxa_port *up = (struct uart_pxa_port *)dev_id;
263 unsigned int iir, lsr;
265 iir = serial_in(up, UART_IIR);
266 if (iir & UART_IIR_NO_INT)
268 lsr = serial_in(up, UART_LSR);
269 if (lsr & UART_LSR_DR)
270 receive_chars(up, &lsr, regs);
271 check_modem_status(up);
272 if (lsr & UART_LSR_THRE)
277 static unsigned int serial_pxa_tx_empty(struct uart_port *port)
279 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
283 spin_lock_irqsave(&up->port.lock, flags);
284 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
285 spin_unlock_irqrestore(&up->port.lock, flags);
290 static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
292 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
294 unsigned char status;
297 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
298 spin_lock_irqsave(&up->port.lock, flags);
299 status = serial_in(up, UART_MSR);
300 spin_unlock_irqrestore(&up->port.lock, flags);
303 if (status & UART_MSR_DCD)
305 if (status & UART_MSR_RI)
307 if (status & UART_MSR_DSR)
309 if (status & UART_MSR_CTS)
314 static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
316 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
317 unsigned char mcr = 0;
319 if (mctrl & TIOCM_RTS)
321 if (mctrl & TIOCM_DTR)
323 if (mctrl & TIOCM_OUT1)
324 mcr |= UART_MCR_OUT1;
325 if (mctrl & TIOCM_OUT2)
326 mcr |= UART_MCR_OUT2;
327 if (mctrl & TIOCM_LOOP)
328 mcr |= UART_MCR_LOOP;
332 serial_out(up, UART_MCR, mcr);
335 static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
337 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
340 spin_lock_irqsave(&up->port.lock, flags);
341 if (break_state == -1)
342 up->lcr |= UART_LCR_SBC;
344 up->lcr &= ~UART_LCR_SBC;
345 serial_out(up, UART_LCR, up->lcr);
346 spin_unlock_irqrestore(&up->port.lock, flags);
350 static void serial_pxa_dma_init(struct pxa_uart *up)
353 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up);
357 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up);
360 up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL);
366 pxa_free_dma(up->txdma);
368 pxa_free_dma(up->rxdma);
374 static int serial_pxa_startup(struct uart_port *port)
376 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
385 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
393 * Clear the FIFO buffers and disable them.
394 * (they will be reenabled in set_termios())
396 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
397 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
398 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
399 serial_out(up, UART_FCR, 0);
402 * Clear the interrupt registers.
404 (void) serial_in(up, UART_LSR);
405 (void) serial_in(up, UART_RX);
406 (void) serial_in(up, UART_IIR);
407 (void) serial_in(up, UART_MSR);
410 * Now, initialize the UART
412 serial_out(up, UART_LCR, UART_LCR_WLEN8);
414 spin_lock_irqsave(&up->port.lock, flags);
415 up->port.mctrl |= TIOCM_OUT2;
416 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
417 spin_unlock_irqrestore(&up->port.lock, flags);
420 * Finally, enable interrupts. Note: Modem status interrupts
421 * are set via set_termios(), which will be occuring imminently
422 * anyway, so we don't enable them here.
424 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
425 serial_out(up, UART_IER, up->ier);
428 * And clear the interrupt registers again for luck.
430 (void) serial_in(up, UART_LSR);
431 (void) serial_in(up, UART_RX);
432 (void) serial_in(up, UART_IIR);
433 (void) serial_in(up, UART_MSR);
438 static void serial_pxa_shutdown(struct uart_port *port)
440 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
443 free_irq(up->port.irq, up);
446 * Disable interrupts from this port
449 serial_out(up, UART_IER, 0);
451 spin_lock_irqsave(&up->port.lock, flags);
452 up->port.mctrl &= ~TIOCM_OUT2;
453 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
454 spin_unlock_irqrestore(&up->port.lock, flags);
457 * Disable break condition and FIFOs
459 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
460 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
461 UART_FCR_CLEAR_RCVR |
462 UART_FCR_CLEAR_XMIT);
463 serial_out(up, UART_FCR, 0);
469 serial_pxa_set_termios(struct uart_port *port, struct termios *termios,
472 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
473 unsigned char cval, fcr = 0;
475 unsigned int baud, quot;
477 switch (termios->c_cflag & CSIZE) {
493 if (termios->c_cflag & CSTOPB)
495 if (termios->c_cflag & PARENB)
496 cval |= UART_LCR_PARITY;
497 if (!(termios->c_cflag & PARODD))
498 cval |= UART_LCR_EPAR;
501 * Ask the core to calculate the divisor for us.
503 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
504 quot = uart_get_divisor(port, baud);
506 if ((up->port.uartclk / quot) < (2400 * 16))
507 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
509 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
512 * Ok, we're now changing the port state. Do it with
513 * interrupts disabled.
515 spin_lock_irqsave(&up->port.lock, flags);
518 * Ensure the port will be enabled.
519 * This is required especially for serial console.
524 * Update the per-port timeout.
526 uart_update_timeout(port, termios->c_cflag, quot);
528 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
529 if (termios->c_iflag & INPCK)
530 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
531 if (termios->c_iflag & (BRKINT | PARMRK))
532 up->port.read_status_mask |= UART_LSR_BI;
535 * Characters to ignore
537 up->port.ignore_status_mask = 0;
538 if (termios->c_iflag & IGNPAR)
539 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
540 if (termios->c_iflag & IGNBRK) {
541 up->port.ignore_status_mask |= UART_LSR_BI;
543 * If we're ignoring parity and break indicators,
544 * ignore overruns too (for real raw support).
546 if (termios->c_iflag & IGNPAR)
547 up->port.ignore_status_mask |= UART_LSR_OE;
551 * ignore all characters if CREAD is not set
553 if ((termios->c_cflag & CREAD) == 0)
554 up->port.ignore_status_mask |= UART_LSR_DR;
557 * CTS flow control flag and modem status interrupts
559 up->ier &= ~UART_IER_MSI;
560 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
561 up->ier |= UART_IER_MSI;
563 serial_out(up, UART_IER, up->ier);
565 serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
566 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
567 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
568 serial_out(up, UART_LCR, cval); /* reset DLAB */
569 up->lcr = cval; /* Save LCR */
570 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
571 serial_out(up, UART_FCR, fcr);
572 spin_unlock_irqrestore(&up->port.lock, flags);
576 serial_pxa_pm(struct uart_port *port, unsigned int state,
577 unsigned int oldstate)
586 static void serial_pxa_release_port(struct uart_port *port)
590 static int serial_pxa_request_port(struct uart_port *port)
595 static void serial_pxa_config_port(struct uart_port *port, int flags)
597 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
598 up->port.type = PORT_PXA;
602 serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
604 /* we don't want the core code to modify any port params */
609 serial_pxa_type(struct uart_port *port)
611 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
615 #ifdef CONFIG_SERIAL_PXA_CONSOLE
617 extern struct uart_pxa_port serial_pxa_ports[];
618 extern struct uart_driver serial_pxa_reg;
620 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
623 * Wait for transmitter & holding register to empty
625 static inline void wait_for_xmitr(struct uart_pxa_port *up)
627 unsigned int status, tmout = 10000;
629 /* Wait up to 10ms for the character(s) to be sent. */
631 status = serial_in(up, UART_LSR);
633 if (status & UART_LSR_BI)
634 up->lsr_break_flag = UART_LSR_BI;
639 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
641 /* Wait up to 1s for flow control if necessary */
642 if (up->port.flags & UPF_CONS_FLOW) {
645 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
651 * Print a string to the serial port trying not to disturb
652 * any possible real use of the port...
654 * The console_lock must be held when we get here.
657 serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
659 struct uart_pxa_port *up = &serial_pxa_ports[co->index];
664 * First save the UER then disable the interrupts
666 ier = serial_in(up, UART_IER);
667 serial_out(up, UART_IER, UART_IER_UUE);
670 * Now, do each character
672 for (i = 0; i < count; i++, s++) {
676 * Send the character out.
677 * If a LF, also do CR...
679 serial_out(up, UART_TX, *s);
682 serial_out(up, UART_TX, 13);
687 * Finally, wait for transmitter to become empty
688 * and restore the IER
691 serial_out(up, UART_IER, ier);
695 serial_pxa_console_setup(struct console *co, char *options)
697 struct uart_pxa_port *up;
703 if (co->index == -1 || co->index >= serial_pxa_reg.nr)
705 up = &serial_pxa_ports[co->index];
708 uart_parse_options(options, &baud, &parity, &bits, &flow);
710 return uart_set_options(&up->port, co, baud, parity, bits, flow);
713 static struct console serial_pxa_console = {
715 .write = serial_pxa_console_write,
716 .device = uart_console_device,
717 .setup = serial_pxa_console_setup,
718 .flags = CON_PRINTBUFFER,
720 .data = &serial_pxa_reg,
724 serial_pxa_console_init(void)
726 register_console(&serial_pxa_console);
730 console_initcall(serial_pxa_console_init);
732 #define PXA_CONSOLE &serial_pxa_console
734 #define PXA_CONSOLE NULL
737 struct uart_ops serial_pxa_pops = {
738 .tx_empty = serial_pxa_tx_empty,
739 .set_mctrl = serial_pxa_set_mctrl,
740 .get_mctrl = serial_pxa_get_mctrl,
741 .stop_tx = serial_pxa_stop_tx,
742 .start_tx = serial_pxa_start_tx,
743 .stop_rx = serial_pxa_stop_rx,
744 .enable_ms = serial_pxa_enable_ms,
745 .break_ctl = serial_pxa_break_ctl,
746 .startup = serial_pxa_startup,
747 .shutdown = serial_pxa_shutdown,
748 .set_termios = serial_pxa_set_termios,
750 .type = serial_pxa_type,
751 .release_port = serial_pxa_release_port,
752 .request_port = serial_pxa_request_port,
753 .config_port = serial_pxa_config_port,
754 .verify_port = serial_pxa_verify_port,
757 static struct uart_pxa_port serial_pxa_ports[] = {
760 .cken = CKEN6_FFUART,
763 .iotype = SERIAL_IO_MEM,
764 .membase = (void *)&FFUART,
765 .mapbase = __PREG(FFUART),
767 .uartclk = 921600 * 16,
769 .flags = ASYNC_SKIP_TEST,
770 .ops = &serial_pxa_pops,
775 .cken = CKEN7_BTUART,
778 .iotype = SERIAL_IO_MEM,
779 .membase = (void *)&BTUART,
780 .mapbase = __PREG(BTUART),
782 .uartclk = 921600 * 16,
784 .flags = ASYNC_SKIP_TEST,
785 .ops = &serial_pxa_pops,
790 .cken = CKEN5_STUART,
793 .iotype = SERIAL_IO_MEM,
794 .membase = (void *)&STUART,
795 .mapbase = __PREG(STUART),
797 .uartclk = 921600 * 16,
799 .flags = ASYNC_SKIP_TEST,
800 .ops = &serial_pxa_pops,
806 static struct uart_driver serial_pxa_reg = {
807 .owner = THIS_MODULE,
808 .driver_name = "PXA serial",
809 .devfs_name = "tts/",
813 .nr = ARRAY_SIZE(serial_pxa_ports),
817 static int __init serial_pxa_init(void)
821 ret = uart_register_driver(&serial_pxa_reg);
825 for (i = 0; i < ARRAY_SIZE(serial_pxa_ports); i++)
826 uart_add_one_port(&serial_pxa_reg, &serial_pxa_ports[i].port);
831 static void __exit serial_pxa_exit(void)
833 uart_unregister_driver(&serial_pxa_reg);
836 module_init(serial_pxa_init);
837 module_exit(serial_pxa_exit);
839 MODULE_LICENSE("GPL");