2 * Copyright (c) 2001 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 /* this file is part of ehci-hcd.c */
21 /*-------------------------------------------------------------------------*/
24 * There's basically three types of memory:
25 * - data used only by the HCD ... kmalloc is fine
26 * - async and periodic schedules, shared by HC and HCD ... these
27 * need to use dma_pool or dma_alloc_coherent
28 * - driver buffers, read/written by HC ... single shot DMA mapped
30 * There's also PCI "register" data, which is memory mapped.
31 * No memory seen by this driver is pageable.
34 /*-------------------------------------------------------------------------*/
36 * Allocator / cleanup for the per device structure
37 * Called by hcd init / removal code
39 static struct usb_hcd *ehci_hcd_alloc (void)
41 struct ehci_hcd *ehci;
43 ehci = (struct ehci_hcd *)
44 kmalloc (sizeof (struct ehci_hcd), GFP_KERNEL);
46 memset (ehci, 0, sizeof (struct ehci_hcd));
47 ehci->hcd.product_desc = "EHCI Host Controller";
53 /*-------------------------------------------------------------------------*/
55 /* Allocate the key transfer structures from the previously allocated pool */
57 static inline void ehci_qtd_init (struct ehci_qtd *qtd, dma_addr_t dma)
59 memset (qtd, 0, sizeof *qtd);
61 qtd->hw_token = cpu_to_le32 (QTD_STS_HALT);
62 qtd->hw_next = EHCI_LIST_END;
63 qtd->hw_alt_next = EHCI_LIST_END;
64 INIT_LIST_HEAD (&qtd->qtd_list);
67 static struct ehci_qtd *ehci_qtd_alloc (struct ehci_hcd *ehci, int flags)
72 qtd = dma_pool_alloc (ehci->qtd_pool, flags, &dma);
74 ehci_qtd_init (qtd, dma);
79 static inline void ehci_qtd_free (struct ehci_hcd *ehci, struct ehci_qtd *qtd)
81 dma_pool_free (ehci->qtd_pool, qtd, qtd->qtd_dma);
85 static void qh_destroy (struct kref *kref)
87 struct ehci_qh *qh = container_of(kref, struct ehci_qh, kref);
88 struct ehci_hcd *ehci = qh->ehci;
90 /* clean qtds first, and know this is not linked */
91 if (!list_empty (&qh->qtd_list) || qh->qh_next.ptr) {
92 ehci_dbg (ehci, "unused qh not empty!\n");
96 ehci_qtd_free (ehci, qh->dummy);
97 usb_put_dev (qh->dev);
98 dma_pool_free (ehci->qh_pool, qh, qh->qh_dma);
101 static struct ehci_qh *ehci_qh_alloc (struct ehci_hcd *ehci, int flags)
106 qh = (struct ehci_qh *)
107 dma_pool_alloc (ehci->qh_pool, flags, &dma);
111 memset (qh, 0, sizeof *qh);
112 kref_init(&qh->kref);
115 // INIT_LIST_HEAD (&qh->qh_list);
116 INIT_LIST_HEAD (&qh->qtd_list);
118 /* dummy td enables safe urb queuing */
119 qh->dummy = ehci_qtd_alloc (ehci, flags);
120 if (qh->dummy == 0) {
121 ehci_dbg (ehci, "no dummy td\n");
122 dma_pool_free (ehci->qh_pool, qh, qh->qh_dma);
128 /* to share a qh (cpu threads, or hc) */
129 static inline struct ehci_qh *qh_get (struct ehci_qh *qh)
135 static inline void qh_put (struct ehci_qh *qh)
137 kref_put(&qh->kref, qh_destroy);
140 /*-------------------------------------------------------------------------*/
142 /* The queue heads and transfer descriptors are managed from pools tied
143 * to each of the "per device" structures.
144 * This is the initialisation and cleanup code.
147 static void ehci_mem_cleanup (struct ehci_hcd *ehci)
150 qh_put (ehci->async);
153 /* DMA consistent memory and pools */
155 dma_pool_destroy (ehci->qtd_pool);
156 ehci->qtd_pool = NULL;
159 dma_pool_destroy (ehci->qh_pool);
160 ehci->qh_pool = NULL;
164 dma_pool_destroy (ehci->itd_pool);
165 ehci->itd_pool = NULL;
168 dma_pool_destroy (ehci->sitd_pool);
169 ehci->sitd_pool = NULL;
172 dma_free_coherent (ehci->hcd.self.controller,
173 ehci->periodic_size * sizeof (u32),
174 ehci->periodic, ehci->periodic_dma);
175 ehci->periodic = NULL;
177 /* shadow periodic table */
179 kfree (ehci->pshadow);
180 ehci->pshadow = NULL;
183 /* remember to add cleanup code (above) if you add anything here */
184 static int ehci_mem_init (struct ehci_hcd *ehci, int flags)
188 /* QTDs for control/bulk/intr transfers */
189 ehci->qtd_pool = dma_pool_create ("ehci_qtd",
190 ehci->hcd.self.controller,
191 sizeof (struct ehci_qtd),
192 32 /* byte alignment (for hw parts) */,
193 4096 /* can't cross 4K */);
194 if (!ehci->qtd_pool) {
198 /* QHs for control/bulk/intr transfers */
199 ehci->qh_pool = dma_pool_create ("ehci_qh",
200 ehci->hcd.self.controller,
201 sizeof (struct ehci_qh),
202 32 /* byte alignment (for hw parts) */,
203 4096 /* can't cross 4K */);
204 if (!ehci->qh_pool) {
207 ehci->async = ehci_qh_alloc (ehci, flags);
212 /* ITD for high speed ISO transfers */
213 ehci->itd_pool = dma_pool_create ("ehci_itd",
214 ehci->hcd.self.controller,
215 sizeof (struct ehci_itd),
216 32 /* byte alignment (for hw parts) */,
217 4096 /* can't cross 4K */);
218 if (!ehci->itd_pool) {
222 /* SITD for full/low speed split ISO transfers */
223 ehci->sitd_pool = dma_pool_create ("ehci_sitd",
224 ehci->hcd.self.controller,
225 sizeof (struct ehci_sitd),
226 32 /* byte alignment (for hw parts) */,
227 4096 /* can't cross 4K */);
228 if (!ehci->sitd_pool) {
232 /* Hardware periodic table */
233 ehci->periodic = (__le32 *)
234 dma_alloc_coherent (ehci->hcd.self.controller,
235 ehci->periodic_size * sizeof(__le32),
236 &ehci->periodic_dma, 0);
237 if (ehci->periodic == 0) {
240 for (i = 0; i < ehci->periodic_size; i++)
241 ehci->periodic [i] = EHCI_LIST_END;
243 /* software shadow of hardware table */
244 ehci->pshadow = kmalloc (ehci->periodic_size * sizeof (void *), flags);
245 if (ehci->pshadow == 0) {
248 memset (ehci->pshadow, 0, ehci->periodic_size * sizeof (void *));
253 ehci_dbg (ehci, "couldn't init memory\n");
254 ehci_mem_cleanup (ehci);