2 * OHCI HCD (Host Controller Driver) for USB.
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
7 * [ Initialisation is based on Linus' ]
8 * [ uhci code and gregs ohci fragments ]
9 * [ (C) Copyright 1999 Linus Torvalds ]
10 * [ (C) Copyright 1999 Gregory P. Smith]
13 * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
14 * interfaces (though some non-x86 Intel chips use it). It supports
15 * smarter hardware than UHCI. A download link for the spec available
16 * through the http://www.usb.org website.
20 * 2004/02/04 use generic dma_* functions instead of pci_* (dsaxena@plexity.net)
21 * 2003/02/24 show registers in sysfs (Kevin Brosius)
23 * 2002/09/03 get rid of ed hashtables, rework periodic scheduling and
24 * bandwidth accounting; if debugging, show schedules in driverfs
25 * 2002/07/19 fixes to management of ED and schedule state.
26 * 2002/06/09 SA-1111 support (Christopher Hoover)
27 * 2002/06/01 remember frame when HC won't see EDs any more; use that info
28 * to fix urb unlink races caused by interrupt latency assumptions;
29 * minor ED field and function naming updates
30 * 2002/01/18 package as a patch for 2.5.3; this should match the
31 * 2.4.17 kernel modulo some bugs being fixed.
33 * 2001/10/18 merge pmac cleanup (Benjamin Herrenschmidt) and bugfixes
34 * from post-2.4.5 patches.
35 * 2001/09/20 URB_ZERO_PACKET support; hcca_dma portability, OPTi warning
36 * 2001/09/07 match PCI PM changes, errnos from Linus' tree
37 * 2001/05/05 fork 2.4.5 version into "hcd" framework, cleanup, simplify;
38 * pbook pci quirks gone (please fix pbook pci sw!) (db)
40 * 2001/04/08 Identify version on module load (gb)
41 * 2001/03/24 td/ed hashing to remove bus_to_virt (Steve Longerbeam);
43 * 2001/03/21 td and dev/ed allocation uses new pci_pool API (db)
44 * 2001/03/07 hcca allocation uses pci_alloc_consistent (Steve Longerbeam)
46 * 2000/09/26 fixed races in removing the private portion of the urb
47 * 2000/09/07 disable bulk and control lists when unlinking the last
48 * endpoint descriptor in order to avoid unrecoverable errors on
49 * the Lucent chips. (rwc@sgi)
50 * 2000/08/29 use bandwidth claiming hooks (thanks Randy!), fix some
51 * urb unlink probs, indentation fixes
52 * 2000/08/11 various oops fixes mostly affecting iso and cleanup from
54 * 2000/06/28 use PCI hotplug framework, for better power management
55 * and for Cardbus support (David Brownell)
56 * 2000/earlier: fixes for NEC/Lucent chips; suspend/resume handling
57 * when the controller loses power; handle UE; cleanup; ...
59 * v5.2 1999/12/07 URB 3rd preview,
60 * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi)
61 * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume
62 * i386: HUB, Keyboard, Mouse, Printer
64 * v4.3 1999/10/27 multiple HCs, bulk_request
65 * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes
66 * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl.
69 * v2.1 1999/05/09 code clean up
71 * v1.0 1999/04/27 initial release
73 * This file is licenced under the GPL.
76 #include <linux/config.h>
78 #ifdef CONFIG_USB_DEBUG
84 #include <linux/module.h>
85 #include <linux/moduleparam.h>
86 #include <linux/pci.h>
87 #include <linux/kernel.h>
88 #include <linux/delay.h>
89 #include <linux/ioport.h>
90 #include <linux/sched.h>
91 #include <linux/slab.h>
92 #include <linux/smp_lock.h>
93 #include <linux/errno.h>
94 #include <linux/init.h>
95 #include <linux/timer.h>
96 #include <linux/list.h>
97 #include <linux/interrupt.h> /* for in_interrupt () */
98 #include <linux/usb.h>
99 #include "../core/hcd.h"
100 #include <linux/dma-mapping.h>
101 #include <linux/dmapool.h> /* needed by ohci-mem.c when no PCI */
105 #include <asm/system.h>
106 #include <asm/unaligned.h>
107 #include <asm/byteorder.h>
110 #define DRIVER_VERSION "2004 Feb 02"
111 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
112 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
114 /*-------------------------------------------------------------------------*/
116 // #define OHCI_VERBOSE_DEBUG /* not always helpful */
118 /* For initializing controller (mask in an HCFS mode too) */
119 #define OHCI_CONTROL_INIT OHCI_CTRL_CBSR
120 #define OHCI_INTR_INIT \
121 (OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_RD | OHCI_INTR_WDH)
123 /*-------------------------------------------------------------------------*/
125 static const char hcd_name [] = "ohci_hcd";
129 #include "ohci-hub.c"
130 #include "ohci-dbg.c"
131 #include "ohci-mem.c"
135 /* Some boards don't support per-port power switching */
136 static int power_switching = 0;
137 module_param (power_switching, bool, 0);
138 MODULE_PARM_DESC (power_switching, "true (not default) to switch port power");
140 /*-------------------------------------------------------------------------*/
143 * queue up an urb for anything except the root hub
145 static int ohci_urb_enqueue (
150 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
152 urb_priv_t *urb_priv;
153 unsigned int pipe = urb->pipe;
158 #ifdef OHCI_VERBOSE_DEBUG
159 urb_print (urb, "SUB", usb_pipein (pipe));
162 /* every endpoint has a ed, locate and maybe (re)initialize it */
163 if (! (ed = ed_get (ohci, urb->dev, pipe, urb->interval)))
166 /* for the private part of the URB we need the number of TDs (size) */
169 /* td_submit_urb() doesn't yet handle these */
170 if (urb->transfer_buffer_length > 4096)
173 /* 1 TD for setup, 1 for ACK, plus ... */
176 // case PIPE_INTERRUPT:
179 /* one TD for every 4096 Bytes (can be upto 8K) */
180 size += urb->transfer_buffer_length / 4096;
181 /* ... and for any remaining bytes ... */
182 if ((urb->transfer_buffer_length % 4096) != 0)
184 /* ... and maybe a zero length packet to wrap it up */
187 else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
188 && (urb->transfer_buffer_length
189 % usb_maxpacket (urb->dev, pipe,
190 usb_pipeout (pipe))) == 0)
193 case PIPE_ISOCHRONOUS: /* number of packets from URB */
194 size = urb->number_of_packets;
198 /* allocate the private part of the URB */
199 urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
203 memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *));
204 INIT_LIST_HEAD (&urb_priv->pending);
205 urb_priv->length = size;
208 /* allocate the TDs (deferring hash chain updates) */
209 for (i = 0; i < size; i++) {
210 urb_priv->td [i] = td_alloc (ohci, mem_flags);
211 if (!urb_priv->td [i]) {
212 urb_priv->length = i;
213 urb_free_priv (ohci, urb_priv);
218 spin_lock_irqsave (&ohci->lock, flags);
220 /* don't submit to a dead HC */
221 if (!HCD_IS_RUNNING(ohci->hcd.state)) {
226 /* in case of unlink-during-submit */
227 spin_lock (&urb->lock);
228 if (urb->status != -EINPROGRESS) {
229 spin_unlock (&urb->lock);
230 urb->hcpriv = urb_priv;
231 finish_urb (ohci, urb, 0);
236 /* schedule the ed if needed */
237 if (ed->state == ED_IDLE) {
238 retval = ed_schedule (ohci, ed);
241 if (ed->type == PIPE_ISOCHRONOUS) {
242 u16 frame = OHCI_FRAME_NO(ohci->hcca);
244 /* delay a few frames before the first TD */
245 frame += max_t (u16, 8, ed->interval);
246 frame &= ~(ed->interval - 1);
248 urb->start_frame = frame;
250 /* yes, only URB_ISO_ASAP is supported, and
251 * urb->start_frame is never used as input.
254 } else if (ed->type == PIPE_ISOCHRONOUS)
255 urb->start_frame = ed->last_iso + ed->interval;
257 /* fill the TDs and link them to the ed; and
258 * enable that part of the schedule, if needed
259 * and update count of queued periodic urbs
261 urb->hcpriv = urb_priv;
262 td_submit_urb (ohci, urb);
265 spin_unlock (&urb->lock);
268 urb_free_priv (ohci, urb_priv);
269 spin_unlock_irqrestore (&ohci->lock, flags);
274 * decouple the URB from the HC queues (TDs, urb_priv); it's
275 * already marked using urb->status. reporting is always done
276 * asynchronously, and we might be dealing with an urb that's
277 * partially transferred, or an ED with other urbs being unlinked.
279 static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
281 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
284 #ifdef OHCI_VERBOSE_DEBUG
285 urb_print (urb, "UNLINK", 1);
288 spin_lock_irqsave (&ohci->lock, flags);
289 if (HCD_IS_RUNNING(ohci->hcd.state)) {
290 urb_priv_t *urb_priv;
292 /* Unless an IRQ completed the unlink while it was being
293 * handed to us, flag it for unlink and giveback, and force
294 * some upcoming INTR_SF to call finish_unlinks()
296 urb_priv = urb->hcpriv;
298 if (urb_priv->ed->state == ED_OPER)
299 start_ed_unlink (ohci, urb_priv->ed);
303 * with HC dead, we won't respect hc queue pointers
304 * any more ... just clean up every urb's memory.
307 finish_urb (ohci, urb, NULL);
309 spin_unlock_irqrestore (&ohci->lock, flags);
313 /*-------------------------------------------------------------------------*/
315 /* frees config/altsetting state for endpoints,
316 * including ED memory, dummy TD, and bulk/intr data toggle
320 ohci_endpoint_disable (struct usb_hcd *hcd, struct hcd_dev *dev, int ep)
322 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
323 int epnum = ep & USB_ENDPOINT_NUMBER_MASK;
326 unsigned limit = 1000;
328 /* ASSERT: any requests/urbs are being unlinked */
329 /* ASSERT: nobody can be submitting urbs for this any more */
332 if (epnum != 0 && !(ep & USB_DIR_IN))
336 spin_lock_irqsave (&ohci->lock, flags);
337 ed = dev->ep [epnum];
341 if (!HCD_IS_RUNNING (ohci->hcd.state)) {
343 finish_unlinks (ohci, 0, 0);
347 case ED_UNLINK: /* wait for hw to finish? */
348 /* major IRQ delivery trouble loses INTR_SF too... */
349 WARN_ON (limit-- == 0);
350 spin_unlock_irqrestore (&ohci->lock, flags);
351 set_current_state (TASK_UNINTERRUPTIBLE);
352 schedule_timeout (1);
354 case ED_IDLE: /* fully unlinked */
355 if (list_empty (&ed->td_list)) {
356 td_free (ohci, ed->dummy);
360 /* else FALL THROUGH */
362 /* caller was supposed to have unlinked any requests;
363 * that's not our job. can't recover; must leak ed.
365 ohci_err (ohci, "leak ed %p (#%d) state %d%s\n",
366 ed, epnum, ed->state,
367 list_empty (&ed->td_list) ? "" : " (has tds)");
368 td_free (ohci, ed->dummy);
373 spin_unlock_irqrestore (&ohci->lock, flags);
377 static int ohci_get_frame (struct usb_hcd *hcd)
379 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
381 return OHCI_FRAME_NO(ohci->hcca);
384 /*-------------------------------------------------------------------------*
386 *-------------------------------------------------------------------------*/
388 /* reset the HC and BUS */
390 static int hc_reset (struct ohci_hcd *ohci)
394 /* boot firmware should have set this up (5.1.1.3.1) */
395 if (!ohci->fminterval) {
396 temp = readl (&ohci->regs->fminterval);
397 if (temp & 0x3fff0000)
398 ohci->fminterval = temp;
400 ohci->fminterval = DEFAULT_FMINTERVAL;
401 /* also: power/overcurrent flags in roothub.a */
404 /* SMM owns the HC? not for long!
405 * On PA-RISC, PDC can leave IR set incorrectly; ignore it there.
408 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
409 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
411 /* this timeout is arbitrary. we make it long, so systems
412 * depending on usb keyboards may be usable even if the
413 * BIOS/SMM code seems pretty broken.
415 temp = 500; /* arbitrary: five seconds */
417 writel (OHCI_INTR_OC, &ohci->regs->intrenable);
418 writel (OHCI_OCR, &ohci->regs->cmdstatus);
419 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
422 ohci_err (ohci, "USB HC TakeOver failed!\n");
429 /* Disable HC interrupts */
430 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
432 ohci_dbg (ohci, "reset, control = 0x%x\n",
433 readl (&ohci->regs->control));
435 /* Reset USB (needed by some controllers); RemoteWakeupConnected
436 * saved if boot firmware (BIOS/SMM/...) told us it's connected
437 * (for OHCI integrated on mainboard, it normally is)
439 ohci->hc_control = readl (&ohci->regs->control);
440 ohci->hc_control &= OHCI_CTRL_RWC; /* hcfs 0 = RESET */
441 if (ohci->hc_control)
442 ohci->hcd.can_wakeup = 1;
443 writel (ohci->hc_control, &ohci->regs->control);
444 if (power_switching) {
445 unsigned ports = roothub_a (ohci) & RH_A_NDP;
447 /* power down each port */
448 for (temp = 0; temp < ports; temp++)
450 &ohci->regs->roothub.portstatus [temp]);
452 // flush those pci writes
453 (void) readl (&ohci->regs->control);
456 /* HC Reset requires max 10 us delay */
457 writel (OHCI_HCR, &ohci->regs->cmdstatus);
458 temp = 30; /* ... allow extra time */
459 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
461 ohci_err (ohci, "USB HC reset timed out!\n");
467 /* now we're in the SUSPEND state ... must go OPERATIONAL
468 * within 2msec else HC enters RESUME
470 * ... but some hardware won't init fmInterval "by the book"
471 * (SiS, OPTi ...), so reset again instead. SiS doesn't need
472 * this if we write fmInterval after we're OPERATIONAL.
474 writel (ohci->hc_control, &ohci->regs->control);
475 // flush those pci writes
476 (void) readl (&ohci->regs->control);
481 /*-------------------------------------------------------------------------*/
483 /* Start an OHCI controller, set the BUS operational
485 * connect the virtual root hub
487 static int hc_start (struct ohci_hcd *ohci)
490 struct usb_device *udev;
495 /* Tell the controller where the control and bulk lists are
496 * The lists are empty now. */
497 writel (0, &ohci->regs->ed_controlhead);
498 writel (0, &ohci->regs->ed_bulkhead);
500 /* a reset clears this */
501 writel ((u32) ohci->hcca_dma, &ohci->regs->hcca);
503 periodic_reinit (ohci);
505 /* some OHCI implementations are finicky about how they init.
506 * bogus values here mean not even enumeration could work.
508 if ((readl (&ohci->regs->fminterval) & 0x3fff0000) == 0
509 || !readl (&ohci->regs->periodicstart)) {
510 ohci_err (ohci, "init err\n");
514 /* start controller operations */
515 ohci->hc_control &= OHCI_CTRL_RWC;
516 ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
517 writel (ohci->hc_control, &ohci->regs->control);
518 ohci->hcd.state = USB_STATE_RUNNING;
520 /* wake on ConnectStatusChange, matching external hubs */
521 writel (RH_HS_DRWE, &ohci->regs->roothub.status);
523 /* Choose the interrupts we care about now, others later on demand */
524 mask = OHCI_INTR_INIT;
525 writel (mask, &ohci->regs->intrstatus);
526 writel (mask, &ohci->regs->intrenable);
528 /* handle root hub init quirks ... */
529 tmp = roothub_a (ohci);
530 tmp &= ~(RH_A_PSM | RH_A_OCPM);
531 if (ohci->flags & OHCI_QUIRK_SUPERIO) {
532 /* NSC 87560 and maybe others */
534 tmp &= ~(RH_A_POTPGT | RH_A_NPS);
535 } else if (power_switching) {
536 /* act like most external hubs: use per-port power
537 * switching and overcurrent reporting.
539 tmp &= ~(RH_A_NPS | RH_A_NOCP);
540 tmp |= RH_A_PSM | RH_A_OCPM;
542 /* hub power always on; required for AMD-756 and some
543 * Mac platforms. ganged overcurrent reporting, if any.
547 writel (tmp, &ohci->regs->roothub.a);
548 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
549 writel (power_switching ? RH_B_PPCM : 0, &ohci->regs->roothub.b);
550 // flush those pci writes
551 (void) readl (&ohci->regs->control);
553 // POTPGT delay is bits 24-31, in 2 ms units.
554 mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
555 bus = hcd_to_bus (&ohci->hcd);
558 ohci->hcd.state = USB_STATE_RUNNING;
562 /* connect the virtual root hub */
563 bus->root_hub = udev = usb_alloc_dev (NULL, bus, 0);
564 ohci->hcd.state = USB_STATE_RUNNING;
567 ohci->hc_control &= ~OHCI_CTRL_HCFS;
568 writel (ohci->hc_control, &ohci->regs->control);
572 udev->speed = USB_SPEED_FULL;
573 if (hcd_register_root (&ohci->hcd) != 0) {
575 bus->root_hub = NULL;
577 ohci->hc_control &= ~OHCI_CTRL_HCFS;
578 writel (ohci->hc_control, &ohci->regs->control);
585 /*-------------------------------------------------------------------------*/
587 /* an interrupt happens */
589 static irqreturn_t ohci_irq (struct usb_hcd *hcd, struct pt_regs *ptregs)
591 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
592 struct ohci_regs *regs = ohci->regs;
595 /* we can eliminate a (slow) readl() if _only_ WDH caused this irq */
596 if ((ohci->hcca->done_head != 0)
597 && ! (le32_to_cpup (&ohci->hcca->done_head) & 0x01)) {
598 ints = OHCI_INTR_WDH;
600 /* cardbus/... hardware gone before remove() */
601 } else if ((ints = readl (®s->intrstatus)) == ~(u32)0) {
603 ohci_dbg (ohci, "device removed!\n");
606 /* interrupt for some other device? */
607 } else if ((ints &= readl (®s->intrenable)) == 0) {
611 if (ints & OHCI_INTR_UE) {
613 ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
614 // e.g. due to PCI Master/Target Abort
620 if (ints & OHCI_INTR_RD) {
621 ohci_vdbg (ohci, "resume detect\n");
622 schedule_work(&ohci->rh_resume);
625 if (ints & OHCI_INTR_WDH) {
626 if (HCD_IS_RUNNING(hcd->state))
627 writel (OHCI_INTR_WDH, ®s->intrdisable);
628 spin_lock (&ohci->lock);
629 dl_done_list (ohci, ptregs);
630 spin_unlock (&ohci->lock);
631 if (HCD_IS_RUNNING(hcd->state))
632 writel (OHCI_INTR_WDH, ®s->intrenable);
635 /* could track INTR_SO to reduce available PCI/... bandwidth */
637 /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
638 * when there's still unlinking to be done (next frame).
640 spin_lock (&ohci->lock);
641 if (ohci->ed_rm_list)
642 finish_unlinks (ohci, OHCI_FRAME_NO(ohci->hcca),
644 if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
645 && HCD_IS_RUNNING(ohci->hcd.state))
646 writel (OHCI_INTR_SF, ®s->intrdisable);
647 spin_unlock (&ohci->lock);
649 if (HCD_IS_RUNNING(ohci->hcd.state)) {
650 writel (ints, ®s->intrstatus);
651 writel (OHCI_INTR_MIE, ®s->intrenable);
652 // flush those pci writes
653 (void) readl (&ohci->regs->control);
659 /*-------------------------------------------------------------------------*/
661 static void ohci_stop (struct usb_hcd *hcd)
663 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
665 ohci_dbg (ohci, "stop %s controller (state 0x%02x)\n",
666 hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
670 flush_scheduled_work();
671 if (HCD_IS_RUNNING(ohci->hcd.state))
674 remove_debug_files (ohci);
675 ohci_mem_cleanup (ohci);
677 dma_free_coherent (ohci->hcd.self.controller,
679 ohci->hcca, ohci->hcca_dma);
685 /*-------------------------------------------------------------------------*/
687 /* must not be called from interrupt context */
691 static void mark_children_gone (struct usb_device *dev)
695 for (i = 0; i < dev->maxchild; i++) {
696 if (dev->children [i] == 0)
698 dev->children [i]->state = USB_STATE_NOTATTACHED;
699 mark_children_gone (dev->children [i]);
703 static int hc_restart (struct ohci_hcd *ohci)
707 struct urb_priv *priv;
709 /* mark any devices gone, so they do nothing till khubd disconnects.
710 * recycle any "live" eds/tds (and urbs) right away.
711 * later, khubd disconnect processing will recycle the other state,
712 * (either as disconnect/reconnect, or maybe someday as a reset).
714 spin_lock_irq(&ohci->lock);
716 mark_children_gone (ohci->hcd.self.root_hub);
717 if (!list_empty (&ohci->pending))
718 ohci_dbg(ohci, "abort schedule...\n");
719 list_for_each_entry (priv, &ohci->pending, pending) {
720 struct urb *urb = priv->td[0]->urb;
721 struct ed *ed = priv->ed;
725 ed->state = ED_UNLINK;
726 ed->hwINFO |= ED_DEQUEUE;
727 ed_deschedule (ohci, ed);
729 ed->ed_next = ohci->ed_rm_list;
731 ohci->ed_rm_list = ed;
736 ohci_dbg(ohci, "bogus ed %p state %d\n",
740 spin_lock (&urb->lock);
741 urb->status = -ESHUTDOWN;
742 spin_unlock (&urb->lock);
744 finish_unlinks (ohci, 0, 0);
745 spin_unlock_irq(&ohci->lock);
747 /* paranoia, in case that didn't work: */
749 /* empty the interrupt branches */
750 for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
751 for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
753 /* no EDs to remove */
754 ohci->ed_rm_list = NULL;
756 /* empty control and bulk lists */
757 ohci->ed_controltail = NULL;
758 ohci->ed_bulktail = NULL;
760 if ((temp = hc_reset (ohci)) < 0 || (temp = hc_start (ohci)) < 0) {
761 ohci_err (ohci, "can't restart, %d\n", temp);
764 /* here we "know" root ports should always stay powered,
765 * and that if we try to turn them back on the root hub
766 * will respond to CSC processing.
768 i = roothub_a (ohci) & RH_A_NDP;
771 &ohci->regs->roothub.portstatus [temp]);
772 ohci->hcd.self.root_hub->dev.power.power_state = 0;
773 ohci->hcd.state = USB_STATE_RUNNING;
774 ohci_dbg (ohci, "restart complete\n");
781 /*-------------------------------------------------------------------------*/
783 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
785 MODULE_AUTHOR (DRIVER_AUTHOR);
786 MODULE_DESCRIPTION (DRIVER_INFO);
787 MODULE_LICENSE ("GPL");
790 #include "ohci-pci.c"
794 #include "ohci-sa1111.c"
797 #ifdef CONFIG_ARCH_OMAP
798 #include "ohci-omap.c"
801 #if !(defined(CONFIG_PCI) || defined(CONFIG_SA1111) || defined(CONFIG_ARCH_OMAP))
802 #error "missing bus glue for ohci-hcd"