4 #include <linux/config.h>
5 #include <linux/module.h>
6 #include <linux/kernel.h>
7 #include <linux/sched.h>
8 #include <linux/delay.h>
13 #include <linux/i2c.h>
14 #include <linux/i2c-id.h>
15 #include <linux/i2c-algo-bit.h>
19 #include <video/radeon.h>
21 /***************************************************************
22 * Most of the definitions here are adapted right from XFree86 *
23 ***************************************************************/
27 * Chip families. Must fit in the low 16 bits of a long word
34 CHIP_FAMILY_RS100, /* U1 (IGP320M) or A3 (IGP320)*/
36 CHIP_FAMILY_RS200, /* U2 (IGP330M/340M/350M) or A4 (IGP330/340/345/350), RS250 (IGP 7000) */
39 CHIP_FAMILY_RS300, /* Radeon 9000 IGP */
50 enum radeon_chip_flags {
51 CHIP_FAMILY_MASK = 0x0000ffffUL,
52 CHIP_FLAGS_MASK = 0xffff0000UL,
53 CHIP_IS_MOBILITY = 0x00010000UL,
54 CHIP_IS_IGP = 0x00020000UL,
55 CHIP_HAS_CRTC2 = 0x00040000UL,
67 MT_CTV, /* composite TV */
68 MT_STV /* S-Video out */
122 * This structure contains the various registers manipulated by this
123 * driver for setting or restoring a mode. It's mostly copied from
124 * XFree's RADEONSaveRec structure. A few chip settings might still be
125 * tweaked without beeing reflected or saved in these registers though
128 /* Common registers */
130 u32 ovr_wid_left_right;
131 u32 ovr_wid_top_bottom;
145 /* Other registers to save for VT switches or driver load/unload */
148 u32 clock_cntl_index;
152 /* Surface/tiling registers */
153 u32 surf_lower_bound[8];
154 u32 surf_upper_bound[8];
161 u32 crtc_h_total_disp;
162 u32 crtc_h_sync_strt_wid;
163 u32 crtc_v_total_disp;
164 u32 crtc_v_sync_strt_wid;
166 u32 crtc_offset_cntl;
169 u32 grph_buffer_cntl;
172 /* CRTC2 registers */
175 u32 disp_output_cntl;
177 u32 disp2_merge_cntl;
178 u32 grph2_buffer_cntl;
179 u32 crtc2_h_total_disp;
180 u32 crtc2_h_sync_strt_wid;
181 u32 crtc2_v_total_disp;
182 u32 crtc2_v_sync_strt_wid;
184 u32 crtc2_offset_cntl;
187 /* Flat panel regs */
188 u32 fp_crtc_h_total_disp;
189 u32 fp_crtc_v_total_disp;
192 u32 fp_h_sync_strt_wid;
193 u32 fp2_h_sync_strt_wid;
196 u32 fp_v_sync_strt_wid;
197 u32 fp2_v_sync_strt_wid;
202 u32 tmds_transmitter_cntl;
204 /* Computed values for PLL */
214 /* Computed values for PLL2 */
215 u32 dot_clock_freq_2;
232 int hOver_plus, hSync_width, hblank;
233 int vOver_plus, vSync_width, vblank;
234 int hAct_high, vAct_high, interlaced;
236 int use_bios_dividers;
242 struct radeonfb_info;
244 #ifdef CONFIG_FB_RADEON_I2C
245 struct radeon_i2c_chan {
246 struct radeonfb_info *rinfo;
248 struct i2c_adapter adapter;
249 struct i2c_algo_bit_data algo;
253 struct radeonfb_info {
254 struct fb_info *info;
256 struct radeon_regs state;
257 struct radeon_regs init_state;
259 char name[DEVICE_NAME_SIZE];
262 unsigned long mmio_base_phys;
263 unsigned long fb_base_phys;
265 void __iomem *mmio_base;
266 void __iomem *fb_base;
268 unsigned long fb_local_base;
270 struct pci_dev *pdev;
272 void __iomem *bios_seg;
275 u32 pseudo_palette[17];
276 struct { u8 red, green, blue, pad; }
282 unsigned long video_ram;
283 unsigned long mapped_vram;
285 int pitch, bpp, depth;
290 int R300_cg_workaround;
293 struct panel_info panel_info;
296 struct fb_videomode *mon1_modedb;
301 u32 dp_gui_master_cntl;
314 /* Lock on register access */
317 /* Timer used for delayed LVDS operations */
318 struct timer_list lvds_timer;
319 u32 pending_lvds_gen_cntl;
320 u32 pending_pixclks_cntl;
322 #ifdef CONFIG_FB_RADEON_I2C
323 struct radeon_i2c_chan i2c[4];
328 #define PRIMARY_MONITOR(rinfo) (rinfo->mon1_type)
334 #ifdef CONFIG_FB_RADEON_DEBUG
341 #define RTRACE printk
343 #define RTRACE if(0) printk
351 #define INREG8(addr) readb((rinfo->mmio_base)+addr)
352 #define OUTREG8(addr,val) writeb(val, (rinfo->mmio_base)+addr)
353 #define INREG(addr) readl((rinfo->mmio_base)+addr)
354 #define OUTREG(addr,val) writel(val, (rinfo->mmio_base)+addr)
356 static inline void R300_cg_workardound(struct radeonfb_info *rinfo)
359 save = INREG(CLOCK_CNTL_INDEX);
360 tmp = save & ~(0x3f | PLL_WR_EN);
361 OUTREG(CLOCK_CNTL_INDEX, tmp);
362 tmp = INREG(CLOCK_CNTL_DATA);
363 OUTREG(CLOCK_CNTL_INDEX, save);
366 #define __OUTPLL(addr,val) \
368 OUTREG8(CLOCK_CNTL_INDEX, (addr & 0x0000003f) | 0x00000080); \
369 OUTREG(CLOCK_CNTL_DATA, val); \
373 static inline u32 __INPLL(struct radeonfb_info *rinfo, u32 addr)
376 OUTREG8(CLOCK_CNTL_INDEX, addr & 0x0000003f);
377 data = (INREG(CLOCK_CNTL_DATA));
378 if (rinfo->R300_cg_workaround)
379 R300_cg_workardound(rinfo);
383 static inline u32 _INPLL(struct radeonfb_info *rinfo, u32 addr)
388 spin_lock_irqsave(&rinfo->reg_lock, flags);
389 data = __INPLL(rinfo, addr);
390 spin_unlock_irqrestore(&rinfo->reg_lock, flags);
394 #define INPLL(addr) _INPLL(rinfo, addr)
396 #define OUTPLL(addr,val) \
398 unsigned long flags;\
399 spin_lock_irqsave(&rinfo->reg_lock, flags); \
400 __OUTPLL(addr, val); \
401 spin_unlock_irqrestore(&rinfo->reg_lock, flags); \
404 #define OUTPLLP(addr,val,mask) \
406 unsigned long flags; \
408 spin_lock_irqsave(&rinfo->reg_lock, flags); \
409 _tmp = __INPLL(rinfo,addr); \
412 __OUTPLL(addr, _tmp); \
413 spin_unlock_irqrestore(&rinfo->reg_lock, flags); \
416 #define OUTREGP(addr,val,mask) \
418 unsigned long flags; \
420 spin_lock_irqsave(&rinfo->reg_lock, flags); \
421 _tmp = INREG(addr); \
424 OUTREG(addr, _tmp); \
425 spin_unlock_irqrestore(&rinfo->reg_lock, flags); \
428 #define MS_TO_HZ(ms) ((ms * HZ + 999) / 1000)
430 #define BIOS_IN8(v) (readb(rinfo->bios_seg + (v)))
431 #define BIOS_IN16(v) (readb(rinfo->bios_seg + (v)) | \
432 (readb(rinfo->bios_seg + (v) + 1) << 8))
433 #define BIOS_IN32(v) (readb(rinfo->bios_seg + (v)) | \
434 (readb(rinfo->bios_seg + (v) + 1) << 8) | \
435 (readb(rinfo->bios_seg + (v) + 2) << 16) | \
436 (readb(rinfo->bios_seg + (v) + 3) << 24))
441 static inline int round_div(int num, int den)
443 return (num + (den / 2)) / den;
446 static inline int var_to_depth(const struct fb_var_screeninfo *var)
448 if (var->bits_per_pixel != 16)
449 return var->bits_per_pixel;
450 return (var->green.length == 5) ? 15 : 16;
453 static inline u32 radeon_get_dstbpp(u16 depth)
470 * 2D Engine helper routines
472 static inline void radeon_engine_flush (struct radeonfb_info *rinfo)
477 OUTREGP(RB2D_DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL,
480 for (i=0; i < 2000000; i++) {
481 if (!(INREG(RB2D_DSTCACHE_CTLSTAT) & RB2D_DC_BUSY))
485 printk(KERN_ERR "radeonfb: Flush Timeout !\n");
489 static inline void _radeon_fifo_wait (struct radeonfb_info *rinfo, int entries)
493 for (i=0; i<2000000; i++) {
494 if ((INREG(RBBM_STATUS) & 0x7f) >= entries)
498 printk(KERN_ERR "radeonfb: FIFO Timeout !\n");
502 static inline void _radeon_engine_idle (struct radeonfb_info *rinfo)
506 /* ensure FIFO is empty before waiting for idle */
507 _radeon_fifo_wait (rinfo, 64);
509 for (i=0; i<2000000; i++) {
510 if (((INREG(RBBM_STATUS) & GUI_ACTIVE)) == 0) {
511 radeon_engine_flush (rinfo);
516 printk(KERN_ERR "radeonfb: Idle Timeout !\n");
519 #define radeon_engine_idle() _radeon_engine_idle(rinfo)
520 #define radeon_fifo_wait(entries) _radeon_fifo_wait(rinfo,entries)
524 extern void radeon_create_i2c_busses(struct radeonfb_info *rinfo);
525 extern void radeon_delete_i2c_busses(struct radeonfb_info *rinfo);
526 extern int radeon_probe_i2c_connector(struct radeonfb_info *rinfo, int conn, u8 **out_edid);
529 extern void radeon_pm_disable_dynamic_mode(struct radeonfb_info *rinfo);
530 extern void radeon_pm_enable_dynamic_mode(struct radeonfb_info *rinfo);
531 extern int radeonfb_pci_suspend(struct pci_dev *pdev, u32 state);
532 extern int radeonfb_pci_resume(struct pci_dev *pdev);
534 /* Monitor probe functions */
535 extern void radeon_probe_screens(struct radeonfb_info *rinfo,
536 const char *monitor_layout, int ignore_edid);
537 extern void radeon_check_modes(struct radeonfb_info *rinfo, const char *mode_option);
538 extern int radeon_match_mode(struct radeonfb_info *rinfo,
539 struct fb_var_screeninfo *dest,
540 const struct fb_var_screeninfo *src);
542 /* Accel functions */
543 extern void radeonfb_fillrect(struct fb_info *info, const struct fb_fillrect *region);
544 extern void radeonfb_copyarea(struct fb_info *info, const struct fb_copyarea *area);
545 extern void radeonfb_imageblit(struct fb_info *p, const struct fb_image *image);
546 extern int radeonfb_sync(struct fb_info *info);
547 extern void radeonfb_engine_init (struct radeonfb_info *rinfo);
548 extern void radeonfb_engine_reset(struct radeonfb_info *rinfo);
550 /* Other functions */
551 extern int radeonfb_blank(int blank, struct fb_info *info);
552 extern int radeonfb_set_par(struct fb_info *info);
554 #endif /* __RADEONFB_H__ */