2 * linux/drivers/video/neofb.c -- NeoMagic Framebuffer Driver
4 * Copyright (c) 2001-2002 Denis Oliver Kropp <dok@directfb.org>
7 * Card specific code is based on XFree86's neomagic driver.
8 * Framebuffer framework code is based on code of cyber2000fb.
10 * This file is subject to the terms and conditions of the GNU General
11 * Public License. See the file COPYING in the main directory of this
12 * archive for more details.
16 * - Cosmetic changes (dok)
19 * - Toshiba Libretto support, allow modes larger than LCD size if
20 * LCD is disabled, keep BIOS settings if internal/external display
21 * haven't been enabled explicitly
22 * (Thomas J. Moore <dark@mama.indstate.edu>)
25 * - Porting over to new fbdev api. (jsimmons)
28 * - got rid of all floating point (dok)
31 * - added module license (dok)
34 * - hardware accelerated clear and move for 2200 and above (dok)
35 * - maximum allowed dotclock is handled now (dok)
38 * - correct panning after X usage (dok)
39 * - added module and kernel parameters (dok)
40 * - no stretching if external display is enabled (dok)
43 * - initial version (dok)
47 * - ioctl for internal/external switching
49 * - 32bit depth support, maybe impossible
50 * - disable pan-on-sync, need specs
53 * - white margin on bootup like with tdfxfb (colormap problem?)
57 #include <linux/config.h>
58 #include <linux/module.h>
59 #include <linux/kernel.h>
60 #include <linux/errno.h>
61 #include <linux/string.h>
63 #include <linux/tty.h>
64 #include <linux/slab.h>
65 #include <linux/delay.h>
67 #include <linux/pci.h>
68 #include <linux/init.h>
70 #include <linux/toshiba.h>
71 extern int tosh_smm(SMMRegisters *regs);
76 #include <asm/pgtable.h>
77 #include <asm/system.h>
78 #include <asm/uaccess.h>
84 #include <video/vga.h>
85 #include <video/neomagic.h>
87 #define NEOFB_VERSION "0.4.2"
89 /* --------------------------------------------------------------------- */
95 static int nopciburst;
100 MODULE_AUTHOR("(c) 2001-2002 Denis Oliver Kropp <dok@convergence.de>");
101 MODULE_LICENSE("GPL");
102 MODULE_DESCRIPTION("FBDev driver for NeoMagic PCI Chips");
103 MODULE_PARM(internal, "i");
104 MODULE_PARM_DESC(internal, "Enable output on internal LCD Display.");
105 MODULE_PARM(external, "i");
106 MODULE_PARM_DESC(external, "Enable output on external CRT.");
107 MODULE_PARM(libretto, "i");
108 MODULE_PARM_DESC(libretto, "Force Libretto 100/110 800x480 LCD.");
109 MODULE_PARM(nostretch, "i");
110 MODULE_PARM_DESC(nostretch,
111 "Disable stretching of modes smaller than LCD.");
112 MODULE_PARM(nopciburst, "i");
113 MODULE_PARM_DESC(nopciburst, "Disable PCI burst mode.");
118 /* --------------------------------------------------------------------- */
120 static biosMode bios8[] = {
129 static biosMode bios16[] = {
138 static biosMode bios24[] = {
144 #ifdef NO_32BIT_SUPPORT_YET
145 /* FIXME: guessed values, wrong */
146 static biosMode bios32[] = {
153 static inline u32 read_le32(int regindex, const struct neofb_par *par)
155 return readl(par->neo2200 + par->cursorOff + regindex);
158 static inline void write_le32(int regindex, u32 val, const struct neofb_par *par)
160 writel(val, par->neo2200 + par->cursorOff + regindex);
163 static int neoFindMode(int xres, int yres, int depth)
171 size = sizeof(bios8) / sizeof(biosMode);
175 size = sizeof(bios16) / sizeof(biosMode);
179 size = sizeof(bios24) / sizeof(biosMode);
182 #ifdef NO_32BIT_SUPPORT_YET
184 size = sizeof(bios32) / sizeof(biosMode);
192 for (i = 0; i < size; i++) {
193 if (xres <= mode[i].x_res) {
194 xres_s = mode[i].x_res;
195 for (; i < size; i++) {
196 if (mode[i].x_res != xres_s)
197 return mode[i - 1].mode;
198 if (yres <= mode[i].y_res)
203 return mode[size - 1].mode;
209 * Determine the closest clock frequency to the one requested.
211 #define REF_FREQ 0xe517 /* 14.31818 in 20.12 fixed point */
216 static void neoCalcVCLK(const struct fb_info *info,
217 struct neofb_par *par, long freq)
220 int n_best = 0, d_best = 0, f_best = 0;
221 long f_best_diff = (0x7ffff << 12); /* 20.12 */
222 long f_target = (freq << 12) / 1000; /* 20.12 */
224 for (f = 0; f <= MAX_F; f++)
225 for (n = 0; n <= MAX_N; n++)
226 for (d = 0; d <= MAX_D; d++) {
227 long f_out; /* 20.12 */
228 long f_diff; /* 20.12 */
231 ((((n + 1) << 12) / ((d +
235 f_diff = abs(f_out - f_target);
236 if (f_diff < f_best_diff) {
237 f_best_diff = f_diff;
244 if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
245 info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
246 info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
247 info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
248 /* NOT_DONE: We are trying the full range of the 2200 clock.
249 We should be able to try n up to 2047 */
250 par->VCLK3NumeratorLow = n_best;
251 par->VCLK3NumeratorHigh = (f_best << 7);
253 par->VCLK3NumeratorLow = n_best | (f_best << 7);
255 par->VCLK3Denominator = d_best;
258 printk("neoVCLK: f:%d NumLow=%d NumHi=%d Den=%d Df=%d\n",
260 par->VCLK3NumeratorLow,
261 par->VCLK3NumeratorHigh,
262 par->VCLK3Denominator, f_best_diff >> 12);
268 * Handle the initialization, etc. of a screen.
269 * Return FALSE on failure.
272 static int vgaHWInit(const struct fb_var_screeninfo *var,
273 const struct fb_info *info,
274 struct neofb_par *par, struct xtimings *timings)
276 par->MiscOutReg = 0x23;
278 if (!(timings->sync & FB_SYNC_HOR_HIGH_ACT))
279 par->MiscOutReg |= 0x40;
281 if (!(timings->sync & FB_SYNC_VERT_HIGH_ACT))
282 par->MiscOutReg |= 0x80;
287 par->Sequencer[0] = 0x00;
288 par->Sequencer[1] = 0x01;
289 par->Sequencer[2] = 0x0F;
290 par->Sequencer[3] = 0x00; /* Font select */
291 par->Sequencer[4] = 0x0E; /* Misc */
296 par->CRTC[0] = (timings->HTotal >> 3) - 5;
297 par->CRTC[1] = (timings->HDisplay >> 3) - 1;
298 par->CRTC[2] = (timings->HDisplay >> 3) - 1;
299 par->CRTC[3] = (((timings->HTotal >> 3) - 1) & 0x1F) | 0x80;
300 par->CRTC[4] = (timings->HSyncStart >> 3);
301 par->CRTC[5] = ((((timings->HTotal >> 3) - 1) & 0x20) << 2)
302 | (((timings->HSyncEnd >> 3)) & 0x1F);
303 par->CRTC[6] = (timings->VTotal - 2) & 0xFF;
304 par->CRTC[7] = (((timings->VTotal - 2) & 0x100) >> 8)
305 | (((timings->VDisplay - 1) & 0x100) >> 7)
306 | ((timings->VSyncStart & 0x100) >> 6)
307 | (((timings->VDisplay - 1) & 0x100) >> 5)
308 | 0x10 | (((timings->VTotal - 2) & 0x200) >> 4)
309 | (((timings->VDisplay - 1) & 0x200) >> 3)
310 | ((timings->VSyncStart & 0x200) >> 2);
312 par->CRTC[9] = (((timings->VDisplay - 1) & 0x200) >> 4) | 0x40;
314 if (timings->dblscan)
315 par->CRTC[9] |= 0x80;
317 par->CRTC[10] = 0x00;
318 par->CRTC[11] = 0x00;
319 par->CRTC[12] = 0x00;
320 par->CRTC[13] = 0x00;
321 par->CRTC[14] = 0x00;
322 par->CRTC[15] = 0x00;
323 par->CRTC[16] = timings->VSyncStart & 0xFF;
324 par->CRTC[17] = (timings->VSyncEnd & 0x0F) | 0x20;
325 par->CRTC[18] = (timings->VDisplay - 1) & 0xFF;
326 par->CRTC[19] = var->xres_virtual >> 4;
327 par->CRTC[20] = 0x00;
328 par->CRTC[21] = (timings->VDisplay - 1) & 0xFF;
329 par->CRTC[22] = (timings->VTotal - 1) & 0xFF;
330 par->CRTC[23] = 0xC3;
331 par->CRTC[24] = 0xFF;
334 * are these unnecessary?
335 * vgaHWHBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
336 * vgaHWVBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
340 * Graphics Display Controller
342 par->Graphics[0] = 0x00;
343 par->Graphics[1] = 0x00;
344 par->Graphics[2] = 0x00;
345 par->Graphics[3] = 0x00;
346 par->Graphics[4] = 0x00;
347 par->Graphics[5] = 0x40;
348 par->Graphics[6] = 0x05; /* only map 64k VGA memory !!!! */
349 par->Graphics[7] = 0x0F;
350 par->Graphics[8] = 0xFF;
353 par->Attribute[0] = 0x00; /* standard colormap translation */
354 par->Attribute[1] = 0x01;
355 par->Attribute[2] = 0x02;
356 par->Attribute[3] = 0x03;
357 par->Attribute[4] = 0x04;
358 par->Attribute[5] = 0x05;
359 par->Attribute[6] = 0x06;
360 par->Attribute[7] = 0x07;
361 par->Attribute[8] = 0x08;
362 par->Attribute[9] = 0x09;
363 par->Attribute[10] = 0x0A;
364 par->Attribute[11] = 0x0B;
365 par->Attribute[12] = 0x0C;
366 par->Attribute[13] = 0x0D;
367 par->Attribute[14] = 0x0E;
368 par->Attribute[15] = 0x0F;
369 par->Attribute[16] = 0x41;
370 par->Attribute[17] = 0xFF;
371 par->Attribute[18] = 0x0F;
372 par->Attribute[19] = 0x00;
373 par->Attribute[20] = 0x00;
377 static void vgaHWLock(struct vgastate *state)
379 /* Protect CRTC[0-7] */
380 vga_wcrt(state->vgabase, 0x11, vga_rcrt(state->vgabase, 0x11) | 0x80);
383 static void vgaHWUnlock(void)
385 /* Unprotect CRTC[0-7] */
386 vga_wcrt(NULL, 0x11, vga_rcrt(NULL, 0x11) & ~0x80);
389 static void neoLock(struct vgastate *state)
391 vga_wgfx(state->vgabase, 0x09, 0x00);
395 static void neoUnlock(void)
398 vga_wgfx(NULL, 0x09, 0x26);
402 * VGA Palette management
404 static int paletteEnabled = 0;
406 inline void VGAenablePalette(void)
408 vga_r(NULL, VGA_IS1_RC);
409 vga_w(NULL, VGA_ATT_W, 0x00);
413 inline void VGAdisablePalette(void)
415 vga_r(NULL, VGA_IS1_RC);
416 vga_w(NULL, VGA_ATT_W, 0x20);
420 inline void VGAwATTR(u8 index, u8 value)
427 vga_r(NULL, VGA_IS1_RC);
428 vga_wattr(NULL, index, value);
431 void vgaHWProtect(int on)
437 * Turn off screen and disable sequencer.
439 tmp = vga_rseq(NULL, 0x01);
440 vga_wseq(NULL, 0x00, 0x01); /* Synchronous Reset */
441 vga_wseq(NULL, 0x01, tmp | 0x20); /* disable the display */
446 * Reenable sequencer, then turn on screen.
448 tmp = vga_rseq(NULL, 0x01);
449 vga_wseq(NULL, 0x01, tmp & ~0x20); /* reenable display */
450 vga_wseq(NULL, 0x00, 0x03); /* clear synchronousreset */
456 static void vgaHWRestore(const struct fb_info *info,
457 const struct neofb_par *par)
461 vga_w(NULL, VGA_MIS_W, par->MiscOutReg);
463 for (i = 1; i < 5; i++)
464 vga_wseq(NULL, i, par->Sequencer[i]);
466 /* Ensure CRTC registers 0-7 are unlocked by clearing bit 7 or CRTC[17] */
467 vga_wcrt(NULL, 17, par->CRTC[17] & ~0x80);
469 for (i = 0; i < 25; i++)
470 vga_wcrt(NULL, i, par->CRTC[i]);
472 for (i = 0; i < 9; i++)
473 vga_wgfx(NULL, i, par->Graphics[i]);
477 for (i = 0; i < 21; i++)
478 VGAwATTR(i, par->Attribute[i]);
484 /* -------------------- Hardware specific routines ------------------------- */
487 * Hardware Acceleration for Neo2200+
489 static inline int neo2200_sync(struct fb_info *info)
491 struct neofb_par *par = (struct neofb_par *) info->par;
494 while (par->neo2200->bltStat & 1)
499 static inline void neo2200_wait_fifo(struct fb_info *info,
500 int requested_fifo_space)
502 // ndev->neo.waitfifo_calls++;
503 // ndev->neo.waitfifo_sum += requested_fifo_space;
505 /* FIXME: does not work
506 if (neo_fifo_space < requested_fifo_space)
508 neo_fifo_waitcycles++;
512 neo_fifo_space = (neo2200->bltStat >> 8);
513 if (neo_fifo_space >= requested_fifo_space)
519 neo_fifo_cache_hits++;
522 neo_fifo_space -= requested_fifo_space;
528 static inline void neo2200_accel_init(struct fb_info *info,
529 struct fb_var_screeninfo *var)
531 struct neofb_par *par = (struct neofb_par *) info->par;
532 Neo2200 *neo2200 = par->neo2200;
537 switch (var->bits_per_pixel) {
539 bltMod = NEO_MODE1_DEPTH8;
540 pitch = var->xres_virtual;
544 bltMod = NEO_MODE1_DEPTH16;
545 pitch = var->xres_virtual * 2;
549 "neofb: neo2200_accel_init: unexpected bits per pixel!\n");
553 neo2200->bltStat = bltMod << 16;
554 neo2200->pitch = (pitch << 16) | pitch;
557 /* --------------------------------------------------------------------- */
560 neofb_open(struct fb_info *info, int user)
562 struct neofb_par *par = (struct neofb_par *) info->par;
563 int cnt = atomic_read(&par->ref_count);
566 memset(&par->state, 0, sizeof(struct vgastate));
567 par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS;
568 save_vga(&par->state);
570 atomic_inc(&par->ref_count);
575 neofb_release(struct fb_info *info, int user)
577 struct neofb_par *par = (struct neofb_par *) info->par;
578 int cnt = atomic_read(&par->ref_count);
583 restore_vga(&par->state);
585 atomic_dec(&par->ref_count);
590 neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
592 struct neofb_par *par = (struct neofb_par *) info->par;
593 unsigned int pixclock = var->pixclock;
594 struct xtimings timings;
598 DBG("neofb_check_var");
601 pixclock = 10000; /* 10ns = 100MHz */
602 timings.pixclock = 1000000000 / pixclock;
603 if (timings.pixclock < 1)
604 timings.pixclock = 1;
606 if (timings.pixclock > par->maxClock)
609 timings.dblscan = var->vmode & FB_VMODE_DOUBLE;
610 timings.interlaced = var->vmode & FB_VMODE_INTERLACED;
611 timings.HDisplay = var->xres;
612 timings.HSyncStart = timings.HDisplay + var->right_margin;
613 timings.HSyncEnd = timings.HSyncStart + var->hsync_len;
614 timings.HTotal = timings.HSyncEnd + var->left_margin;
615 timings.VDisplay = var->yres;
616 timings.VSyncStart = timings.VDisplay + var->lower_margin;
617 timings.VSyncEnd = timings.VSyncStart + var->vsync_len;
618 timings.VTotal = timings.VSyncEnd + var->upper_margin;
619 timings.sync = var->sync;
621 /* Is the mode larger than the LCD panel? */
622 if (par->internal_display &&
623 ((var->xres > par->NeoPanelWidth) ||
624 (var->yres > par->NeoPanelHeight))) {
626 "Mode (%dx%d) larger than the LCD panel (%dx%d)\n",
627 var->xres, var->yres, par->NeoPanelWidth,
628 par->NeoPanelHeight);
632 /* Is the mode one of the acceptable sizes? */
633 if (!par->internal_display)
638 if (var->yres == 1024)
642 if (var->yres == 768)
646 if (var->yres == (par->libretto ? 480 : 600))
650 if (var->yres == 480)
658 "Mode (%dx%d) won't display properly on LCD\n",
659 var->xres, var->yres);
663 var->red.msb_right = 0;
664 var->green.msb_right = 0;
665 var->blue.msb_right = 0;
667 switch (var->bits_per_pixel) {
668 case 8: /* PSEUDOCOLOUR, 256 */
669 var->transp.offset = 0;
670 var->transp.length = 0;
673 var->green.offset = 0;
674 var->green.length = 8;
675 var->blue.offset = 0;
676 var->blue.length = 8;
679 case 16: /* DIRECTCOLOUR, 64k */
680 var->transp.offset = 0;
681 var->transp.length = 0;
682 var->red.offset = 11;
684 var->green.offset = 5;
685 var->green.length = 6;
686 var->blue.offset = 0;
687 var->blue.length = 5;
690 case 24: /* TRUECOLOUR, 16m */
691 var->transp.offset = 0;
692 var->transp.length = 0;
693 var->red.offset = 16;
695 var->green.offset = 8;
696 var->green.length = 8;
697 var->blue.offset = 0;
700 #ifdef NO_32BIT_SUPPORT_YET
701 case 32: /* TRUECOLOUR, 16m */
702 var->transp.offset = 24;
703 var->transp.length = 8;
704 var->red.offset = 16;
706 var->green.offset = 8;
707 var->green.length = 8;
708 var->blue.offset = 0;
709 var->blue.length = 8;
713 printk(KERN_WARNING "neofb: no support for %dbpp\n",
714 var->bits_per_pixel);
718 vramlen = info->fix.smem_len;
719 if (vramlen > 4 * 1024 * 1024)
720 vramlen = 4 * 1024 * 1024;
722 if (var->yres_virtual < var->yres)
723 var->yres_virtual = var->yres;
724 if (var->xres_virtual < var->xres)
725 var->xres_virtual = var->xres;
727 memlen = var->xres_virtual * var->bits_per_pixel * var->yres_virtual >> 3;
729 if (memlen > vramlen) {
730 var->yres_virtual = vramlen * 8 / (var->xres_virtual *
731 var->bits_per_pixel);
732 memlen = var->xres_virtual * var->bits_per_pixel *
733 var->yres_virtual / 8;
736 /* we must round yres/xres down, we already rounded y/xres_virtual up
737 if it was possible. We should return -EINVAL, but I disagree */
738 if (var->yres_virtual < var->yres)
739 var->yres = var->yres_virtual;
740 if (var->xres_virtual < var->xres)
741 var->xres = var->xres_virtual;
742 if (var->xoffset + var->xres > var->xres_virtual)
743 var->xoffset = var->xres_virtual - var->xres;
744 if (var->yoffset + var->yres > var->yres_virtual)
745 var->yoffset = var->yres_virtual - var->yres;
751 if (var->bits_per_pixel >= 24 || !par->neo2200)
752 var->accel_flags &= ~FB_ACCELF_TEXT;
756 static int neofb_set_par(struct fb_info *info)
758 struct neofb_par *par = (struct neofb_par *) info->par;
759 struct xtimings timings;
763 int hoffset, voffset;
765 DBG("neofb_set_par");
769 vgaHWProtect(1); /* Blank the screen */
771 timings.dblscan = info->var.vmode & FB_VMODE_DOUBLE;
772 timings.interlaced = info->var.vmode & FB_VMODE_INTERLACED;
773 timings.HDisplay = info->var.xres;
774 timings.HSyncStart = timings.HDisplay + info->var.right_margin;
775 timings.HSyncEnd = timings.HSyncStart + info->var.hsync_len;
776 timings.HTotal = timings.HSyncEnd + info->var.left_margin;
777 timings.VDisplay = info->var.yres;
778 timings.VSyncStart = timings.VDisplay + info->var.lower_margin;
779 timings.VSyncEnd = timings.VSyncStart + info->var.vsync_len;
780 timings.VTotal = timings.VSyncEnd + info->var.upper_margin;
781 timings.sync = info->var.sync;
782 timings.pixclock = PICOS2KHZ(info->var.pixclock);
784 if (timings.pixclock < 1)
785 timings.pixclock = 1;
788 * This will allocate the datastructure and initialize all of the
789 * generic VGA registers.
792 if (vgaHWInit(&info->var, info, par, &timings))
796 * The default value assigned by vgaHW.c is 0x41, but this does
797 * not work for NeoMagic.
799 par->Attribute[16] = 0x01;
801 switch (info->var.bits_per_pixel) {
803 par->CRTC[0x13] = info->var.xres_virtual >> 3;
804 par->ExtCRTOffset = info->var.xres_virtual >> 11;
805 par->ExtColorModeSelect = 0x11;
808 par->CRTC[0x13] = info->var.xres_virtual >> 2;
809 par->ExtCRTOffset = info->var.xres_virtual >> 10;
810 par->ExtColorModeSelect = 0x13;
813 par->CRTC[0x13] = (info->var.xres_virtual * 3) >> 3;
814 par->ExtCRTOffset = (info->var.xres_virtual * 3) >> 11;
815 par->ExtColorModeSelect = 0x14;
817 #ifdef NO_32BIT_SUPPORT_YET
818 case 32: /* FIXME: guessed values */
819 par->CRTC[0x13] = info->var.xres_virtual >> 1;
820 par->ExtCRTOffset = info->var.xres_virtual >> 9;
821 par->ExtColorModeSelect = 0x15;
828 par->ExtCRTDispAddr = 0x10;
830 /* Vertical Extension */
831 par->VerticalExt = (((timings.VTotal - 2) & 0x400) >> 10)
832 | (((timings.VDisplay - 1) & 0x400) >> 9)
833 | (((timings.VSyncStart) & 0x400) >> 8)
834 | (((timings.VSyncStart) & 0x400) >> 7);
836 /* Fast write bursts on unless disabled. */
838 par->SysIfaceCntl1 = 0x30;
840 par->SysIfaceCntl1 = 0x00;
842 par->SysIfaceCntl2 = 0xc0; /* VESA Bios sets this to 0x80! */
844 /* Enable any user specified display devices. */
845 par->PanelDispCntlReg1 = 0x00;
846 if (par->internal_display)
847 par->PanelDispCntlReg1 |= 0x02;
848 if (par->external_display)
849 par->PanelDispCntlReg1 |= 0x01;
851 /* If the user did not specify any display devices, then... */
852 if (par->PanelDispCntlReg1 == 0x00) {
853 /* Default to internal (i.e., LCD) only. */
854 par->PanelDispCntlReg1 |= 0x02;
857 /* If we are using a fixed mode, then tell the chip we are. */
858 switch (info->var.xres) {
860 par->PanelDispCntlReg1 |= 0x60;
863 par->PanelDispCntlReg1 |= 0x40;
866 par->PanelDispCntlReg1 |= 0x20;
873 /* Setup shadow register locking. */
874 switch (par->PanelDispCntlReg1 & 0x03) {
875 case 0x01: /* External CRT only mode: */
876 par->GeneralLockReg = 0x00;
877 /* We need to program the VCLK for external display only mode. */
878 par->ProgramVCLK = 1;
880 case 0x02: /* Internal LCD only mode: */
881 case 0x03: /* Simultaneous internal/external (LCD/CRT) mode: */
882 par->GeneralLockReg = 0x01;
883 /* Don't program the VCLK when using the LCD. */
884 par->ProgramVCLK = 0;
889 * If the screen is to be stretched, turn on stretching for the
892 * OPTION_LCD_STRETCH means stretching should be turned off!
894 par->PanelDispCntlReg2 = 0x00;
895 par->PanelDispCntlReg3 = 0x00;
897 if (par->lcd_stretch && (par->PanelDispCntlReg1 == 0x02) && /* LCD only */
898 (info->var.xres != par->NeoPanelWidth)) {
899 switch (info->var.xres) {
900 case 320: /* Needs testing. KEM -- 24 May 98 */
901 case 400: /* Needs testing. KEM -- 24 May 98 */
906 par->PanelDispCntlReg2 |= 0xC6;
910 /* No stretching in these modes. */
916 * If the screen is to be centerd, turn on the centering for the
919 par->PanelVertCenterReg1 = 0x00;
920 par->PanelVertCenterReg2 = 0x00;
921 par->PanelVertCenterReg3 = 0x00;
922 par->PanelVertCenterReg4 = 0x00;
923 par->PanelVertCenterReg5 = 0x00;
924 par->PanelHorizCenterReg1 = 0x00;
925 par->PanelHorizCenterReg2 = 0x00;
926 par->PanelHorizCenterReg3 = 0x00;
927 par->PanelHorizCenterReg4 = 0x00;
928 par->PanelHorizCenterReg5 = 0x00;
931 if (par->PanelDispCntlReg1 & 0x02) {
932 if (info->var.xres == par->NeoPanelWidth) {
934 * No centering required when the requested display width
935 * equals the panel width.
938 par->PanelDispCntlReg2 |= 0x01;
939 par->PanelDispCntlReg3 |= 0x10;
941 /* Calculate the horizontal and vertical offsets. */
944 ((par->NeoPanelWidth -
945 info->var.xres) >> 4) - 1;
947 ((par->NeoPanelHeight -
948 info->var.yres) >> 1) - 2;
950 /* Stretched modes cannot be centered. */
955 switch (info->var.xres) {
956 case 320: /* Needs testing. KEM -- 24 May 98 */
957 par->PanelHorizCenterReg3 = hoffset;
958 par->PanelVertCenterReg2 = voffset;
960 case 400: /* Needs testing. KEM -- 24 May 98 */
961 par->PanelHorizCenterReg4 = hoffset;
962 par->PanelVertCenterReg1 = voffset;
965 par->PanelHorizCenterReg1 = hoffset;
966 par->PanelVertCenterReg3 = voffset;
969 par->PanelHorizCenterReg2 = hoffset;
970 par->PanelVertCenterReg4 = voffset;
973 par->PanelHorizCenterReg5 = hoffset;
974 par->PanelVertCenterReg5 = voffset;
978 /* No centering in these modes. */
985 neoFindMode(info->var.xres, info->var.yres,
986 info->var.bits_per_pixel);
989 * Calculate the VCLK that most closely matches the requested dot
992 neoCalcVCLK(info, par, timings.pixclock);
994 /* Since we program the clocks ourselves, always use VCLK3. */
995 par->MiscOutReg |= 0x0C;
997 /* linear colormap for non palettized modes */
998 switch (info->var.bits_per_pixel) {
1000 /* PseudoColor, 256 */
1001 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
1004 /* DirectColor, 64k */
1005 info->fix.visual = FB_VISUAL_DIRECTCOLOR;
1007 for (i = 0; i < 64; i++) {
1010 outb(i << 1, 0x3c9);
1012 outb(i << 1, 0x3c9);
1016 #ifdef NO_32BIT_SUPPORT_YET
1019 /* TrueColor, 16m */
1020 info->fix.visual = FB_VISUAL_TRUECOLOR;
1022 for (i = 0; i < 256; i++) {
1032 /* alread unlocked above */
1033 /* BOGUS vga_wgfx(NULL, 0x09, 0x26); */
1035 /* don't know what this is, but it's 0 from bootup anyway */
1036 vga_wgfx(NULL, 0x15, 0x00);
1038 /* was set to 0x01 by my bios in text and vesa modes */
1039 vga_wgfx(NULL, 0x0A, par->GeneralLockReg);
1042 * The color mode needs to be set before calling vgaHWRestore
1043 * to ensure the DAC is initialized properly.
1045 * NOTE: Make sure we don't change bits make sure we don't change
1046 * any reserved bits.
1048 temp = vga_rgfx(NULL, 0x90);
1049 switch (info->fix.accel) {
1050 case FB_ACCEL_NEOMAGIC_NM2070:
1051 temp &= 0xF0; /* Save bits 7:4 */
1052 temp |= (par->ExtColorModeSelect & ~0xF0);
1054 case FB_ACCEL_NEOMAGIC_NM2090:
1055 case FB_ACCEL_NEOMAGIC_NM2093:
1056 case FB_ACCEL_NEOMAGIC_NM2097:
1057 case FB_ACCEL_NEOMAGIC_NM2160:
1058 case FB_ACCEL_NEOMAGIC_NM2200:
1059 case FB_ACCEL_NEOMAGIC_NM2230:
1060 case FB_ACCEL_NEOMAGIC_NM2360:
1061 case FB_ACCEL_NEOMAGIC_NM2380:
1062 temp &= 0x70; /* Save bits 6:4 */
1063 temp |= (par->ExtColorModeSelect & ~0x70);
1067 vga_wgfx(NULL, 0x90, temp);
1070 * In some rare cases a lockup might occur if we don't delay
1071 * here. (Reported by Miles Lane)
1076 * Disable horizontal and vertical graphics and text expansions so
1077 * that vgaHWRestore works properly.
1079 temp = vga_rgfx(NULL, 0x25);
1081 vga_wgfx(NULL, 0x25, temp);
1084 * Sleep for 200ms to make sure that the two operations above have
1085 * had time to take effect.
1090 * This function handles restoring the generic VGA registers. */
1091 vgaHWRestore(info, par);
1093 vga_wgfx(NULL, 0x0E, par->ExtCRTDispAddr);
1094 vga_wgfx(NULL, 0x0F, par->ExtCRTOffset);
1095 temp = vga_rgfx(NULL, 0x10);
1096 temp &= 0x0F; /* Save bits 3:0 */
1097 temp |= (par->SysIfaceCntl1 & ~0x0F); /* VESA Bios sets bit 1! */
1098 vga_wgfx(NULL, 0x10, temp);
1100 vga_wgfx(NULL, 0x11, par->SysIfaceCntl2);
1101 vga_wgfx(NULL, 0x15, 0 /*par->SingleAddrPage */ );
1102 vga_wgfx(NULL, 0x16, 0 /*par->DualAddrPage */ );
1104 temp = vga_rgfx(NULL, 0x20);
1105 switch (info->fix.accel) {
1106 case FB_ACCEL_NEOMAGIC_NM2070:
1107 temp &= 0xFC; /* Save bits 7:2 */
1108 temp |= (par->PanelDispCntlReg1 & ~0xFC);
1110 case FB_ACCEL_NEOMAGIC_NM2090:
1111 case FB_ACCEL_NEOMAGIC_NM2093:
1112 case FB_ACCEL_NEOMAGIC_NM2097:
1113 case FB_ACCEL_NEOMAGIC_NM2160:
1114 temp &= 0xDC; /* Save bits 7:6,4:2 */
1115 temp |= (par->PanelDispCntlReg1 & ~0xDC);
1117 case FB_ACCEL_NEOMAGIC_NM2200:
1118 case FB_ACCEL_NEOMAGIC_NM2230:
1119 case FB_ACCEL_NEOMAGIC_NM2360:
1120 case FB_ACCEL_NEOMAGIC_NM2380:
1121 temp &= 0x98; /* Save bits 7,4:3 */
1122 temp |= (par->PanelDispCntlReg1 & ~0x98);
1125 vga_wgfx(NULL, 0x20, temp);
1127 temp = vga_rgfx(NULL, 0x25);
1128 temp &= 0x38; /* Save bits 5:3 */
1129 temp |= (par->PanelDispCntlReg2 & ~0x38);
1130 vga_wgfx(NULL, 0x25, temp);
1132 if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1133 temp = vga_rgfx(NULL, 0x30);
1134 temp &= 0xEF; /* Save bits 7:5 and bits 3:0 */
1135 temp |= (par->PanelDispCntlReg3 & ~0xEF);
1136 vga_wgfx(NULL, 0x30, temp);
1139 vga_wgfx(NULL, 0x28, par->PanelVertCenterReg1);
1140 vga_wgfx(NULL, 0x29, par->PanelVertCenterReg2);
1141 vga_wgfx(NULL, 0x2a, par->PanelVertCenterReg3);
1143 if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1144 vga_wgfx(NULL, 0x32, par->PanelVertCenterReg4);
1145 vga_wgfx(NULL, 0x33, par->PanelHorizCenterReg1);
1146 vga_wgfx(NULL, 0x34, par->PanelHorizCenterReg2);
1147 vga_wgfx(NULL, 0x35, par->PanelHorizCenterReg3);
1150 if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2160)
1151 vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
1153 if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1154 info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1155 info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1156 info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1157 vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
1158 vga_wgfx(NULL, 0x37, par->PanelVertCenterReg5);
1159 vga_wgfx(NULL, 0x38, par->PanelHorizCenterReg5);
1164 /* Program VCLK3 if needed. */
1165 if (par->ProgramVCLK && ((vga_rgfx(NULL, 0x9B) != par->VCLK3NumeratorLow)
1166 || (vga_rgfx(NULL, 0x9F) != par->VCLK3Denominator)
1167 || (clock_hi && ((vga_rgfx(NULL, 0x8F) & ~0x0f)
1168 != (par->VCLK3NumeratorHigh &
1170 vga_wgfx(NULL, 0x9B, par->VCLK3NumeratorLow);
1172 temp = vga_rgfx(NULL, 0x8F);
1173 temp &= 0x0F; /* Save bits 3:0 */
1174 temp |= (par->VCLK3NumeratorHigh & ~0x0F);
1175 vga_wgfx(NULL, 0x8F, temp);
1177 vga_wgfx(NULL, 0x9F, par->VCLK3Denominator);
1181 vga_wcrt(NULL, 0x23, par->biosMode);
1183 vga_wgfx(NULL, 0x93, 0xc0); /* Gives 5x faster framebuffer writes !!! */
1185 /* Program vertical extension register */
1186 if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1187 info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1188 info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1189 info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1190 vga_wcrt(NULL, 0x70, par->VerticalExt);
1193 vgaHWProtect(0); /* Turn on screen */
1195 /* Calling this also locks offset registers required in update_start */
1196 neoLock(&par->state);
1198 info->fix.line_length =
1199 info->var.xres_virtual * (info->var.bits_per_pixel >> 3);
1201 switch (info->fix.accel) {
1202 case FB_ACCEL_NEOMAGIC_NM2200:
1203 case FB_ACCEL_NEOMAGIC_NM2230:
1204 case FB_ACCEL_NEOMAGIC_NM2360:
1205 case FB_ACCEL_NEOMAGIC_NM2380:
1206 neo2200_accel_init(info, &info->var);
1214 static void neofb_update_start(struct fb_info *info,
1215 struct fb_var_screeninfo *var)
1217 struct neofb_par *par = (struct neofb_par *) info->par;
1218 struct vgastate *state = &par->state;
1219 int oldExtCRTDispAddr;
1222 DBG("neofb_update_start");
1224 Base = (var->yoffset * var->xres_virtual + var->xoffset) >> 2;
1225 Base *= (var->bits_per_pixel + 7) / 8;
1230 * These are the generic starting address registers.
1232 vga_wcrt(state->vgabase, 0x0C, (Base & 0x00FF00) >> 8);
1233 vga_wcrt(state->vgabase, 0x0D, (Base & 0x00FF));
1236 * Make sure we don't clobber some other bits that might already
1237 * have been set. NOTE: NM2200 has a writable bit 3, but it shouldn't
1240 oldExtCRTDispAddr = vga_rgfx(NULL, 0x0E);
1241 vga_wgfx(state->vgabase, 0x0E, (((Base >> 16) & 0x0f) | (oldExtCRTDispAddr & 0xf0)));
1247 * Pan or Wrap the Display
1249 static int neofb_pan_display(struct fb_var_screeninfo *var,
1250 struct fb_info *info)
1254 y_bottom = var->yoffset;
1256 if (!(var->vmode & FB_VMODE_YWRAP))
1257 y_bottom += var->yres;
1259 if (var->xoffset > (var->xres_virtual - var->xres))
1261 if (y_bottom > info->var.yres_virtual)
1264 neofb_update_start(info, var);
1266 info->var.xoffset = var->xoffset;
1267 info->var.yoffset = var->yoffset;
1269 if (var->vmode & FB_VMODE_YWRAP)
1270 info->var.vmode |= FB_VMODE_YWRAP;
1272 info->var.vmode &= ~FB_VMODE_YWRAP;
1276 static int neofb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
1277 u_int transp, struct fb_info *fb)
1282 switch (fb->var.bits_per_pixel) {
1286 outb(red >> 10, 0x3c9);
1287 outb(green >> 10, 0x3c9);
1288 outb(blue >> 10, 0x3c9);
1292 ((u16 *) fb->pseudo_palette)[regno] =
1293 ((red & 0xf800)) | ((green & 0xfc00) >> 5) |
1294 ((blue & 0xf800) >> 11);
1298 ((u32 *) fb->pseudo_palette)[regno] =
1299 ((red & 0xff00) << 8) | ((green & 0xff00)) |
1300 ((blue & 0xff00) >> 8);
1302 #ifdef NO_32BIT_SUPPORT_YET
1305 ((u32 *) fb->pseudo_palette)[regno] =
1306 ((transp & 0xff00) << 16) | ((red & 0xff00) <<
1309 ((blue & 0xff00) >> 8);
1319 * (Un)Blank the display.
1321 static int neofb_blank(int blank, struct fb_info *info)
1324 * Blank the screen if blank_mode != 0, else unblank. If
1325 * blank == NULL then the caller blanks by setting the CLUT
1326 * (Color Look Up Table) to all black. Return 0 if blanking
1327 * succeeded, != 0 if un-/blanking failed due to e.g. a
1328 * video mode which doesn't support it. Implements VESA
1329 * suspend and powerdown modes on hardware that supports
1330 * disabling hsync/vsync:
1331 * blank_mode == 2: suspend vsync
1332 * blank_mode == 3: suspend hsync
1333 * blank_mode == 4: powerdown
1335 * wms...Enable VESA DMPS compatible powerdown mode
1336 * run "setterm -powersave powerdown" to take advantage
1340 case 4: /* powerdown - both sync lines down */
1341 #ifdef CONFIG_TOSHIBA
1342 /* attempt to turn off backlight on toshiba; also turns off external */
1346 regs.eax = 0xff00; /* HCI_SET */
1347 regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1348 regs.ecx = 0x0000; /* HCI_DISABLE */
1353 case 3: /* hsync off */
1355 case 2: /* vsync off */
1357 case 1: /* just software blanking of screen */
1359 default: /* case 0, or anything else: unblank */
1360 #ifdef CONFIG_TOSHIBA
1361 /* attempt to re-enable backlight/external on toshiba */
1365 regs.eax = 0xff00; /* HCI_SET */
1366 regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1367 regs.ecx = 0x0001; /* HCI_ENABLE */
1377 neo2200_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1379 struct neofb_par *par = (struct neofb_par *) info->par;
1382 dst = rect->dx + rect->dy * info->var.xres_virtual;
1383 rop = rect->rop ? 0x060000 : 0x0c0000;
1385 neo2200_wait_fifo(info, 4);
1387 /* set blt control */
1388 par->neo2200->bltCntl = NEO_BC3_FIFO_EN |
1389 NEO_BC0_SRC_IS_FG | NEO_BC3_SKIP_MAPPING |
1390 // NEO_BC3_DST_XY_ADDR |
1391 // NEO_BC3_SRC_XY_ADDR |
1394 switch (info->var.bits_per_pixel) {
1396 par->neo2200->fgColor = rect->color;
1399 par->neo2200->fgColor =
1400 ((u16 *) (info->pseudo_palette))[rect->color];
1404 par->neo2200->dstStart =
1405 dst * ((info->var.bits_per_pixel + 7) >> 3);
1406 par->neo2200->xyExt =
1407 (rect->height << 16) | (rect->width & 0xffff);
1411 neo2200_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1413 u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy;
1414 struct neofb_par *par = (struct neofb_par *) info->par;
1415 u_long src, dst, bltCntl;
1417 bltCntl = NEO_BC3_FIFO_EN | NEO_BC3_SKIP_MAPPING | 0x0C0000;
1419 if ((dy > sy) || ((dy == sy) && (dx > sx))) {
1420 /* Start with the lower right corner */
1421 sy += (area->height - 1);
1422 dy += (area->height - 1);
1423 sx += (area->width - 1);
1424 dx += (area->width - 1);
1426 bltCntl |= NEO_BC0_X_DEC | NEO_BC0_DST_Y_DEC | NEO_BC0_SRC_Y_DEC;
1429 src = sx * (info->var.bits_per_pixel >> 3) + sy*info->fix.line_length;
1430 dst = dx * (info->var.bits_per_pixel >> 3) + dy*info->fix.line_length;
1432 neo2200_wait_fifo(info, 4);
1434 /* set blt control */
1435 par->neo2200->bltCntl = bltCntl;
1437 par->neo2200->srcStart = src;
1438 par->neo2200->dstStart = dst;
1439 par->neo2200->xyExt =
1440 (area->height << 16) | (area->width & 0xffff);
1445 neo2200_imageblit(struct fb_info *info, const struct fb_image *image)
1447 struct neofb_par *par = (struct neofb_par *) info->par;
1451 switch (info->var.bits_per_pixel) {
1453 par->neo2200->fgColor = image->fg_color;
1454 par->neo2200->bgColor = image->bg_color;
1457 par->neo2200->fgColor =
1458 ((u16 *) (info->pseudo_palette))[image->fg_color];
1459 par->neo2200->bgColor =
1460 ((u16 *) (info->pseudo_palette))[image->bg_color];
1464 par->neo2200->bltCntl = NEO_BC0_SYS_TO_VID |
1465 NEO_BC0_SRC_MONO | NEO_BC3_SKIP_MAPPING |
1466 // NEO_BC3_DST_XY_ADDR |
1469 par->neo2200->srcStart = 0;
1470 // par->neo2200->dstStart = (image->dy << 16) | (image->dx & 0xffff);
1471 par->neo2200->dstStart =
1472 ((image->dx & 0xffff) * (info->var.bits_per_pixel >> 3) +
1473 image->dy * info->fix.line_length);
1474 par->neo2200->xyExt =
1475 (image->height << 16) | (image->width & 0xffff);
1477 memcpy(par->mmio_vbase + 0x100000, image->data,
1478 (image->width * image->height) >> 3);
1483 neofb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1485 switch (info->fix.accel) {
1486 case FB_ACCEL_NEOMAGIC_NM2200:
1487 case FB_ACCEL_NEOMAGIC_NM2230:
1488 case FB_ACCEL_NEOMAGIC_NM2360:
1489 case FB_ACCEL_NEOMAGIC_NM2380:
1490 neo2200_fillrect(info, rect);
1493 cfb_fillrect(info, rect);
1499 neofb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1501 switch (info->fix.accel) {
1502 case FB_ACCEL_NEOMAGIC_NM2200:
1503 case FB_ACCEL_NEOMAGIC_NM2230:
1504 case FB_ACCEL_NEOMAGIC_NM2360:
1505 case FB_ACCEL_NEOMAGIC_NM2380:
1506 neo2200_copyarea(info, area);
1509 cfb_copyarea(info, area);
1515 neofb_imageblit(struct fb_info *info, const struct fb_image *image)
1518 if (image->depth == 1) {
1519 switch (info->fix.accel) {
1520 case FB_ACCEL_NEOMAGIC_NM2200:
1521 case FB_ACCEL_NEOMAGIC_NM2230:
1522 case FB_ACCEL_NEOMAGIC_NM2360:
1523 case FB_ACCEL_NEOMAGIC_NM2380:
1524 neo2200_imageblit(info, image);
1527 cfb_imageblit(info, image);
1532 cfb_imageblit(info, image);
1536 neofb_sync(struct fb_info *info)
1538 switch (info->fix.accel) {
1539 case FB_ACCEL_NEOMAGIC_NM2200:
1540 case FB_ACCEL_NEOMAGIC_NM2230:
1541 case FB_ACCEL_NEOMAGIC_NM2360:
1542 case FB_ACCEL_NEOMAGIC_NM2380:
1553 neofb_draw_cursor(struct fb_info *info, u8 *dst, u8 *src, unsigned int width)
1555 //memset_io(info->sprite.addr, 0xff, 1);
1559 neofb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1561 struct neofb_par *par = (struct neofb_par *) info->par;
1564 write_le32(NEOREG_CURSCNTL, ~NEO_CURS_ENABLE, par);
1566 if (cursor->set & FB_CUR_SETPOS) {
1567 u32 x = cursor->image.dx;
1568 u32 y = cursor->image.dy;
1570 info->cursor.image.dx = x;
1571 info->cursor.image.dy = y;
1572 write_le32(NEOREG_CURSX, x, par);
1573 write_le32(NEOREG_CURSY, y, par);
1576 if (cursor->set & FB_CUR_SETSIZE) {
1577 info->cursor.image.height = cursor->image.height;
1578 info->cursor.image.width = cursor->image.width;
1581 if (cursor->set & FB_CUR_SETHOT)
1582 info->cursor.hot = cursor->hot;
1584 if (cursor->set & FB_CUR_SETCMAP) {
1585 if (cursor->image.depth == 1) {
1586 u32 fg = cursor->image.fg_color;
1587 u32 bg = cursor->image.bg_color;
1589 info->cursor.image.fg_color = fg;
1590 info->cursor.image.bg_color = bg;
1592 fg = ((fg & 0xff0000) >> 16) | ((fg & 0xff) << 16) | (fg & 0xff00);
1593 bg = ((bg & 0xff0000) >> 16) | ((bg & 0xff) << 16) | (bg & 0xff00);
1594 write_le32(NEOREG_CURSFGCOLOR, fg, par);
1595 write_le32(NEOREG_CURSBGCOLOR, bg, par);
1599 if (cursor->set & FB_CUR_SETSHAPE)
1600 fb_load_cursor_image(info);
1602 if (info->cursor.enable)
1603 write_le32(NEOREG_CURSCNTL, NEO_CURS_ENABLE, par);
1608 static struct fb_ops neofb_ops = {
1609 .owner = THIS_MODULE,
1610 .fb_open = neofb_open,
1611 .fb_release = neofb_release,
1612 .fb_check_var = neofb_check_var,
1613 .fb_set_par = neofb_set_par,
1614 .fb_setcolreg = neofb_setcolreg,
1615 .fb_pan_display = neofb_pan_display,
1616 .fb_blank = neofb_blank,
1617 .fb_sync = neofb_sync,
1618 .fb_fillrect = neofb_fillrect,
1619 .fb_copyarea = neofb_copyarea,
1620 .fb_imageblit = neofb_imageblit,
1621 .fb_cursor = soft_cursor,
1624 /* --------------------------------------------------------------------- */
1626 static struct fb_var_screeninfo __devinitdata neofb_var640x480x8 = {
1627 .accel_flags = FB_ACCELF_TEXT,
1630 .xres_virtual = 640,
1631 .yres_virtual = 30000,
1632 .bits_per_pixel = 8,
1640 .vmode = FB_VMODE_NONINTERLACED
1643 static struct fb_var_screeninfo __devinitdata neofb_var800x600x8 = {
1644 .accel_flags = FB_ACCELF_TEXT,
1647 .xres_virtual = 800,
1648 .yres_virtual = 30000,
1649 .bits_per_pixel = 8,
1657 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1658 .vmode = FB_VMODE_NONINTERLACED
1661 static struct fb_var_screeninfo __devinitdata neofb_var800x480x8 = {
1662 .accel_flags = FB_ACCELF_TEXT,
1665 .xres_virtual = 800,
1666 .yres_virtual = 30000,
1667 .bits_per_pixel = 8,
1675 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1676 .vmode = FB_VMODE_NONINTERLACED
1679 static struct fb_var_screeninfo __devinitdata neofb_var1024x768x8 = {
1680 .accel_flags = FB_ACCELF_TEXT,
1683 .xres_virtual = 1024,
1684 .yres_virtual = 30000,
1685 .bits_per_pixel = 8,
1693 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1694 .vmode = FB_VMODE_NONINTERLACED
1698 static struct fb_var_screeninfo __devinitdata neofb_var1280x1024x8 = {
1699 .accel_flags = FB_ACCELF_TEXT,
1702 .xres_virtual = 1280,
1703 .yres_virtual = 30000,
1704 .bits_per_pixel = 8,
1712 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1713 .vmode = FB_VMODE_NONINTERLACED
1717 static int __devinit neo_map_mmio(struct fb_info *info,
1718 struct pci_dev *dev)
1720 struct neofb_par *par = (struct neofb_par *) info->par;
1722 DBG("neo_map_mmio");
1724 info->fix.mmio_start = pci_resource_start(dev, 1);
1725 info->fix.mmio_len = MMIO_SIZE;
1727 if (!request_mem_region
1728 (info->fix.mmio_start, MMIO_SIZE, "memory mapped I/O")) {
1729 printk("neofb: memory mapped IO in use\n");
1733 par->mmio_vbase = ioremap(info->fix.mmio_start, MMIO_SIZE);
1734 if (!par->mmio_vbase) {
1735 printk("neofb: unable to map memory mapped IO\n");
1736 release_mem_region(info->fix.mmio_start,
1737 info->fix.mmio_len);
1740 printk(KERN_INFO "neofb: mapped io at %p\n",
1745 static void neo_unmap_mmio(struct fb_info *info)
1747 struct neofb_par *par = (struct neofb_par *) info->par;
1749 DBG("neo_unmap_mmio");
1751 iounmap(par->mmio_vbase);
1752 par->mmio_vbase = NULL;
1754 release_mem_region(info->fix.mmio_start,
1755 info->fix.mmio_len);
1758 static int __devinit neo_map_video(struct fb_info *info,
1759 struct pci_dev *dev, int video_len)
1761 //unsigned long addr;
1763 DBG("neo_map_video");
1765 info->fix.smem_start = pci_resource_start(dev, 0);
1766 info->fix.smem_len = video_len;
1768 if (!request_mem_region(info->fix.smem_start, info->fix.smem_len,
1770 printk("neofb: frame buffer in use\n");
1775 ioremap(info->fix.smem_start, info->fix.smem_len);
1776 if (!info->screen_base) {
1777 printk("neofb: unable to map screen memory\n");
1778 release_mem_region(info->fix.smem_start,
1779 info->fix.smem_len);
1782 printk(KERN_INFO "neofb: mapped framebuffer at %p\n",
1786 ((struct neofb_par *)(info->par))->mtrr =
1787 mtrr_add(info->fix.smem_start, pci_resource_len(dev, 0),
1788 MTRR_TYPE_WRCOMB, 1);
1791 /* Clear framebuffer, it's all white in memory after boot */
1792 memset(info->screen_base, 0, info->fix.smem_len);
1794 /* Allocate Cursor drawing pad.
1795 info->fix.smem_len -= PAGE_SIZE;
1796 addr = info->fix.smem_start + info->fix.smem_len;
1797 write_le32(NEOREG_CURSMEMPOS, ((0x000f & (addr >> 10)) << 8) |
1798 ((0x0ff0 & (addr >> 10)) >> 4), par);
1799 addr = (unsigned long) info->screen_base + info->fix.smem_len;
1800 info->sprite.addr = (u8 *) addr; */
1804 static void neo_unmap_video(struct fb_info *info)
1807 struct neofb_par *par = (struct neofb_par *) info->par;
1809 mtrr_del(par->mtrr, info->fix.smem_start,
1810 info->fix.smem_len);
1812 iounmap(info->screen_base);
1813 info->screen_base = NULL;
1815 release_mem_region(info->fix.smem_start,
1816 info->fix.smem_len);
1819 static int __devinit neo_init_hw(struct fb_info *info)
1821 struct neofb_par *par = (struct neofb_par *) info->par;
1822 unsigned char type, display;
1824 int maxClock = 65000;
1825 int CursorMem = 1024;
1826 int CursorOff = 0x100;
1827 int linearSize = 1024;
1828 int maxWidth = 1024;
1829 int maxHeight = 1024;
1837 printk(KERN_DEBUG "--- Neo extended register dump ---\n");
1838 for (w = 0; w < 0x85; w++)
1839 printk(KERN_DEBUG "CR %p: %p\n", (void *) w,
1840 (void *) vga_rcrt(NULL, w);
1841 for (w = 0; w < 0xC7; w++)
1842 printk(KERN_DEBUG "GR %p: %p\n", (void *) w,
1843 (void *) vga_rgfx(NULL, w));
1846 /* Determine the panel type */
1847 vga_wgfx(NULL, 0x09, 0x26);
1848 type = vga_rgfx(NULL, 0x21);
1849 display = vga_rgfx(NULL, 0x20);
1850 if (!par->internal_display && !par->external_display) {
1851 par->internal_display = display & 2 || !(display & 3) ? 1 : 0;
1852 par->external_display = display & 1;
1853 printk (KERN_INFO "Autodetected %s display\n",
1854 par->internal_display && par->external_display ? "simultaneous" :
1855 par->internal_display ? "internal" : "external");
1858 /* Determine panel width -- used in NeoValidMode. */
1859 w = vga_rgfx(NULL, 0x20);
1860 vga_wgfx(NULL, 0x09, 0x00);
1861 switch ((w & 0x18) >> 3) {
1863 par->NeoPanelWidth = 640;
1864 par->NeoPanelHeight = 480;
1865 info->var = neofb_var640x480x8;
1868 par->NeoPanelWidth = 800;
1869 par->NeoPanelHeight = par->libretto ? 480 : 600;
1870 info->var = par->libretto ? neofb_var800x480x8 : neofb_var800x600x8;
1873 par->NeoPanelWidth = 1024;
1874 par->NeoPanelHeight = 768;
1875 info->var = neofb_var1024x768x8;
1878 /* 1280x1024 panel support needs to be added */
1880 par->NeoPanelWidth = 1280;
1881 par->NeoPanelHeight = 1024;
1882 info->var = neofb_var1280x1024x8;
1886 "neofb: Only 640x480, 800x600/480 and 1024x768 panels are currently supported\n");
1890 par->NeoPanelWidth = 640;
1891 par->NeoPanelHeight = 480;
1892 info->var = neofb_var640x480x8;
1896 printk(KERN_INFO "Panel is a %dx%d %s %s display\n",
1898 par->NeoPanelHeight,
1899 (type & 0x02) ? "color" : "monochrome",
1900 (type & 0x10) ? "TFT" : "dual scan");
1902 switch (info->fix.accel) {
1903 case FB_ACCEL_NEOMAGIC_NM2070:
1912 case FB_ACCEL_NEOMAGIC_NM2090:
1913 case FB_ACCEL_NEOMAGIC_NM2093:
1922 case FB_ACCEL_NEOMAGIC_NM2097:
1931 case FB_ACCEL_NEOMAGIC_NM2160:
1940 case FB_ACCEL_NEOMAGIC_NM2200:
1947 maxHeight = 1024; /* ???? */
1949 par->neo2200 = (Neo2200 *) par->mmio_vbase;
1951 case FB_ACCEL_NEOMAGIC_NM2230:
1958 maxHeight = 1024; /* ???? */
1960 par->neo2200 = (Neo2200 *) par->mmio_vbase;
1962 case FB_ACCEL_NEOMAGIC_NM2360:
1969 maxHeight = 1024; /* ???? */
1971 par->neo2200 = (Neo2200 *) par->mmio_vbase;
1973 case FB_ACCEL_NEOMAGIC_NM2380:
1980 maxHeight = 1024; /* ???? */
1982 par->neo2200 = (Neo2200 *) par->mmio_vbase;
1986 info->sprite.size = CursorMem;
1987 info->sprite.scan_align = 1;
1988 info->sprite.buf_align = 1;
1989 info->sprite.flags = FB_PIXMAP_IO;
1990 info->sprite.outbuf = neofb_draw_cursor;
1992 par->maxClock = maxClock;
1993 par->cursorOff = CursorOff;
1994 return ((videoRam * 1024));
1998 static struct fb_info *__devinit neo_alloc_fb_info(struct pci_dev *dev, const struct
2001 struct fb_info *info;
2002 struct neofb_par *par;
2004 info = framebuffer_alloc(sizeof(struct neofb_par) + sizeof(u32) * 256, &dev->dev);
2011 info->fix.accel = id->driver_data;
2013 par->pci_burst = !nopciburst;
2014 par->lcd_stretch = !nostretch;
2015 par->libretto = libretto;
2017 par->internal_display = internal;
2018 par->external_display = external;
2020 switch (info->fix.accel) {
2021 case FB_ACCEL_NEOMAGIC_NM2070:
2022 sprintf(info->fix.id, "MagicGraph 128");
2024 case FB_ACCEL_NEOMAGIC_NM2090:
2025 sprintf(info->fix.id, "MagicGraph 128V");
2027 case FB_ACCEL_NEOMAGIC_NM2093:
2028 sprintf(info->fix.id, "MagicGraph 128ZV");
2030 case FB_ACCEL_NEOMAGIC_NM2097:
2031 sprintf(info->fix.id, "MagicGraph 128ZV+");
2033 case FB_ACCEL_NEOMAGIC_NM2160:
2034 sprintf(info->fix.id, "MagicGraph 128XD");
2036 case FB_ACCEL_NEOMAGIC_NM2200:
2037 sprintf(info->fix.id, "MagicGraph 256AV");
2039 case FB_ACCEL_NEOMAGIC_NM2230:
2040 sprintf(info->fix.id, "MagicGraph 256AV+");
2042 case FB_ACCEL_NEOMAGIC_NM2360:
2043 sprintf(info->fix.id, "MagicGraph 256ZX");
2045 case FB_ACCEL_NEOMAGIC_NM2380:
2046 sprintf(info->fix.id, "MagicGraph 256XL+");
2050 info->fix.type = FB_TYPE_PACKED_PIXELS;
2051 info->fix.type_aux = 0;
2052 info->fix.xpanstep = 0;
2053 info->fix.ypanstep = 4;
2054 info->fix.ywrapstep = 0;
2055 info->fix.accel = id->driver_data;
2057 info->fbops = &neofb_ops;
2058 info->flags = FBINFO_FLAG_DEFAULT;
2059 info->pseudo_palette = (void *) (par + 1);
2063 static void neo_free_fb_info(struct fb_info *info)
2067 * Free the colourmap
2069 fb_dealloc_cmap(&info->cmap);
2070 framebuffer_release(info);
2074 /* --------------------------------------------------------------------- */
2076 static int __devinit neofb_probe(struct pci_dev *dev,
2077 const struct pci_device_id *id)
2079 struct fb_info *info;
2080 u_int h_sync, v_sync;
2086 err = pci_enable_device(dev);
2091 info = neo_alloc_fb_info(dev, id);
2095 err = neo_map_mmio(info, dev);
2099 video_len = neo_init_hw(info);
2100 if (video_len < 0) {
2105 err = neo_map_video(info, dev, video_len);
2109 if (neofb_check_var(&info->var, info))
2113 * Calculate the hsync and vsync frequencies. Note that
2114 * we split the 1e12 constant up so that we can preserve
2115 * the precision and fit the results into 32-bit registers.
2116 * (1953125000 * 512 = 1e12)
2118 h_sync = 1953125000 / info->var.pixclock;
2120 h_sync * 512 / (info->var.xres + info->var.left_margin +
2121 info->var.right_margin + info->var.hsync_len);
2123 h_sync / (info->var.yres + info->var.upper_margin +
2124 info->var.lower_margin + info->var.vsync_len);
2126 printk(KERN_INFO "neofb v" NEOFB_VERSION
2127 ": %dkB VRAM, using %dx%d, %d.%03dkHz, %dHz\n",
2128 info->fix.smem_len >> 10, info->var.xres,
2129 info->var.yres, h_sync / 1000, h_sync % 1000, v_sync);
2131 if (fb_alloc_cmap(&info->cmap, 256, 0) < 0)
2134 err = register_framebuffer(info);
2138 printk(KERN_INFO "fb%d: %s frame buffer device\n",
2139 info->node, info->fix.id);
2144 pci_set_drvdata(dev, info);
2148 fb_dealloc_cmap(&info->cmap);
2150 neo_unmap_video(info);
2152 neo_unmap_mmio(info);
2154 neo_free_fb_info(info);
2158 static void __devexit neofb_remove(struct pci_dev *dev)
2160 struct fb_info *info = pci_get_drvdata(dev);
2162 DBG("neofb_remove");
2166 * If unregister_framebuffer fails, then
2167 * we will be leaving hooks that could cause
2168 * oopsen laying around.
2170 if (unregister_framebuffer(info))
2172 "neofb: danger danger! Oopsen imminent!\n");
2174 neo_unmap_video(info);
2175 neo_unmap_mmio(info);
2176 neo_free_fb_info(info);
2179 * Ensure that the driver data is no longer
2182 pci_set_drvdata(dev, NULL);
2186 static struct pci_device_id neofb_devices[] = {
2187 {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2070,
2188 PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2070},
2190 {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2090,
2191 PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2090},
2193 {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2093,
2194 PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2093},
2196 {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2097,
2197 PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2097},
2199 {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2160,
2200 PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2160},
2202 {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2200,
2203 PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2200},
2205 {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2230,
2206 PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2230},
2208 {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2360,
2209 PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2360},
2211 {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2380,
2212 PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2380},
2214 {0, 0, 0, 0, 0, 0, 0}
2217 MODULE_DEVICE_TABLE(pci, neofb_devices);
2219 static struct pci_driver neofb_driver = {
2221 .id_table = neofb_devices,
2222 .probe = neofb_probe,
2223 .remove = __devexit_p(neofb_remove)
2226 /* ************************* init in-kernel code ************************** */
2228 int __init neofb_setup(char *options)
2234 if (!options || !*options)
2237 while ((this_opt = strsep(&options, ",")) != NULL) {
2241 if (!strncmp(this_opt, "internal", 8))
2243 if (!strncmp(this_opt, "external", 8))
2245 if (!strncmp(this_opt, "nostretch", 9))
2247 if (!strncmp(this_opt, "nopciburst", 10))
2249 if (!strncmp(this_opt, "libretto", 8))
2256 int __init neofb_init(void)
2258 return pci_register_driver(&neofb_driver);
2263 static void __exit neofb_exit(void)
2265 pci_unregister_driver(&neofb_driver);
2268 module_init(neofb_init);
2269 module_exit(neofb_exit);