2 * PCI Backend - Handles the virtual fields in the configuration space headers.
4 * Author: Ryan Wilson <hap9@epoch.ncsc.mil>
7 #include <linux/kernel.h>
10 #include "conf_space.h"
18 #define is_enable_cmd(value) ((value)&(PCI_COMMAND_MEMORY|PCI_COMMAND_IO))
19 #define is_master_cmd(value) ((value)&PCI_COMMAND_MASTER)
21 static int command_write(struct pci_dev *dev, int offset, u16 value, void *data)
23 if (!dev->is_enabled && is_enable_cmd(value)) {
24 if (unlikely(verbose_request))
25 printk(KERN_DEBUG "pciback: %s: enable\n",
27 pci_enable_device(dev);
28 } else if (dev->is_enabled && !is_enable_cmd(value)) {
29 if (unlikely(verbose_request))
30 printk(KERN_DEBUG "pciback: %s: disable\n",
32 pci_disable_device(dev);
35 if (!dev->is_busmaster && is_master_cmd(value)) {
36 if (unlikely(verbose_request))
37 printk(KERN_DEBUG "pciback: %s: set bus master\n",
42 if (value & PCI_COMMAND_INVALIDATE) {
43 if (unlikely(verbose_request))
45 "pciback: %s: enable memory-write-invalidate\n",
50 return pci_write_config_word(dev, offset, value);
53 static int rom_write(struct pci_dev *dev, int offset, u32 value, void *data)
55 struct pci_bar_info *bar = data;
58 printk(KERN_WARNING "pciback: driver data not found for %s\n",
60 return XEN_PCI_ERR_op_failed;
63 /* A write to obtain the length must happen as a 32-bit write.
64 * This does not (yet) support writing individual bytes
66 if (value == ~PCI_ROM_ADDRESS_ENABLE)
71 /* Do we need to support enabling/disabling the rom address here? */
76 /* For the BARs, only allow writes which write ~0 or
77 * the correct resource information
78 * (Needed for when the driver probes the resource usage)
80 static int bar_write(struct pci_dev *dev, int offset, u32 value, void *data)
82 struct pci_bar_info *bar = data;
85 printk(KERN_WARNING "pciback: driver data not found for %s\n",
87 return XEN_PCI_ERR_op_failed;
90 /* A write to obtain the length must happen as a 32-bit write.
91 * This does not (yet) support writing individual bytes
101 static int bar_read(struct pci_dev *dev, int offset, u32 * value, void *data)
103 struct pci_bar_info *bar = data;
105 if (unlikely(!bar)) {
106 printk(KERN_WARNING "pciback: driver data not found for %s\n",
108 return XEN_PCI_ERR_op_failed;
111 *value = bar->which ? bar->len_val : bar->val;
116 static inline void read_dev_bar(struct pci_dev *dev,
117 struct pci_bar_info *bar_info, int offset,
120 pci_read_config_dword(dev, offset, &bar_info->val);
121 pci_write_config_dword(dev, offset, len_mask);
122 pci_read_config_dword(dev, offset, &bar_info->len_val);
123 pci_write_config_dword(dev, offset, bar_info->val);
126 static void *bar_init(struct pci_dev *dev, int offset)
128 struct pci_bar_info *bar = kmalloc(sizeof(*bar), GFP_KERNEL);
131 return ERR_PTR(-ENOMEM);
133 read_dev_bar(dev, bar, offset, ~0);
139 static void *rom_init(struct pci_dev *dev, int offset)
141 struct pci_bar_info *bar = kmalloc(sizeof(*bar), GFP_KERNEL);
144 return ERR_PTR(-ENOMEM);
146 read_dev_bar(dev, bar, offset, ~PCI_ROM_ADDRESS_ENABLE);
152 static void bar_reset(struct pci_dev *dev, int offset, void *data)
154 struct pci_bar_info *bar = data;
159 static void bar_release(struct pci_dev *dev, int offset, void *data)
164 static int interrupt_read(struct pci_dev *dev, int offset, u8 * value,
167 *value = (u8) dev->irq;
172 static int bist_write(struct pci_dev *dev, int offset, u8 value, void *data)
177 err = pci_read_config_byte(dev, offset, &cur_value);
181 if ((cur_value & ~PCI_BIST_START) == (value & ~PCI_BIST_START)
182 || value == PCI_BIST_START)
183 err = pci_write_config_byte(dev, offset, value);
189 static struct config_field header_common[] = {
191 .offset = PCI_COMMAND,
193 .u.w.read = pciback_read_config_word,
194 .u.w.write = command_write,
197 .offset = PCI_INTERRUPT_LINE,
199 .u.b.read = interrupt_read,
202 .offset = PCI_INTERRUPT_PIN,
204 .u.b.read = pciback_read_config_byte,
207 /* Any side effects of letting driver domain control cache line? */
208 .offset = PCI_CACHE_LINE_SIZE,
210 .u.b.read = pciback_read_config_byte,
211 .u.b.write = pciback_write_config_byte,
214 .offset = PCI_LATENCY_TIMER,
216 .u.b.read = pciback_read_config_byte,
221 .u.b.read = pciback_read_config_byte,
222 .u.b.write = bist_write,
229 #define CFG_FIELD_BAR(reg_offset) \
231 .offset = reg_offset, \
234 .reset = bar_reset, \
235 .release = bar_release, \
236 .u.dw.read = bar_read, \
237 .u.dw.write = bar_write, \
240 #define CFG_FIELD_ROM(reg_offset) \
242 .offset = reg_offset, \
245 .reset = bar_reset, \
246 .release = bar_release, \
247 .u.dw.read = bar_read, \
248 .u.dw.write = rom_write, \
251 static struct config_field header_0[] = {
252 CFG_FIELD_BAR(PCI_BASE_ADDRESS_0),
253 CFG_FIELD_BAR(PCI_BASE_ADDRESS_1),
254 CFG_FIELD_BAR(PCI_BASE_ADDRESS_2),
255 CFG_FIELD_BAR(PCI_BASE_ADDRESS_3),
256 CFG_FIELD_BAR(PCI_BASE_ADDRESS_4),
257 CFG_FIELD_BAR(PCI_BASE_ADDRESS_5),
258 CFG_FIELD_ROM(PCI_ROM_ADDRESS),
264 static struct config_field header_1[] = {
265 CFG_FIELD_BAR(PCI_BASE_ADDRESS_0),
266 CFG_FIELD_BAR(PCI_BASE_ADDRESS_1),
267 CFG_FIELD_ROM(PCI_ROM_ADDRESS1),
273 int pciback_config_header_add_fields(struct pci_dev *dev)
277 err = pciback_config_add_fields(dev, header_common);
281 switch (dev->hdr_type) {
282 case PCI_HEADER_TYPE_NORMAL:
283 err = pciback_config_add_fields(dev, header_0);
286 case PCI_HEADER_TYPE_BRIDGE:
287 err = pciback_config_add_fields(dev, header_1);
292 printk(KERN_ERR "pciback: %s: Unsupported header type %d!\n",
293 pci_name(dev), dev->hdr_type);