1 #ifndef _ALPHA_HARDIRQ_H
2 #define _ALPHA_HARDIRQ_H
4 #include <linux/config.h>
5 #include <linux/threads.h>
6 #include <linux/cache.h>
9 /* entry.S is sensitive to the offsets of these fields */
11 unsigned long __softirq_pending;
12 unsigned int __syscall_count;
13 unsigned long idle_timestamp;
14 struct task_struct * __ksoftirqd_task;
15 } ____cacheline_aligned irq_cpustat_t;
17 #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
20 * We put the hardirq and softirq counter into the preemption
21 * counter. The bitmask has the following meaning:
23 * - bits 0-7 are the preemption count (max preemption depth: 256)
24 * - bits 8-15 are the softirq count (max # of softirqs: 256)
25 * - bits 16-27 are the hardirq count (max # of hardirqs: 4096)
27 * - ( bit 30 is the PREEMPT_ACTIVE flag. )
29 * PREEMPT_MASK: 0x000000ff
30 * SOFTIRQ_MASK: 0x0000ff00
31 * HARDIRQ_MASK: 0x0fff0000
34 #define PREEMPT_BITS 8
35 #define SOFTIRQ_BITS 8
36 #define HARDIRQ_BITS 12
38 #define PREEMPT_SHIFT 0
39 #define SOFTIRQ_SHIFT (PREEMPT_SHIFT + PREEMPT_BITS)
40 #define HARDIRQ_SHIFT (SOFTIRQ_SHIFT + SOFTIRQ_BITS)
42 #define __MASK(x) ((1UL << (x))-1)
44 #define PREEMPT_MASK (__MASK(PREEMPT_BITS) << PREEMPT_SHIFT)
45 #define HARDIRQ_MASK (__MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT)
46 #define SOFTIRQ_MASK (__MASK(SOFTIRQ_BITS) << SOFTIRQ_SHIFT)
48 #define hardirq_count() (preempt_count() & HARDIRQ_MASK)
49 #define softirq_count() (preempt_count() & SOFTIRQ_MASK)
50 #define irq_count() (preempt_count() & (HARDIRQ_MASK | SOFTIRQ_MASK))
52 #define PREEMPT_OFFSET (1UL << PREEMPT_SHIFT)
53 #define SOFTIRQ_OFFSET (1UL << SOFTIRQ_SHIFT)
54 #define HARDIRQ_OFFSET (1UL << HARDIRQ_SHIFT)
57 * The hardirq mask has to be large enough to have
58 * space for potentially nestable IRQ sources in the system
59 * to nest on a single CPU. On Alpha, interrupts are masked at the CPU
60 * by IPL as well as at the system level. We only have 8 IPLs (UNIX PALcode)
61 * so we really only have 8 nestable IRQs, but allow some overhead
63 #if (1 << HARDIRQ_BITS) < 16
64 #error HARDIRQ_BITS is too low!
68 * Are we doing bottom half or hardware interrupt processing?
69 * Are we in a softirq context? Interrupt context?
71 #define in_irq() (hardirq_count())
72 #define in_softirq() (softirq_count())
73 #define in_interrupt() (irq_count())
76 #define hardirq_trylock() (!in_interrupt())
77 #define hardirq_endlock() do { } while (0)
79 #define irq_enter() (preempt_count() += HARDIRQ_OFFSET)
83 #define in_atomic() (preempt_count() != kernel_locked())
84 # define IRQ_EXIT_OFFSET (HARDIRQ_OFFSET-1)
86 #define in_atomic() (preempt_count() != 0)
87 #define IRQ_EXIT_OFFSET HARDIRQ_OFFSET
91 preempt_count() -= IRQ_EXIT_OFFSET; \
92 if (!in_interrupt() && \
93 softirq_pending(smp_processor_id())) \
95 preempt_enable_no_resched(); \
99 # define synchronize_irq(irq) barrier()
101 extern void synchronize_irq(unsigned int irq);
102 #endif /* CONFIG_SMP */
104 #endif /* _ALPHA_HARDIRQ_H */