2 * linux/include/asm-arm/arch-iop310/irqs.h
4 * Author: Nicolas Pitre
5 * Copyright: (C) 2001 MontaVista Software Inc.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * 06/13/01: Added 80310 on-chip interrupt sources <dsaxena@mvista.com>
14 #include <linux/config.h>
17 * XS80200 specific IRQs
19 #define IRQ_XS80200_BCU 0 /* Bus Control Unit */
20 #define IRQ_XS80200_PMU 1 /* Performance Monitoring Unit */
21 #define IRQ_XS80200_EXTIRQ 2 /* external IRQ signal */
22 #define IRQ_XS80200_EXTFIQ 3 /* external IRQ signal */
24 #define NR_XS80200_IRQS 4
26 #define XSCALE_PMU_IRQ IRQ_XS80200_PMU
29 * IOP80310 chipset interrupts
31 #define IOP310_IRQ_OFS NR_XS80200_IRQS
32 #define IOP310_IRQ(x) (IOP310_IRQ_OFS + (x))
37 #define IRQ_IOP310_DMA0 IOP310_IRQ(0) /* DMA Channel 0 */
38 #define IRQ_IOP310_DMA1 IOP310_IRQ(1) /* DMA Channel 1 */
39 #define IRQ_IOP310_DMA2 IOP310_IRQ(2) /* DMA Channel 2 */
40 #define IRQ_IOP310_PMON IOP310_IRQ(3) /* Bus performance Unit */
41 #define IRQ_IOP310_AAU IOP310_IRQ(4) /* Application Accelator Unit */
46 #define IRQ_IOP310_I2C IOP310_IRQ(5) /* I2C unit */
47 #define IRQ_IOP310_MU IOP310_IRQ(6) /* messaging unit */
49 #define NR_IOP310_IRQS (IOP310_IRQ(6) + 1)
51 #define NR_IRQS NR_IOP310_IRQS
55 * Interrupts available on the Cyclone IQ80310 board
57 #ifdef CONFIG_ARCH_IQ80310
59 #define IQ80310_IRQ_OFS NR_IOP310_IRQS
60 #define IQ80310_IRQ(y) ((IQ80310_IRQ_OFS) + (y))
62 #define IRQ_IQ80310_TIMER IQ80310_IRQ(0) /* Timer Interrupt */
63 #define IRQ_IQ80310_I82559 IQ80310_IRQ(1) /* I82559 Ethernet Interrupt */
64 #define IRQ_IQ80310_UART1 IQ80310_IRQ(2) /* UART1 Interrupt */
65 #define IRQ_IQ80310_UART2 IQ80310_IRQ(3) /* UART2 Interrupt */
66 #define IRQ_IQ80310_INTD IQ80310_IRQ(4) /* PCI INTD */
70 * ONLY AVAILABLE ON REV F OR NEWER BOARDS!
72 #define IRQ_IQ80310_INTA IQ80310_IRQ(5) /* PCI INTA */
73 #define IRQ_IQ80310_INTB IQ80310_IRQ(6) /* PCI INTB */
74 #define IRQ_IQ80310_INTC IQ80310_IRQ(7) /* PCI INTC */
77 #define NR_IRQS (IQ80310_IRQ(7) + 1)
79 #endif // CONFIG_ARCH_IQ80310