2 * linux/include/asm/arch-iop80310/iq80310.h
4 * Intel IQ-80310 evaluation board registers
10 #define IQ80310_RAMBASE 0xa0000000
11 #define IQ80310_UART1 0xfe800000 /* UART #1 */
12 #define IQ80310_UART2 0xfe810000 /* UART #2 */
13 #define IQ80310_INT_STAT 0xfe820000 /* Interrupt (XINT3#) Status */
14 #define IQ80310_BOARD_REV 0xfe830000 /* Board revision register */
15 #define IQ80310_CPLD_REV 0xfe840000 /* CPLD revision register */
16 #define IQ80310_7SEG_1 0xfe840000 /* 7-Segment MSB */
17 #define IQ80310_7SEG_0 0xfe850000 /* 7-Segment LSB (WO) */
18 #define IQ80310_PCI_INT_STAT 0xfe850000 /* PCI Interrupt Status */
19 #define IQ80310_INT_MASK 0xfe860000 /* Interrupt (XINT3#) Mask */
20 #define IQ80310_BACKPLANE 0xfe870000 /* Backplane Detect */
21 #define IQ80310_TIMER_LA0 0xfe880000 /* Timer LA0 */
22 #define IQ80310_TIMER_LA1 0xfe890000 /* Timer LA1 */
23 #define IQ80310_TIMER_LA2 0xfe8a0000 /* Timer LA2 */
24 #define IQ80310_TIMER_LA3 0xfe8b0000 /* Timer LA3 */
25 #define IQ80310_TIMER_EN 0xfe8c0000 /* Timer Enable */
26 #define IQ80310_ROTARY_SW 0xfe8d0000 /* Rotary Switch */
27 #define IQ80310_JTAG 0xfe8e0000 /* JTAG Port Access */
28 #define IQ80310_BATT_STAT 0xfe8f0000 /* Battery Status */