2 * linux/include/asm-arm/arch-omap/dma.h
4 * Copyright (C) 2003 Nokia Corporation
5 * Author: Juha Yrjölä <juha.yrjola@nokia.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #ifndef __ASM_ARCH_DMA_H
22 #define __ASM_ARCH_DMA_H
24 #define MAX_DMA_ADDRESS 0xffffffff
26 #define OMAP_LOGICAL_DMA_CH_COUNT 17
28 #define OMAP_DMA_NO_DEVICE 0
29 #define OMAP_DMA_MCSI1_TX 1
30 #define OMAP_DMA_MCSI1_RX 2
31 #define OMAP_DMA_I2C_RX 3
32 #define OMAP_DMA_I2C_TX 4
33 #define OMAP_DMA_EXT_NDMA_REQ 5
34 #define OMAP_DMA_EXT_NDMA_REQ2 6
35 #define OMAP_DMA_UWIRE_TX 7
36 #define OMAP_DMA_MCBSP1_DMA_TX 8
37 #define OMAP_DMA_MCBSP1_DMA_RX 9
38 #define OMAP_DMA_MCBSP3_DMA_TX 10
39 #define OMAP_DMA_MCBSP3_DMA_RX 11
40 #define OMAP_DMA_UART1_TX 12
41 #define OMAP_DMA_UART1_RX 13
42 #define OMAP_DMA_UART2_TX 14
43 #define OMAP_DMA_UART2_RX 15
44 #define OMAP_DMA_MCBSP2_TX 16
45 #define OMAP_DMA_MCBSP2_RX 17
46 #define OMAP_DMA_UART3_TX 18
47 #define OMAP_DMA_UART3_RX 19
48 #define OMAP_DMA_CAMERA_IF_RX 20
49 #define OMAP_DMA_MMC_TX 21
50 #define OMAP_DMA_MMC_RX 22
51 #define OMAP_DMA_NAND 23
52 #define OMAP_DMA_IRQ_LCD_LINE 24
53 #define OMAP_DMA_MEMORY_STICK 25
54 #define OMAP_DMA_USB_W2FC_RX0 26
55 #define OMAP_DMA_USB_W2FC_RX1 27
56 #define OMAP_DMA_USB_W2FC_RX2 28
57 #define OMAP_DMA_USB_W2FC_TX0 29
58 #define OMAP_DMA_USB_W2FC_TX1 30
59 #define OMAP_DMA_USB_W2FC_TX2 31
61 /* These are only for 1610 */
62 #define OMAP_DMA_CRYPTO_DES_IN 32
63 #define OMAP_DMA_SPI_TX 33
64 #define OMAP_DMA_SPI_RX 34
65 #define OMAP_DMA_CRYPTO_HASH 35
66 #define OMAP_DMA_CCP_ATTN 36
67 #define OMAP_DMA_CCP_FIFO_NOT_EMPTY 37
68 #define OMAP_DMA_CMT_APE_TX_CHAN_0 38
69 #define OMAP_DMA_CMT_APE_RV_CHAN_0 39
70 #define OMAP_DMA_CMT_APE_TX_CHAN_1 40
71 #define OMAP_DMA_CMT_APE_RV_CHAN_1 41
72 #define OMAP_DMA_CMT_APE_TX_CHAN_2 42
73 #define OMAP_DMA_CMT_APE_RV_CHAN_2 43
74 #define OMAP_DMA_CMT_APE_TX_CHAN_3 44
75 #define OMAP_DMA_CMT_APE_RV_CHAN_3 45
76 #define OMAP_DMA_CMT_APE_TX_CHAN_4 46
77 #define OMAP_DMA_CMT_APE_RV_CHAN_4 47
78 #define OMAP_DMA_CMT_APE_TX_CHAN_5 48
79 #define OMAP_DMA_CMT_APE_RV_CHAN_5 49
80 #define OMAP_DMA_CMT_APE_TX_CHAN_6 50
81 #define OMAP_DMA_CMT_APE_RV_CHAN_6 51
82 #define OMAP_DMA_CMT_APE_TX_CHAN_7 52
83 #define OMAP_DMA_CMT_APE_RV_CHAN_7 53
84 #define OMAP_DMA_MMC2_TX 54
85 #define OMAP_DMA_MMC2_RX 55
86 #define OMAP_DMA_CRYPTO_DES_OUT 56
89 #define OMAP_DMA_BASE 0xfffed800
90 #define OMAP_DMA_GCR_REG (OMAP_DMA_BASE + 0x400)
91 #define OMAP_DMA_GSCR_REG (OMAP_DMA_BASE + 0x404)
92 #define OMAP_DMA_GRST_REG (OMAP_DMA_BASE + 0x408)
93 #define OMAP_DMA_HW_ID_REG (OMAP_DMA_BASE + 0x442)
94 #define OMAP_DMA_PCH2_ID_REG (OMAP_DMA_BASE + 0x444)
95 #define OMAP_DMA_PCH0_ID (OMAP_DMA_BASE + 0x446)
96 #define OMAP_DMA_PCH1_ID (OMAP_DMA_BASE + 0x448)
97 #define OMAP_DMA_PCHG_ID (OMAP_DMA_BASE + 0x44a)
98 #define OMAP_DMA_PCHD_ID (OMAP_DMA_BASE + 0x44c)
99 #define OMAP_DMA_CAPS_0_U_REG (OMAP_DMA_BASE + 0x44e)
100 #define OMAP_DMA_CAPS_0_L_REG (OMAP_DMA_BASE + 0x450)
101 #define OMAP_DMA_CAPS_1_U_REG (OMAP_DMA_BASE + 0x452)
102 #define OMAP_DMA_CAPS_1_L_REG (OMAP_DMA_BASE + 0x454)
103 #define OMAP_DMA_CAPS_2_REG (OMAP_DMA_BASE + 0x456)
104 #define OMAP_DMA_CAPS_3_REG (OMAP_DMA_BASE + 0x458)
105 #define OMAP_DMA_CAPS_4_REG (OMAP_DMA_BASE + 0x45a)
106 #define OMAP_DMA_PCH2_SR_REG (OMAP_DMA_BASE + 0x460)
107 #define OMAP_DMA_PCH0_SR_REG (OMAP_DMA_BASE + 0x480)
108 #define OMAP_DMA_PCH1_SR_REG (OMAP_DMA_BASE + 0x482)
109 #define OMAP_DMA_PCHD_SR_REG (OMAP_DMA_BASE + 0x4c0)
111 #define OMAP1510_DMA_LCD_CTRL 0xfffedb00
112 #define OMAP1510_DMA_LCD_TOP_F1_L 0xfffedb02
113 #define OMAP1510_DMA_LCD_TOP_F1_U 0xfffedb04
114 #define OMAP1510_DMA_LCD_BOT_F1_L 0xfffedb06
115 #define OMAP1510_DMA_LCD_BOT_F1_U 0xfffedb08
117 #define OMAP1610_DMA_LCD_CSDP 0xfffee3c0
118 #define OMAP1610_DMA_LCD_CCR 0xfffee3c2
119 #define OMAP1610_DMA_LCD_CTRL 0xfffee3c4
120 #define OMAP1610_DMA_LCD_TOP_B1_L 0xfffee3c8
121 #define OMAP1610_DMA_LCD_TOP_B1_U 0xfffee3ca
122 #define OMAP1610_DMA_LCD_BOT_B1_L 0xfffee3cc
123 #define OMAP1610_DMA_LCD_BOT_B1_U 0xfffee3ce
124 #define OMAP1610_DMA_LCD_TOP_B2_L 0xfffee3d0
125 #define OMAP1610_DMA_LCD_TOP_B2_U 0xfffee3d2
126 #define OMAP1610_DMA_LCD_BOT_B2_L 0xfffee3d4
127 #define OMAP1610_DMA_LCD_BOT_B2_U 0xfffee3d6
128 #define OMAP1610_DMA_LCD_SRC_EI_B1 0xfffee3d8
129 #define OMAP1610_DMA_LCD_SRC_FI_B1_L 0xfffee3da
130 #define OMAP1610_DMA_LCD_SRC_EN_B1 0xfffee3e0
131 #define OMAP1610_DMA_LCD_SRC_FN_B1 0xfffee3e4
132 #define OMAP1610_DMA_LCD_LCH_CTRL 0xfffee3ea
133 #define OMAP1610_DMA_LCD_SRC_FI_B1_U 0xfffee3f4
136 /* Every LCh has its own set of the registers below */
137 #define OMAP_DMA_CSDP_REG(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x00)
138 #define OMAP_DMA_CCR_REG(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x02)
139 #define OMAP_DMA_CICR_REG(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x04)
140 #define OMAP_DMA_CSR_REG(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x06)
141 #define OMAP_DMA_CSSA_L_REG(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x08)
142 #define OMAP_DMA_CSSA_U_REG(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x0a)
143 #define OMAP_DMA_CDSA_L_REG(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x0c)
144 #define OMAP_DMA_CDSA_U_REG(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x0e)
145 #define OMAP_DMA_CEN_REG(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x10)
146 #define OMAP_DMA_CFN_REG(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x12)
147 #define OMAP_DMA_CSFI_REG(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x14)
148 #define OMAP_DMA_CSEI_REG(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x16)
149 #define OMAP_DMA_CSAC_REG(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x18)
150 #define OMAP_DMA_CDAC_REG(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x1a)
151 #define OMAP_DMA_CDEI_REG(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x1c)
152 #define OMAP_DMA_CDFI_REG(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x1e)
153 #define OMAP_DMA_COLOR_L_REG(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x20)
154 #define OMAP_DMA_COLOR_U_REG(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x22)
155 #define OMAP_DMA_CCR2_REG(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x24)
156 #define OMAP_DMA_CLNK_CTRL_REG(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x28)
157 #define OMAP_DMA_LCH_CTRL_REG(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x2a)
159 #define OMAP_DMA_TOUT_IRQ (1 << 0)
160 #define OMAP_DMA_DROP_IRQ (1 << 1)
161 #define OMAP_DMA_HALF_IRQ (1 << 2)
162 #define OMAP_DMA_FRAME_IRQ (1 << 3)
163 #define OMAP_DMA_LAST_IRQ (1 << 4)
164 #define OMAP_DMA_BLOCK_IRQ (1 << 5)
165 #define OMAP_DMA_SYNC_IRQ (1 << 6)
167 #define OMAP_DMA_DATA_TYPE_S8 0x00
168 #define OMAP_DMA_DATA_TYPE_S16 0x01
169 #define OMAP_DMA_DATA_TYPE_S32 0x02
171 #define OMAP_DMA_SYNC_ELEMENT 0x00
172 #define OMAP_DMA_SYNC_FRAME 0x01
173 #define OMAP_DMA_SYNC_BLOCK 0x02
175 #define OMAP_DMA_PORT_EMIFF 0x00
176 #define OMAP_DMA_PORT_EMIFS 0x01
177 #define OMAP_DMA_PORT_OCP_T1 0x02
178 #define OMAP_DMA_PORT_TIPB 0x03
179 #define OMAP_DMA_PORT_OCP_T2 0x04
180 #define OMAP_DMA_PORT_MPUI 0x05
182 #define OMAP_DMA_AMODE_CONSTANT 0x00
183 #define OMAP_DMA_AMODE_POST_INC 0x01
184 #define OMAP_DMA_AMODE_SINGLE_IDX 0x02
185 #define OMAP_DMA_AMODE_DOUBLE_IDX 0x03
187 /* LCD DMA block numbers */
190 OMAP_LCD_DMA_B1_BOTTOM,
192 OMAP_LCD_DMA_B2_BOTTOM
195 extern int omap_request_dma(int dev_id, const char *dev_name,
196 void (* callback)(int lch, u16 ch_status, void *data),
197 void *data, int *dma_ch);
198 extern void omap_enable_dma_irq(int ch, u16 irq_bits);
199 extern void omap_disable_dma_irq(int ch, u16 irq_bits);
200 extern void omap_free_dma(int ch);
201 extern void omap_start_dma(int lch);
202 extern void omap_stop_dma(int lch);
203 extern void omap_set_dma_transfer_params(int lch, int data_type,
204 int elem_count, int frame_count,
206 extern void omap_set_dma_src_params(int lch, int src_port, int src_amode,
207 unsigned long src_start);
208 extern void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode,
209 unsigned long dest_start);
211 extern void omap_dma_link_lch (int lch_head, int lch_queue);
212 extern void omap_dma_unlink_lch (int lch_head, int lch_queue);
214 /* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */
215 extern int omap_dma_in_1510_mode(void);
217 /* LCD DMA functions */
218 extern int omap_request_lcd_dma(void (* callback)(u16 status, void *data),
220 extern void omap_free_lcd_dma(void);
221 extern void omap_start_lcd_dma(void);
222 extern void omap_stop_lcd_dma(void);
223 extern void omap_set_lcd_dma_b1(unsigned long addr, u16 fb_xres, u16 fb_yres,
225 extern void omap_set_lcd_dma_b1_rotation(int rotate);
227 #endif /* __ASM_ARCH_DMA_H */