2 * linux/include/asm-arm/arch-omap/mux.h
4 * Table of the Omap register configurations for the FUNC_MUX and
5 * PULL_DWN combinations.
7 * Copyright (C) 2003 Nokia Corporation
9 * Written by Tony Lindgren <tony.lindgren@nokia.com>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 * NOTE: Please use the following naming style for new pin entries.
26 * For example, W8_1610_MMC2_DAT0, where:
28 * - 1610 = 1510 or 1610, none if common for both 1510 and 1610
29 * - MMC2_DAT0 = function
32 * Added entry for the I2C interface. (02Feb 2004)
33 * Copyright (C) 2004 Texas Instruments
35 * Added entry for the keypad and uwire CS1. (09Mar 2004)
36 * Copyright (C) 2004 Texas Instruments
40 #ifndef __ASM_ARCH_MUX_H
41 #define __ASM_ARCH_MUX_H
43 #define PU_PD_SEL_NA 0 /* No pu_pd reg available */
44 #define PULL_DWN_CTRL_NA 0 /* No pull-down control needed */
49 #define MUX_REG(reg, mode_offset, mode) .mux_reg_name = "FUNC_MUX_CTRL_"#reg, \
50 .mux_reg = FUNC_MUX_CTRL_##reg, \
51 .mask_offset = mode_offset, \
54 #define PULL_REG(reg, bit, status) .pull_name = "PULL_DWN_CTRL_"#reg, \
55 .pull_reg = PULL_DWN_CTRL_##reg, \
59 #define PU_PD_REG(reg, status) .pu_pd_name = "PU_PD_SEL_"#reg, \
60 .pu_pd_reg = PU_PD_SEL_##reg, \
65 #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \
66 .mask_offset = mode_offset, \
69 #define PULL_REG(reg, bit, status) .pull_reg = PULL_DWN_CTRL_##reg, \
73 #define PU_PD_REG(reg, status) .pu_pd_reg = PU_PD_SEL_##reg, \
78 #define MUX_CFG(desc, mux_reg, mode_offset, mode, \
79 pull_reg, pull_bit, pull_status, \
80 pu_pd_reg, pu_pd_status, debug_status) \
83 .debug = debug_status, \
84 MUX_REG(mux_reg, mode_offset, mode) \
85 PULL_REG(pull_reg, pull_bit, pull_status) \
86 PU_PD_REG(pu_pd_reg, pu_pd_status) \
89 #define PULL_DISABLED 0
90 #define PULL_ENABLED 1
100 const char *mux_reg_name;
101 const unsigned int mux_reg;
102 const unsigned char mask_offset;
103 const unsigned char mask;
105 const char *pull_name;
106 const unsigned int pull_reg;
107 const unsigned char pull_val;
108 const unsigned char pull_bit;
110 const char *pu_pd_name;
111 const unsigned int pu_pd_reg;
112 const unsigned char pu_pd_val;
116 * Lookup table for FUNC_MUX and PULL_DWN register combinations for each
117 * device. See also reg_cfg_table below for the register values.
120 /* UART1 (BT_UART_GATING)*/
124 /* UART2 (COM_UART_GATING)*/
130 /* UART3 (GIGA_UART_GATING) */
136 UART3_BCLK, /* 12MHz clock out */
138 /* USB master generic */
204 V5_1610_MMC2_DATDIR0,
205 W19_1610_MMC2_DATDIR1,
208 /* OMAP-1610 External Trace Interface */
224 /* OMAP-1610 uWire */
240 /* OMAP-1610 USB0 alternate pin configuration */
282 /* Power management */
287 #if defined(__MUX_C__) && defined(CONFIG_OMAP_MUX)
290 * Table of various FUNC_MUX and PULL_DWN combinations for each device.
291 * See also reg_cfg_t above for the lookup table.
293 static reg_cfg_set reg_cfg_table[] = {
295 * description mux mode mux pull pull pull pu_pd pu dbg
296 * reg offset mode reg bit ena reg
298 MUX_CFG("UART1_TX", 9, 21, 1, 2, 3, 0, NA, 0, 0)
299 MUX_CFG("UART1_RTS", 9, 12, 1, 2, 0, 0, NA, 0, 0)
301 /* UART2 (COM_UART_GATING), conflicts with USB2 */
302 MUX_CFG("UART2_TX", C, 27, 1, 3, 3, 0, NA, 0, 0)
303 MUX_CFG("UART2_RX", C, 18, 0, 3, 1, 1, NA, 0, 0)
304 MUX_CFG("UART2_CTS", C, 21, 0, 3, 1, 1, NA, 0, 0)
305 MUX_CFG("UART2_RTS", C, 24, 1, 3, 2, 0, NA, 0, 0)
307 /* UART3 (GIGA_UART_GATING) */
308 MUX_CFG("UART3_TX", 6, 0, 1, 0, 30, 0, NA, 0, 0)
309 MUX_CFG("UART3_RX", 6, 3, 0, 0, 31, 1, NA, 0, 0)
310 MUX_CFG("UART3_CTS", 5, 12, 2, 0, 24, 0, NA, 0, 0)
311 MUX_CFG("UART3_RTS", 5, 15, 2, 0, 25, 0, NA, 0, 0)
312 MUX_CFG("UART3_CLKREQ", 9, 27, 0, 2, 5, 0, NA, 0, 0)
313 MUX_CFG("UART3_BCLK", A, 0, 0, 2, 6, 0, NA, 0, 0)
315 /* USB internal master generic */
316 MUX_CFG("R18_USB_VBUS", 7, 9, 2, 1, 11, 0, NA, 0, 1)
317 MUX_CFG("R18_1510_USB_GPIO0", 7, 9, 0, 1, 11, 1, NA, 0, 1)
318 MUX_CFG("W4_USB_PUEN", D, 3, 0, 3, 5, 1, NA, 0, 1)
319 MUX_CFG("W4_USB_CLKO", D, 3, 1, 3, 5, 0, NA, 0, 1)
322 MUX_CFG("USB1_SUSP", 8, 27, 2, 1, 27, 0, NA, 0, 1)
323 MUX_CFG("USB1_SE0", 9, 0, 2, 1, 28, 0, NA, 0, 1)
324 MUX_CFG("USB1_TXEN", 9, 3, 2, 1, 29, 0, NA, 0, 1)
325 MUX_CFG("USB1_TXD", 9, 24, 1, 2, 4, 0, NA, 0, 1)
326 MUX_CFG("USB1_VP", A, 3, 1, 2, 7, 0, NA, 0, 1)
327 MUX_CFG("USB1_VM", A, 6, 1, 2, 8, 0, NA, 0, 1)
328 MUX_CFG("USB1_RCV", A, 9, 1, 2, 9, 0, NA, 0, 1)
329 MUX_CFG("USB1_SPEED", A, 12, 2, 2, 10, 0, NA, 0, 1)
332 MUX_CFG("USB2_SUSP", B, 3, 1, 2, 17, 0, NA, 0, 1)
333 MUX_CFG("USB2_VP", B, 6, 1, 2, 18, 0, NA, 0, 1)
334 MUX_CFG("USB2_TXEN", B, 9, 1, 2, 19, 0, NA, 0, 1)
335 MUX_CFG("USB2_VM", C, 18, 1, 3, 0, 0, NA, 0, 1)
336 MUX_CFG("USB2_RCV", C, 21, 1, 3, 1, 0, NA, 0, 1)
337 MUX_CFG("USB2_SE0", C, 24, 2, 3, 2, 0, NA, 0, 1)
338 MUX_CFG("USB2_TXD", C, 27, 2, 3, 3, 0, NA, 0, 1)
341 MUX_CFG("R18_1510_GPIO0", 7, 9, 0, 1, 11, 1, 0, 0, 1)
342 MUX_CFG("R19_1510_GPIO1", 7, 6, 0, 1, 10, 1, 0, 0, 1)
343 MUX_CFG("M14_1510_GPIO2", 7, 3, 0, 1, 9, 1, 0, 0, 1)
346 MUX_CFG("MPUIO2", 7, 18, 0, 1, 1, 1, NA, 0, 1)
347 MUX_CFG("MPUIO4", 7, 15, 0, 1, 13, 1, NA, 0, 1)
348 MUX_CFG("MPUIO5", 7, 12, 0, 1, 12, 1, NA, 0, 1)
350 MUX_CFG("T20_1610_MPUIO5", 7, 12, 0, 1, 12, 0, 3, 0, 1)
351 MUX_CFG("W11_1610_MPUIO6", 10, 15, 2, 3, 8, 0, 3, 0, 1)
352 MUX_CFG("V10_1610_MPUIO7", A, 24, 2, 2, 14, 0, 2, 0, 1)
353 MUX_CFG("W11_1610_MPUIO9", 10, 15, 1, 3, 8, 0, 3, 0, 1)
354 MUX_CFG("V10_1610_MPUIO10", A, 24, 1, 2, 14, 0, 2, 0, 1)
355 MUX_CFG("W10_1610_MPUIO11", A, 18, 2, 2, 11, 0, 2, 0, 1)
356 MUX_CFG("E20_1610_MPUIO13", 3, 21, 1, 0, 7, 0, 0, 0, 1)
357 MUX_CFG("U20_1610_MPUIO14", 9, 6, 6, 0, 30, 0, 0, 0, 1)
358 MUX_CFG("E19_1610_MPUIO15", 3, 18, 1, 0, 6, 0, 0, 0, 1)
361 MUX_CFG("MCBSP2_CLKR", C, 6, 0, 2, 27, 1, NA, 0, 1)
362 MUX_CFG("MCBSP2_CLKX", C, 9, 0, 2, 29, 1, NA, 0, 1)
363 MUX_CFG("MCBSP2_DR", C, 0, 0, 2, 26, 1, NA, 0, 1)
364 MUX_CFG("MCBSP2_DX", C, 15, 0, 2, 31, 1, NA, 0, 1)
365 MUX_CFG("MCBSP2_FSR", C, 12, 0, 2, 30, 1, NA, 0, 1)
366 MUX_CFG("MCBSP2_FSX", C, 3, 0, 2, 27, 1, NA, 0, 1)
368 /* MCBSP3 NOTE: Mode must 1 for clock */
369 MUX_CFG("MCBSP3_CLKX", 9, 3, 1, 1, 29, 0, NA, 0, 1)
372 MUX_CFG("BALLOUT_V8_ARMIO3", B, 18, 0, 2, 25, 1, NA, 0, 1)
375 MUX_CFG("W8_1610_MMC2_DAT0", B, 21, 6, 2, 23, 1, 2, 1, 1)
376 MUX_CFG("V8_1610_MMC2_DAT1", B, 27, 6, 2, 25, 1, 2, 1, 1)
377 MUX_CFG("W15_1610_MMC2_DAT2", 9, 12, 6, 2, 5, 1, 2, 1, 1)
378 MUX_CFG("R10_1610_MMC2_DAT3", B, 18, 6, 2, 22, 1, 2, 1, 1)
379 MUX_CFG("Y10_1610_MMC2_CLK", B, 3, 6, 2, 17, 0, 2, 0, 1)
380 MUX_CFG("Y8_1610_MMC2_CMD", B, 24, 6, 2, 24, 1, 2, 1, 1)
381 MUX_CFG("V9_1610_MMC2_CMDDIR", B, 12, 6, 2, 20, 0, 2, 1, 1)
382 MUX_CFG("V5_1610_MMC2_DATDIR0", B, 15, 6, 2, 21, 0, 2, 1, 1)
383 MUX_CFG("W19_1610_MMC2_DATDIR1", 8, 15, 6, 1, 23, 0, 1, 1, 1)
384 MUX_CFG("R18_1610_MMC2_CLKIN", 7, 9, 6, 1, 11, 0, 1, 11, 1)
386 /* OMAP-1610 External Trace Interface */
387 MUX_CFG("M19_1610_ETM_PSTAT0", 5, 27, 1, 0, 29, 0, 0, 0, 1)
388 MUX_CFG("L15_1610_ETM_PSTAT1", 5, 24, 1, 0, 28, 0, 0, 0, 1)
389 MUX_CFG("L18_1610_ETM_PSTAT2", 5, 21, 1, 0, 27, 0, 0, 0, 1)
390 MUX_CFG("L19_1610_ETM_D0", 5, 18, 1, 0, 26, 0, 0, 0, 1)
391 MUX_CFG("J19_1610_ETM_D6", 5, 0, 1, 0, 20, 0, 0, 0, 1)
392 MUX_CFG("J18_1610_ETM_D7", 5, 27, 1, 0, 19, 0, 0, 0, 1)
395 MUX_CFG("P20_1610_GPIO4", 6, 27, 0, 1, 7, 0, 1, 1, 1)
396 MUX_CFG("V9_1610_GPIO7", B, 12, 1, 2, 20, 0, 2, 1, 1)
397 MUX_CFG("N19_1610_GPIO13", 6, 12, 0, 1, 2, 0, 1, 1, 1)
398 MUX_CFG("P10_1610_GPIO22", C, 0, 7, 2, 26, 0, 2, 1, 1)
399 MUX_CFG("V5_1610_GPIO24", B, 15, 7, 2, 21, 0, 2, 1, 1)
400 MUX_CFG("AA20_1610_GPIO_41", 9, 9, 7, 1, 31, 0, 1, 1, 1)
402 /* OMAP-1610 uWire */
403 MUX_CFG("V19_1610_UWIRE_SCLK", 8, 6, 0, 1, 20, 0, 1, 1, 1)
404 MUX_CFG("U18_1610_UWIRE_SDI", 8, 0, 0, 1, 18, 0, 1, 1, 1)
405 MUX_CFG("W21_1610_UWIRE_SDO", 8, 3, 0, 1, 19, 0, 1, 1, 1)
406 MUX_CFG("N14_1610_UWIRE_CS0", 8, 9, 1, 1, 21, 0, 1, 1, 1)
407 MUX_CFG("P15_1610_UWIRE_CS3", 8, 12, 1, 1, 22, 0, 1, 1, 1)
408 MUX_CFG("N15_1610_UWIRE_CS1", 7, 18, 2, NA, 0, 0, NA, 0, 0)
410 /* First MMC interface, same on 1510 and 1610 */
411 MUX_CFG("MMC_CMD", A, 27, 0, 2, 15, 1, 2, 1, 1)
412 MUX_CFG("MMC_DAT1", A, 24, 0, 2, 14, 1, 2, 1, 1)
413 MUX_CFG("MMC_DAT2", A, 18, 0, 2, 12, 1, 2, 1, 1)
414 MUX_CFG("MMC_DAT0", B, 0, 0, 2, 16, 1, 2, 1, 1)
415 MUX_CFG("MMC_CLK", A, 21, 0, NA, 0, 0, NA, 0, 1)
416 MUX_CFG("MMC_DAT3", 10, 15, 0, 3, 8, 1, 3, 1, 1)
418 /* OMAP-1610 USB0 alternate configuration */
419 MUX_CFG("W9_USB0_TXEN", B, 9, 5, 2, 19, 0, 2, 0, 1)
420 MUX_CFG("AA9_USB0_VP", B, 6, 5, 2, 18, 0, 2, 0, 1)
421 MUX_CFG("Y5_USB0_RCV", C, 21, 5, 3, 1, 0, 1, 0, 1)
422 MUX_CFG("R9_USB0_VM", C, 18, 5, 3, 0, 0, 3, 0, 1)
423 MUX_CFG("V6_USB0_TXD", C, 27, 5, 3, 3, 0, 3, 0, 1)
424 MUX_CFG("W5_USB0_SE0", C, 24, 5, 3, 2, 0, 3, 0, 1)
425 MUX_CFG("V9_USB0_SPEED", B, 12, 5, 2, 20, 0, 2, 0, 1)
426 MUX_CFG("Y10_USB0_SUSP", B, 3, 5, 2, 17, 0, 2, 0, 1)
429 MUX_CFG("W9_USB2_TXEN", B, 9, 1, NA, 0, 0, NA, 0, 1)
430 MUX_CFG("AA9_USB2_VP", B, 6, 1, NA, 0, 0, NA, 0, 1)
431 MUX_CFG("Y5_USB2_RCV", C, 21, 1, NA, 0, 0, NA, 0, 1)
432 MUX_CFG("R8_USB2_VM", C, 18, 1, NA, 0, 0, NA, 0, 1)
433 MUX_CFG("V6_USB2_TXD", C, 27, 2, NA, 0, 0, NA, 0, 1)
434 MUX_CFG("W5_USB2_SE0", C, 24, 2, NA, 0, 0, NA, 0, 1)
438 MUX_CFG("R13_1610_UART1_TX", A, 12, 6, 2, 10, 0, 2, 10, 1)
439 MUX_CFG("V14_1610_UART1_RX", 9, 18, 0, 2, 2, 0, 2, 2, 1)
440 MUX_CFG("R14_1610_UART1_CTS", 9, 15, 0, 2, 1, 0, 2, 1, 1)
441 MUX_CFG("AA15_1610_UART1_RTS", 9, 12, 1, 2, 0, 0, 2, 0, 1)
444 MUX_CFG("I2C_SCL", 7, 24, 0, NA, 0, 0, NA, 0, 0)
445 MUX_CFG("I2C_SDA", 7, 27, 0, NA, 0, 0, NA, 0, 0)
448 MUX_CFG("F18_1610_KBC0", 3, 15, 0, 0, 5, 1, 0, 0, 0)
449 MUX_CFG("D20_1610_KBC1", 3, 12, 0, 0, 4, 1, 0, 0, 0)
450 MUX_CFG("D19_1610_KBC2", 3, 9, 0, 0, 3, 1, 0, 0, 0)
451 MUX_CFG("E18_1610_KBC3", 3, 6, 0, 0, 2, 1, 0, 0, 0)
452 MUX_CFG("C21_1610_KBC4", 3, 3, 0, 0, 1, 1, 0, 0, 0)
453 MUX_CFG("G18_1610_KBR0", 4, 0, 0, 0, 10, 1, 0, 1, 0)
454 MUX_CFG("F19_1610_KBR1", 3, 27, 0, 0, 9, 1, 0, 1, 0)
455 MUX_CFG("H14_1610_KBR2", 3, 24, 0, 0, 8, 1, 0, 1, 0)
456 MUX_CFG("E20_1610_KBR3", 3, 21, 0, 0, 7, 1, 0, 1, 0)
457 MUX_CFG("E19_1610_KBR4", 3, 18, 0, 0, 6, 1, 0, 1, 0)
458 MUX_CFG("N19_1610_KBR5", 6, 12, 1, 1, 2, 1, 1, 1, 0)
460 /* Power management */
461 MUX_CFG("T20_1610_LOW_PWR", 7, 12, 1, 0, 0, 0, NA, 0, 0)
464 #endif /* __MUX_C__ */
466 extern int omap_cfg_reg(reg_cfg_t reg_cfg);