1 /* linux/include/asm-arm/arch-s3c2410/regs-serial.h
3 * From linux/include/asm-arm/hardware/serial_s3c2410.h
5 * Internal header file for Samsung S3C2410 serial ports (UART0-2)
7 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
9 * Additional defines, (c) 2003 Simtec Electronics (linux@simtec.co.uk)
13 * Internal header file for MX1ADS serial ports (UART1 & 2)
15 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 #ifndef __ASM_ARM_REGS_SERIAL_H
33 #define __ASM_ARM_REGS_SERIAL_H
35 #define S3C2410_VA_UART0 (S3C2410_VA_UART)
36 #define S3C2410_VA_UART1 (S3C2410_VA_UART + 0x4000 )
37 #define S3C2410_VA_UART2 (S3C2410_VA_UART + 0x8000 )
39 #define S3C2410_PA_UART0 (S3C2410_PA_UART)
40 #define S3C2410_PA_UART1 (S3C2410_PA_UART + 0x4000 )
41 #define S3C2410_PA_UART2 (S3C2410_PA_UART + 0x8000 )
43 #define S3C2410_URXH (0x24)
44 #define S3C2410_UTXH (0x20)
45 #define S3C2410_ULCON (0x00)
46 #define S3C2410_UCON (0x04)
47 #define S3C2410_UFCON (0x08)
48 #define S3C2410_UMCON (0x0C)
49 #define S3C2410_UBRDIV (0x28)
50 #define S3C2410_UTRSTAT (0x10)
51 #define S3C2410_UERSTAT (0x14)
52 #define S3C2410_UFSTAT (0x18)
53 #define S3C2410_UMSTAT (0x1C)
55 #define S3C2410_LCON_CFGMASK ((0xF<<3)|(0x3))
57 #define S3C2410_LCON_CS5 (0x0)
58 #define S3C2410_LCON_CS6 (0x1)
59 #define S3C2410_LCON_CS7 (0x2)
60 #define S3C2410_LCON_CS8 (0x3)
61 #define S3C2410_LCON_CSMASK (0x3)
63 #define S3C2410_LCON_PNONE (0x0)
64 #define S3C2410_LCON_PEVEN (0x5 << 3)
65 #define S3C2410_LCON_PODD (0x4 << 3)
66 #define S3C2410_LCON_PMASK (0x7 << 3)
68 #define S3C2410_LCON_STOPB (1<<2)
70 #define S3C2410_UCON_UCLK (1<<10)
71 #define S3C2410_UCON_SBREAK (1<<4)
73 #define S3C2410_UCON_TXILEVEL (1<<9)
74 #define S3C2410_UCON_RXILEVEL (1<<8)
75 #define S3C2410_UCON_TXIRQMODE (1<<2)
76 #define S3C2410_UCON_RXIRQMODE (1<<0)
77 #define S3C2410_UCON_RXFIFO_TOI (1<<7)
79 #define S3C2410_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | S3C2410_UCON_RXILEVEL \
80 | S3C2410_UCON_TXIRQMODE | S3C2410_UCON_RXIRQMODE \
81 | S3C2410_UCON_RXFIFO_TOI)
83 #define S3C2410_UFCON_FIFOMODE (1<<0)
84 #define S3C2410_UFCON_TXTRIG0 (0<<6)
85 #define S3C2410_UFCON_RXTRIG8 (1<<4)
86 #define S3C2410_UFCON_RXTRIG12 (2<<4)
88 #define S3C2410_UFCON_RESETBOTH (3<<1)
90 #define S3C2410_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | S3C2410_UFCON_TXTRIG0 \
91 | S3C2410_UFCON_RXTRIG8 )
93 #define S3C2410_UFSTAT_TXFULL (1<<9)
94 #define S3C2410_UFSTAT_RXFULL (1<<8)
95 #define S3C2410_UFSTAT_TXMASK (15<<4)
96 #define S3C2410_UFSTAT_TXSHIFT (4)
97 #define S3C2410_UFSTAT_RXMASK (15<<0)
98 #define S3C2410_UFSTAT_RXSHIFT (0)
100 #define S3C2410_UTRSTAT_TXFE (1<<1)
101 #define S3C2410_UTRSTAT_RXDR (1<<0)
103 #define S3C2410_UERSTAT_OVERRUN (1<<0)
104 #define S3C2410_UERSTAT_FRAME (1<<2)
105 #define S3C2410_UERSTAT_ANY (S3C2410_UERSTAT_OVERRUN | S3C2410_UERSTAT_FRAME)
107 /* fifo size information */
109 #define S3C2410_UFCON_RXC(fcon) (((fcon) & S3C2410_UFSTAT_RXMASK) >> S3C2410_UFSTAT_RXSHIFT)
110 #define S3C2410_UFCON_TXC(fcon) (((fcon) & S3C2410_UFSTAT_TXMASK) >> S3C2410_UFSTAT_TXSHIFT)
112 #define S3C2410_UMSTAT_CTS (1<<0)
113 #define S3C2410_UMSTAT_DeltaCTS (1<<2)
116 /* configuration structure for per-machine configurations for the
119 * the pointer is setup by the machine specific initialisation from the
120 * arch/arm/mach-s3c2410/ directory.
123 struct s3c2410_uartcfg {
124 unsigned char hwport; /* hardware port number */
125 unsigned char unused;
126 unsigned short flags;
128 unsigned long *clock; /* pointer to clock rate */
130 unsigned long ucon; /* value of ucon for port */
131 unsigned long ulcon; /* value of ulcon for port */
132 unsigned long ufcon; /* value of ufcon for port */
135 extern struct s3c2410_uartcfg *s3c2410_uartcfgs;
137 #endif /* __ASSEMBLY__ */
139 #endif /* __ASM_ARM_REGS_SERIAL_H */