1 /* linux/include/asm-arm/arch-s3c2410/uncompress.h
3 * (c) 2003 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C2410 - uncompress code
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 * 22-May-2003 BJD Created
14 * 08-Sep-2003 BJD Moved to linux v2.6
15 * 12-Mar-2004 BJD Updated header protection
16 * 12-Oct-2004 BJD Take account of debug uart configuration
17 * 15-Nov-2004 BJD Fixed uart configuration
20 #ifndef __ASM_ARCH_UNCOMPRESS_H
21 #define __ASM_ARCH_UNCOMPRESS_H
23 #include <linux/config.h>
25 /* defines for UART registers */
26 #include "asm/arch/regs-serial.h"
27 #include "asm/arch/regs-gpio.h"
29 #include <asm/arch/map.h>
31 /* working in physical space... */
32 #undef S3C2410_GPIOREG
33 #define S3C2410_GPIOREG(x) ((S3C2410_PA_GPIO + (x)))
35 /* how many bytes we allow into the FIFO at a time in FIFO mode */
38 #define uart_base S3C2410_PA_UART + (0x4000*CONFIG_S3C2410_LOWLEVEL_UART_PORT)
40 static __inline__ void
41 uart_wr(unsigned int reg, unsigned int val)
43 volatile unsigned int *ptr;
45 ptr = (volatile unsigned int *)(reg + uart_base);
49 static __inline__ unsigned int
50 uart_rd(unsigned int reg)
52 volatile unsigned int *ptr;
54 ptr = (volatile unsigned int *)(reg + uart_base);
59 /* currently we do not need the watchdog... */
60 #define arch_decomp_wdog()
63 static void error(char *err);
66 arch_decomp_setup(void)
68 /* we may need to setup the uart(s) here if we are not running
69 * on an BAST... the BAST will have left the uarts configured
70 * after calling linux.
74 /* we can deal with the case the UARTs are being run
75 * in FIFO mode, so that we don't hold up our execution
76 * waiting for tx to happen...
82 int cpuid = *((volatile unsigned int *)S3C2410_GSTATUS1);
84 cpuid &= S3C2410_GSTATUS1_IDMASK;
87 putc('\r'); /* expand newline to \r\n */
89 if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) {
93 level = uart_rd(S3C2410_UFSTAT);
95 if (cpuid == S3C2410_GSTATUS1_2440) {
96 level &= S3C2440_UFSTAT_TXMASK;
97 level >>= S3C2440_UFSTAT_TXSHIFT;
99 level &= S3C2410_UFSTAT_TXMASK;
100 level >>= S3C2410_UFSTAT_TXSHIFT;
103 if (level < FIFO_MAX)
108 /* not using fifos */
110 while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE);
113 /* write byte to transmission register */
114 uart_wr(S3C2410_UTXH, ch);
118 putstr(const char *ptr)
120 for (; *ptr != '\0'; ptr++) {
125 #endif /* __ASM_ARCH_UNCOMPRESS_H */