1 #ifndef _H8300_SYSTEM_H
2 #define _H8300_SYSTEM_H
4 #include <linux/config.h> /* get configuration macros */
5 #include <linux/kernel.h>
6 #include <linux/linkage.h>
8 #define prepare_to_switch() do { } while(0)
11 * switch_to(n) should switch tasks to task ptr, first checking that
12 * ptr isn't the current task, in which case it does nothing. This
13 * also clears the TS-flag if the task we switched to has used the
14 * math co-processor latest.
17 * switch_to() saves the extra registers, that are not saved
18 * automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and
19 * a0-a1. Some of these are used by schedule() and its predecessors
20 * and so we might get see unexpected behaviors when a task returns
21 * with unexpected register values.
23 * syscall stores these registers itself and none of them are used
24 * by syscall after the function in the syscall has been called.
26 * Beware that resume now expects *next to be in d1 and the offset of
27 * tss to be in a1. This saves a few instructions as we no longer have
28 * to push them onto the stack and read them back right after.
30 * 02/17/96 - Jes Sorensen (jds@kom.auc.dk)
32 * Changed 96/09/19 by Andreas Schwab
33 * pass prev in a0, next in a1, offset of tss in d1, and whether
34 * the mm structures are shared in d2 (to avoid atc flushing).
36 * H8/300 Porting 2002/09/04 Yoshinori Sato
39 asmlinkage void resume(void);
40 #define switch_to(prev,next,last) { \
42 __asm__ __volatile__( \
49 : "r" (&(prev->thread)), \
50 "r" (&(next->thread)), \
52 : "cc", "er0", "er1", "er2", "er3"); \
56 #define __sti() asm volatile ("andc #0x7f,ccr")
57 #define __cli() asm volatile ("orc #0x80,ccr")
59 #define __save_flags(x) \
60 asm volatile ("stc ccr,%w0":"=r" (x))
62 #define __restore_flags(x) \
63 asm volatile ("ldc %w0,ccr": :"r" (x))
65 #define irqs_disabled() \
67 unsigned char flags; \
68 __save_flags(flags); \
69 ((flags & 0x80) == 0x80); \
72 #define iret() __asm__ __volatile__ ("rte": : :"memory", "sp", "cc")
74 /* For spinlocks etc */
75 #define local_irq_disable() __cli()
76 #define local_irq_enable() __sti()
77 #define local_irq_save(x) ({ __save_flags(x); local_irq_disable(); })
78 #define local_irq_restore(x) __restore_flags(x)
79 #define local_save_flags(x) __save_flags(x)
82 * Force strict CPU ordering.
83 * Not really required on H8...
85 #define nop() asm volatile ("nop"::)
86 #define mb() asm volatile ("" : : :"memory")
87 #define rmb() asm volatile ("" : : :"memory")
88 #define wmb() asm volatile ("" : : :"memory")
89 #define set_rmb(var, value) do { xchg(&var, value); } while (0)
90 #define set_mb(var, value) set_rmb(var, value)
91 #define set_wmb(var, value) do { var = value; wmb(); } while (0)
95 #define smp_rmb() rmb()
96 #define smp_wmb() wmb()
97 #define smp_read_barrier_depends() read_barrier_depends()
99 #define smp_mb() barrier()
100 #define smp_rmb() barrier()
101 #define smp_wmb() barrier()
102 #define smp_read_barrier_depends() do { } while(0)
105 #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
106 #define tas(ptr) (xchg((ptr),1))
108 struct __xchg_dummy { unsigned long a[100]; };
109 #define __xg(x) ((volatile struct __xchg_dummy *)(x))
111 static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
113 unsigned long tmp, flags;
115 local_irq_save(flags);
122 : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "er0","memory");
128 : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
134 : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
139 local_irq_restore(flags);
143 #define HARD_RESET_NOW() ({ \
144 local_irq_disable(); \
148 #endif /* _H8300_SYSTEM_H */