5 * This file contains the definitions for the emulated IO instructions
6 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
7 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
8 * versions of the single-IO instructions (inb_p/inw_p/..).
10 * This file is not meant to be obfuscating: it's just complicated to
11 * (a) handle it all in a way that makes gcc able to optimize it as
12 * well as possible and (b) trying to avoid writing the same thing
13 * over and over again with slight variations and possibly making a
16 * Copyright (C) 1998-2003 Hewlett-Packard Co
17 * David Mosberger-Tang <davidm@hpl.hp.com>
18 * Copyright (C) 1999 Asit Mallick <asit.k.mallick@intel.com>
19 * Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
22 /* We don't use IO slowdowns on the ia64, but.. */
23 #define __SLOW_DOWN_IO do { } while (0)
24 #define SLOW_DOWN_IO do { } while (0)
26 #define __IA64_UNCACHED_OFFSET 0xc000000000000000 /* region 6 */
29 * The legacy I/O space defined by the ia64 architecture supports only 65536 ports, but
30 * large machines may have multiple other I/O spaces so we can't place any a priori limit
31 * on IO_SPACE_LIMIT. These additional spaces are described in ACPI.
33 #define IO_SPACE_LIMIT 0xffffffffffffffffUL
35 #define MAX_IO_SPACES 16
36 #define IO_SPACE_BITS 24
37 #define IO_SPACE_SIZE (1UL << IO_SPACE_BITS)
39 #define IO_SPACE_NR(port) ((port) >> IO_SPACE_BITS)
40 #define IO_SPACE_BASE(space) ((space) << IO_SPACE_BITS)
41 #define IO_SPACE_PORT(port) ((port) & (IO_SPACE_SIZE - 1))
43 #define IO_SPACE_SPARSE_ENCODING(p) ((((p) >> 2) << 12) | (p & 0xfff))
46 unsigned long mmio_base; /* base in MMIO space */
50 extern struct io_space io_space[];
51 extern unsigned int num_io_spaces;
55 #include <asm/intrinsics.h>
56 #include <asm/machvec.h>
58 #include <asm/system.h>
61 * Change virtual addresses to physical addresses and vv.
63 static inline unsigned long
64 virt_to_phys (volatile void *address)
66 return (unsigned long) address - PAGE_OFFSET;
70 phys_to_virt (unsigned long address)
72 return (void *) (address + PAGE_OFFSET);
75 #define ARCH_HAS_VALID_PHYS_ADDR_RANGE
76 extern int valid_phys_addr_range (unsigned long addr, size_t *count); /* efi.c */
79 * The following two macros are deprecated and scheduled for removal.
80 * Please use the PCI-DMA interface defined in <asm/pci.h> instead.
82 #define bus_to_virt phys_to_virt
83 #define virt_to_bus virt_to_phys
84 #define page_to_bus page_to_phys
89 * Memory fence w/accept. This should never be used in code that is
92 #define __ia64_mf_a() ia64_mfa()
94 static inline const unsigned long
95 __ia64_get_io_port_base (void)
97 extern unsigned long ia64_iobase;
103 __ia64_mk_io_addr (unsigned long port)
105 struct io_space *space;
106 unsigned long offset;
108 space = &io_space[IO_SPACE_NR(port)];
109 port = IO_SPACE_PORT(port);
111 offset = IO_SPACE_SPARSE_ENCODING(port);
115 return (void *) (space->mmio_base | offset);
118 #define __ia64_inb ___ia64_inb
119 #define __ia64_inw ___ia64_inw
120 #define __ia64_inl ___ia64_inl
121 #define __ia64_outb ___ia64_outb
122 #define __ia64_outw ___ia64_outw
123 #define __ia64_outl ___ia64_outl
124 #define __ia64_readb ___ia64_readb
125 #define __ia64_readw ___ia64_readw
126 #define __ia64_readl ___ia64_readl
127 #define __ia64_readq ___ia64_readq
128 #define __ia64_readb_relaxed ___ia64_readb
129 #define __ia64_readw_relaxed ___ia64_readw
130 #define __ia64_readl_relaxed ___ia64_readl
131 #define __ia64_readq_relaxed ___ia64_readq
132 #define __ia64_writeb ___ia64_writeb
133 #define __ia64_writew ___ia64_writew
134 #define __ia64_writel ___ia64_writel
135 #define __ia64_writeq ___ia64_writeq
138 * For the in/out routines, we need to do "mf.a" _after_ doing the I/O access to ensure
139 * that the access has completed before executing other I/O accesses. Since we're doing
140 * the accesses through an uncachable (UC) translation, the CPU will execute them in
141 * program order. However, we still need to tell the compiler not to shuffle them around
142 * during optimization, which is why we use "volatile" pointers.
145 static inline unsigned int
146 ___ia64_inb (unsigned long port)
148 volatile unsigned char *addr = __ia64_mk_io_addr(port);
156 static inline unsigned int
157 ___ia64_inw (unsigned long port)
159 volatile unsigned short *addr = __ia64_mk_io_addr(port);
167 static inline unsigned int
168 ___ia64_inl (unsigned long port)
170 volatile unsigned int *addr = __ia64_mk_io_addr(port);
179 ___ia64_outb (unsigned char val, unsigned long port)
181 volatile unsigned char *addr = __ia64_mk_io_addr(port);
188 ___ia64_outw (unsigned short val, unsigned long port)
190 volatile unsigned short *addr = __ia64_mk_io_addr(port);
197 ___ia64_outl (unsigned int val, unsigned long port)
199 volatile unsigned int *addr = __ia64_mk_io_addr(port);
206 __insb (unsigned long port, void *dst, unsigned long count)
208 unsigned char *dp = dst;
211 *dp++ = platform_inb(port);
215 __insw (unsigned long port, void *dst, unsigned long count)
217 unsigned short *dp = dst;
220 *dp++ = platform_inw(port);
224 __insl (unsigned long port, void *dst, unsigned long count)
226 unsigned int *dp = dst;
229 *dp++ = platform_inl(port);
233 __outsb (unsigned long port, const void *src, unsigned long count)
235 const unsigned char *sp = src;
238 platform_outb(*sp++, port);
242 __outsw (unsigned long port, const void *src, unsigned long count)
244 const unsigned short *sp = src;
247 platform_outw(*sp++, port);
251 __outsl (unsigned long port, void *src, unsigned long count)
253 const unsigned int *sp = src;
256 platform_outl(*sp++, port);
260 * Unfortunately, some platforms are broken and do not follow the IA-64 architecture
261 * specification regarding legacy I/O support. Thus, we have to make these operations
262 * platform dependent...
264 #define __inb platform_inb
265 #define __inw platform_inw
266 #define __inl platform_inl
267 #define __outb platform_outb
268 #define __outw platform_outw
269 #define __outl platform_outl
271 #define inb(p) __inb(p)
272 #define inw(p) __inw(p)
273 #define inl(p) __inl(p)
274 #define insb(p,d,c) __insb(p,d,c)
275 #define insw(p,d,c) __insw(p,d,c)
276 #define insl(p,d,c) __insl(p,d,c)
277 #define outb(v,p) __outb(v,p)
278 #define outw(v,p) __outw(v,p)
279 #define outl(v,p) __outl(v,p)
280 #define outsb(p,s,c) __outsb(p,s,c)
281 #define outsw(p,s,c) __outsw(p,s,c)
282 #define outsl(p,s,c) __outsl(p,s,c)
285 * The address passed to these functions are ioremap()ped already.
287 * We need these to be machine vectors since some platforms don't provide
288 * DMA coherence via PIO reads (PCI drivers and the spec imply that this is
289 * a good idea). Writes are ok though for all existing ia64 platforms (and
290 * hopefully it'll stay that way).
292 static inline unsigned char
293 ___ia64_readb (void *addr)
295 return *(volatile unsigned char *)addr;
298 static inline unsigned short
299 ___ia64_readw (void *addr)
301 return *(volatile unsigned short *)addr;
304 static inline unsigned int
305 ___ia64_readl (void *addr)
307 return *(volatile unsigned int *) addr;
310 static inline unsigned long
311 ___ia64_readq (void *addr)
313 return *(volatile unsigned long *) addr;
317 __writeb (unsigned char val, void *addr)
319 *(volatile unsigned char *) addr = val;
323 __writew (unsigned short val, void *addr)
325 *(volatile unsigned short *) addr = val;
329 __writel (unsigned int val, void *addr)
331 *(volatile unsigned int *) addr = val;
335 __writeq (unsigned long val, void *addr)
337 *(volatile unsigned long *) addr = val;
340 #define __readb platform_readb
341 #define __readw platform_readw
342 #define __readl platform_readl
343 #define __readq platform_readq
344 #define __readb_relaxed platform_readb_relaxed
345 #define __readw_relaxed platform_readw_relaxed
346 #define __readl_relaxed platform_readl_relaxed
347 #define __readq_relaxed platform_readq_relaxed
349 #define readb(a) __readb((void *)(a))
350 #define readw(a) __readw((void *)(a))
351 #define readl(a) __readl((void *)(a))
352 #define readq(a) __readq((void *)(a))
353 #define readb_relaxed(a) __readb_relaxed((void *)(a))
354 #define readw_relaxed(a) __readw_relaxed((void *)(a))
355 #define readl_relaxed(a) __readl_relaxed((void *)(a))
356 #define readq_relaxed(a) __readq_relaxed((void *)(a))
357 #define __raw_readb readb
358 #define __raw_readw readw
359 #define __raw_readl readl
360 #define __raw_readq readq
361 #define __raw_readb_relaxed readb_relaxed
362 #define __raw_readw_relaxed readw_relaxed
363 #define __raw_readl_relaxed readl_relaxed
364 #define __raw_readq_relaxed readq_relaxed
365 #define writeb(v,a) __writeb((v), (void *) (a))
366 #define writew(v,a) __writew((v), (void *) (a))
367 #define writel(v,a) __writel((v), (void *) (a))
368 #define writeq(v,a) __writeq((v), (void *) (a))
369 #define __raw_writeb writeb
370 #define __raw_writew writew
371 #define __raw_writel writel
372 #define __raw_writeq writeq
395 * An "address" in IO memory space is not clearly either an integer or a pointer. We will
396 * accept both, thus the casts.
398 * On ia-64, we access the physical I/O memory space through the uncached kernel region.
401 ioremap (unsigned long offset, unsigned long size)
403 return (void *) (__IA64_UNCACHED_OFFSET | (offset));
411 #define ioremap_nocache(o,s) ioremap(o,s)
416 * String version of IO memory access ops:
418 extern void __ia64_memcpy_fromio (void *, unsigned long, long);
419 extern void __ia64_memcpy_toio (unsigned long, void *, long);
420 extern void __ia64_memset_c_io (unsigned long, unsigned long, long);
422 #define memcpy_fromio(to,from,len) \
423 __ia64_memcpy_fromio((to),(unsigned long)(from),(len))
424 #define memcpy_toio(to,from,len) \
425 __ia64_memcpy_toio((unsigned long)(to),(from),(len))
426 #define memset_io(addr,c,len) \
427 __ia64_memset_c_io((unsigned long)(addr),0x0101010101010101UL*(u8)(c),(len))
430 #define dma_cache_inv(_start,_size) do { } while (0)
431 #define dma_cache_wback(_start,_size) do { } while (0)
432 #define dma_cache_wback_inv(_start,_size) do { } while (0)
434 # endif /* __KERNEL__ */
437 * Enabling BIO_VMERGE_BOUNDARY forces us to turn off I/O MMU bypassing. It is said that
438 * BIO-level virtual merging can give up to 4% performance boost (not verified for ia64).
439 * On the other hand, we know that I/O MMU bypassing gives ~8% performance improvement on
440 * SPECweb-like workloads on zx1-based machines. Thus, for now we favor I/O MMU bypassing
441 * over BIO-level virtual merging.
443 extern unsigned long ia64_max_iommu_merge_mask;
445 #define BIO_VMERGE_BOUNDARY 0
448 * It makes no sense at all to have this BIO_VMERGE_BOUNDARY macro here. Should be
449 * replaced by dma_merge_mask() or something of that sort. Note: the only way
450 * BIO_VMERGE_BOUNDARY is used is to mask off bits. Effectively, our definition gets
453 * addr & ((ia64_max_iommu_merge_mask + 1) - 1) == (addr & ia64_max_iommu_vmerge_mask)
455 * which is precisely what we want.
457 #define BIO_VMERGE_BOUNDARY (ia64_max_iommu_merge_mask + 1)
460 #endif /* _ASM_IA64_IO_H */