1 #ifndef _ASM_IA64_SAL_H
2 #define _ASM_IA64_SAL_H
5 * System Abstraction Layer definitions.
7 * This is based on version 2.5 of the manual "IA-64 System
10 * Copyright (C) 2001 Intel
11 * Copyright (C) 2002 Jenna Hall <jenna.s.hall@intel.com>
12 * Copyright (C) 2001 Fred Lewis <frederick.v.lewis@intel.com>
13 * Copyright (C) 1998, 1999, 2001, 2003 Hewlett-Packard Co
14 * David Mosberger-Tang <davidm@hpl.hp.com>
15 * Copyright (C) 1999 Srinivasa Prasad Thirumalachar <sprasad@sprasad.engr.sgi.com>
17 * 02/01/04 J. Hall Updated Error Record Structures to conform to July 2001
18 * revision of the SAL spec.
19 * 01/01/03 fvlewis Updated Error Record Structures to conform with Nov. 2000
20 * revision of the SAL spec.
21 * 99/09/29 davidm Updated for SAL 2.6.
22 * 00/03/29 cfleck Updated SAL Error Logging info for processor (SAL 2.6)
23 * (plus examples of platform error info structures from smariset @ Intel)
26 #define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT 0
27 #define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT 1
28 #define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT 2
29 #define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT 3
31 #define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK (1<<IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT)
32 #define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT)
33 #define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT)
34 #define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT (1<<IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT)
38 #include <linux/bcd.h>
39 #include <linux/spinlock.h>
40 #include <linux/efi.h>
43 #include <asm/system.h>
46 extern spinlock_t sal_lock;
48 /* SAL spec _requires_ eight args for each call. */
49 #define __SAL_CALL(result,a0,a1,a2,a3,a4,a5,a6,a7) \
50 result = (*ia64_sal)(a0,a1,a2,a3,a4,a5,a6,a7)
52 # define SAL_CALL(result,args...) do { \
53 unsigned long __ia64_sc_flags; \
54 struct ia64_fpreg __ia64_sc_fr[6]; \
55 ia64_save_scratch_fpregs(__ia64_sc_fr); \
56 spin_lock_irqsave(&sal_lock, __ia64_sc_flags); \
57 __SAL_CALL(result, args); \
58 spin_unlock_irqrestore(&sal_lock, __ia64_sc_flags); \
59 ia64_load_scratch_fpregs(__ia64_sc_fr); \
62 # define SAL_CALL_NOLOCK(result,args...) do { \
63 unsigned long __ia64_scn_flags; \
64 struct ia64_fpreg __ia64_scn_fr[6]; \
65 ia64_save_scratch_fpregs(__ia64_scn_fr); \
66 local_irq_save(__ia64_scn_flags); \
67 __SAL_CALL(result, args); \
68 local_irq_restore(__ia64_scn_flags); \
69 ia64_load_scratch_fpregs(__ia64_scn_fr); \
72 # define SAL_CALL_REENTRANT(result,args...) do { \
73 struct ia64_fpreg __ia64_scs_fr[6]; \
74 ia64_save_scratch_fpregs(__ia64_scs_fr); \
76 __SAL_CALL(result, args); \
78 ia64_load_scratch_fpregs(__ia64_scs_fr); \
81 #define SAL_SET_VECTORS 0x01000000
82 #define SAL_GET_STATE_INFO 0x01000001
83 #define SAL_GET_STATE_INFO_SIZE 0x01000002
84 #define SAL_CLEAR_STATE_INFO 0x01000003
85 #define SAL_MC_RENDEZ 0x01000004
86 #define SAL_MC_SET_PARAMS 0x01000005
87 #define SAL_REGISTER_PHYSICAL_ADDR 0x01000006
89 #define SAL_CACHE_FLUSH 0x01000008
90 #define SAL_CACHE_INIT 0x01000009
91 #define SAL_PCI_CONFIG_READ 0x01000010
92 #define SAL_PCI_CONFIG_WRITE 0x01000011
93 #define SAL_FREQ_BASE 0x01000012
95 #define SAL_UPDATE_PAL 0x01000020
97 struct ia64_sal_retval {
99 * A zero status value indicates call completed without error.
100 * A negative status value indicates reason of call failure.
101 * A positive status value indicates success but an
102 * informational value should be printed (e.g., "reboot for
103 * change to take effect").
111 typedef struct ia64_sal_retval (*ia64_sal_handler) (u64, ...);
114 SAL_FREQ_BASE_PLATFORM = 0,
115 SAL_FREQ_BASE_INTERVAL_TIMER = 1,
116 SAL_FREQ_BASE_REALTIME_CLOCK = 2
120 * The SAL system table is followed by a variable number of variable
121 * length descriptors. The structure of these descriptors follows
123 * The defininition follows SAL specs from July 2000
125 struct ia64_sal_systab {
126 u8 signature[4]; /* should be "SST_" */
127 u32 size; /* size of this table in bytes */
130 u16 entry_count; /* # of entries in variable portion */
137 /* oem_id & product_id: terminating NUL is missing if string is exactly 32 bytes long. */
139 u8 product_id[32]; /* ASCII product id */
143 enum sal_systab_entry_type {
144 SAL_DESC_ENTRY_POINT = 0,
146 SAL_DESC_PLATFORM_FEATURE = 2,
149 SAL_DESC_AP_WAKEUP = 5
161 #define SAL_DESC_SIZE(type) "\060\040\020\040\020\020"[(unsigned) type]
163 typedef struct ia64_sal_desc_entry_point {
170 }ia64_sal_desc_entry_point_t;
172 typedef struct ia64_sal_desc_memory {
174 u8 used_by_sal; /* needs to be mapped for SAL? */
175 u8 mem_attr; /* current memory attribute setting */
176 u8 access_rights; /* access rights set up by SAL */
177 u8 mem_attr_mask; /* mask of supported memory attributes */
179 u8 mem_type; /* memory type */
180 u8 mem_usage; /* memory usage */
181 u64 addr; /* physical address of memory */
182 u32 length; /* length (multiple of 4KB pages) */
185 } ia64_sal_desc_memory_t;
187 typedef struct ia64_sal_desc_platform_feature {
191 } ia64_sal_desc_platform_feature_t;
193 typedef struct ia64_sal_desc_tr {
195 u8 tr_type; /* 0 == instruction, 1 == data */
196 u8 regnum; /* translation register number */
198 u64 addr; /* virtual address of area covered */
199 u64 page_size; /* encoded page size */
201 } ia64_sal_desc_tr_t;
203 typedef struct ia64_sal_desc_ptc {
206 u32 num_domains; /* # of coherence domains */
207 u64 domain_info; /* physical address of domain info table */
208 } ia64_sal_desc_ptc_t;
210 typedef struct ia64_sal_ptc_domain_info {
211 u64 proc_count; /* number of processors in domain */
212 u64 proc_list; /* physical address of LID array */
213 } ia64_sal_ptc_domain_info_t;
215 typedef struct ia64_sal_ptc_domain_proc_entry {
216 u64 id : 8; /* id of processor */
217 u64 eid : 8; /* eid of processor */
218 } ia64_sal_ptc_domain_proc_entry_t;
221 #define IA64_SAL_AP_EXTERNAL_INT 0
223 typedef struct ia64_sal_desc_ap_wakeup {
225 u8 mechanism; /* 0 == external interrupt */
227 u64 vector; /* interrupt vector in range 0x10-0xff */
228 } ia64_sal_desc_ap_wakeup_t ;
230 extern ia64_sal_handler ia64_sal;
231 extern struct ia64_sal_desc_ptc *ia64_ptc_domain_info;
233 extern unsigned short sal_revision; /* supported SAL spec revision */
234 extern unsigned short sal_version; /* SAL version; OEM dependent */
235 #define SAL_VERSION_CODE(major, minor) ((BIN2BCD(major) << 8) | BIN2BCD(minor))
237 extern const char *ia64_sal_strerror (long status);
238 extern void ia64_sal_init (struct ia64_sal_systab *sal_systab);
240 /* SAL information type encodings */
242 SAL_INFO_TYPE_MCA = 0, /* Machine check abort information */
243 SAL_INFO_TYPE_INIT = 1, /* Init information */
244 SAL_INFO_TYPE_CMC = 2, /* Corrected machine check information */
245 SAL_INFO_TYPE_CPE = 3 /* Corrected platform error information */
248 /* Encodings for machine check parameter types */
250 SAL_MC_PARAM_RENDEZ_INT = 1, /* Rendezvous interrupt */
251 SAL_MC_PARAM_RENDEZ_WAKEUP = 2, /* Wakeup */
252 SAL_MC_PARAM_CPE_INT = 3 /* Corrected Platform Error Int */
255 /* Encodings for rendezvous mechanisms */
257 SAL_MC_PARAM_MECHANISM_INT = 1, /* Use interrupt */
258 SAL_MC_PARAM_MECHANISM_MEM = 2 /* Use memory synchronization variable*/
261 /* Encodings for vectors which can be registered by the OS with SAL */
263 SAL_VECTOR_OS_MCA = 0,
264 SAL_VECTOR_OS_INIT = 1,
265 SAL_VECTOR_OS_BOOT_RENDEZ = 2
268 /* Encodings for mca_opt parameter sent to SAL_MC_SET_PARAMS */
269 #define SAL_MC_PARAM_RZ_ALWAYS 0x1
270 #define SAL_MC_PARAM_BINIT_ESCALATE 0x10
273 * Definition of the SAL Error Log from the SAL spec
276 /* SAL Error Record Section GUID Definitions */
277 #define SAL_PROC_DEV_ERR_SECT_GUID \
278 EFI_GUID(0xe429faf1, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
279 #define SAL_PLAT_MEM_DEV_ERR_SECT_GUID \
280 EFI_GUID(0xe429faf2, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
281 #define SAL_PLAT_SEL_DEV_ERR_SECT_GUID \
282 EFI_GUID(0xe429faf3, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
283 #define SAL_PLAT_PCI_BUS_ERR_SECT_GUID \
284 EFI_GUID(0xe429faf4, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
285 #define SAL_PLAT_SMBIOS_DEV_ERR_SECT_GUID \
286 EFI_GUID(0xe429faf5, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
287 #define SAL_PLAT_PCI_COMP_ERR_SECT_GUID \
288 EFI_GUID(0xe429faf6, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
289 #define SAL_PLAT_SPECIFIC_ERR_SECT_GUID \
290 EFI_GUID(0xe429faf7, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
291 #define SAL_PLAT_HOST_CTLR_ERR_SECT_GUID \
292 EFI_GUID(0xe429faf8, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
293 #define SAL_PLAT_BUS_ERR_SECT_GUID \
294 EFI_GUID(0xe429faf9, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
296 #define MAX_CACHE_ERRORS 6
297 #define MAX_TLB_ERRORS 6
298 #define MAX_BUS_ERRORS 1
300 /* Definition of version according to SAL spec for logging purposes */
301 typedef struct sal_log_revision {
302 u8 minor; /* BCD (0..99) */
303 u8 major; /* BCD (0..99) */
304 } sal_log_revision_t;
306 /* Definition of timestamp according to SAL spec for logging purposes */
307 typedef struct sal_log_timestamp {
308 u8 slh_second; /* Second (0..59) */
309 u8 slh_minute; /* Minute (0..59) */
310 u8 slh_hour; /* Hour (0..23) */
312 u8 slh_day; /* Day (1..31) */
313 u8 slh_month; /* Month (1..12) */
314 u8 slh_year; /* Year (00..99) */
315 u8 slh_century; /* Century (19, 20, 21, ...) */
316 } sal_log_timestamp_t;
318 /* Definition of log record header structures */
319 typedef struct sal_log_record_header {
320 u64 id; /* Unique monotonically increasing ID */
321 sal_log_revision_t revision; /* Major and Minor revision of header */
322 u16 severity; /* Error Severity */
323 u32 len; /* Length of this error log in bytes */
324 sal_log_timestamp_t timestamp; /* Timestamp */
325 efi_guid_t platform_guid; /* Unique OEM Platform ID */
326 } sal_log_record_header_t;
328 /* Definition of log section header structures */
329 typedef struct sal_log_sec_header {
330 efi_guid_t guid; /* Unique Section ID */
331 sal_log_revision_t revision; /* Major and Minor revision of Section */
333 u32 len; /* Section length */
334 } sal_log_section_hdr_t;
336 typedef struct sal_log_mod_error_info {
339 requestor_identifier : 1,
340 responder_identifier : 1,
341 target_identifier : 1,
346 u64 requestor_identifier;
347 u64 responder_identifier;
348 u64 target_identifier;
350 } sal_log_mod_error_info_t;
352 typedef struct sal_processor_static_info {
362 pal_min_state_area_t min_state_area;
367 struct ia64_fpreg fr[128];
368 } sal_processor_static_info_t;
370 struct sal_cpuid_info {
375 typedef struct sal_log_processor_info {
376 sal_log_section_hdr_t header;
378 u64 proc_error_map : 1,
379 proc_state_param : 1,
381 psi_static_struct : 1,
385 num_reg_file_check : 4,
391 u64 proc_state_parameter;
394 * The rest of this structure consists of variable-length arrays, which can't be
397 sal_log_mod_error_info_t info[0];
399 * This is what the rest looked like if C supported variable-length arrays:
401 * sal_log_mod_error_info_t cache_check_info[.valid.num_cache_check];
402 * sal_log_mod_error_info_t tlb_check_info[.valid.num_tlb_check];
403 * sal_log_mod_error_info_t bus_check_info[.valid.num_bus_check];
404 * sal_log_mod_error_info_t reg_file_check_info[.valid.num_reg_file_check];
405 * sal_log_mod_error_info_t ms_check_info[.valid.num_ms_check];
406 * struct sal_cpuid_info cpuid_info;
407 * sal_processor_static_info_t processor_static_info;
409 } sal_log_processor_info_t;
411 /* Given a sal_log_processor_info_t pointer, return a pointer to the processor_static_info: */
412 #define SAL_LPI_PSI_INFO(l) \
413 ({ sal_log_processor_info_t *_l = (l); \
414 ((sal_processor_static_info_t *) \
415 ((char *) _l->info + ((_l->valid.num_cache_check + _l->valid.num_tlb_check \
416 + _l->valid.num_bus_check + _l->valid.num_reg_file_check \
417 + _l->valid.num_ms_check) * sizeof(sal_log_mod_error_info_t) \
418 + sizeof(struct sal_cpuid_info)))); \
421 /* platform error log structures */
423 typedef struct sal_log_mem_dev_err_info {
424 sal_log_section_hdr_t header;
426 u64 error_status : 1,
461 u8 oem_data[1]; /* Variable length data */
462 } sal_log_mem_dev_err_info_t;
464 typedef struct sal_log_sel_dev_err_info {
465 sal_log_section_hdr_t header;
490 } sal_log_sel_dev_err_info_t;
492 typedef struct sal_log_pci_bus_err_info {
493 sal_log_section_hdr_t header;
517 u8 oem_data[1]; /* Variable length data */
518 } sal_log_pci_bus_err_info_t;
520 typedef struct sal_log_smbios_dev_err_info {
521 sal_log_section_hdr_t header;
532 u8 data[1]; /* data of variable length, length == slsmb_length */
533 } sal_log_smbios_dev_err_info_t;
535 typedef struct sal_log_pci_comp_err_info {
536 sal_log_section_hdr_t header;
559 u64 reg_data_pairs[1];
561 * array of address/data register pairs is num_mem_regs + num_io_regs elements
562 * long. Each array element consists of a u64 address followed by a u64 data
563 * value. The oem_data array immediately follows the reg_data_pairs array
565 u8 oem_data[1]; /* Variable length data */
566 } sal_log_pci_comp_err_info_t;
568 typedef struct sal_log_plat_specific_err_info {
569 sal_log_section_hdr_t header;
578 u8 oem_data[1]; /* platform specific variable length data */
579 } sal_log_plat_specific_err_info_t;
581 typedef struct sal_log_host_ctlr_err_info {
582 sal_log_section_hdr_t header;
597 u8 oem_data[1]; /* Variable length OEM data */
598 } sal_log_host_ctlr_err_info_t;
600 typedef struct sal_log_plat_bus_err_info {
601 sal_log_section_hdr_t header;
616 u8 oem_data[1]; /* Variable length OEM data */
617 } sal_log_plat_bus_err_info_t;
619 /* Overall platform error section structure */
620 typedef union sal_log_platform_err_info {
621 sal_log_mem_dev_err_info_t mem_dev_err;
622 sal_log_sel_dev_err_info_t sel_dev_err;
623 sal_log_pci_bus_err_info_t pci_bus_err;
624 sal_log_smbios_dev_err_info_t smbios_dev_err;
625 sal_log_pci_comp_err_info_t pci_comp_err;
626 sal_log_plat_specific_err_info_t plat_specific_err;
627 sal_log_host_ctlr_err_info_t host_ctlr_err;
628 sal_log_plat_bus_err_info_t plat_bus_err;
629 } sal_log_platform_err_info_t;
631 /* SAL log over-all, multi-section error record structure (processor+platform) */
632 typedef struct err_rec {
633 sal_log_record_header_t sal_elog_header;
634 sal_log_processor_info_t proc_err;
635 sal_log_platform_err_info_t plat_err;
636 u8 oem_data_pad[1024];
640 * Now define a couple of inline functions for improved type checking
644 ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second,
645 unsigned long *drift_info)
647 struct ia64_sal_retval isrv;
649 SAL_CALL(isrv, SAL_FREQ_BASE, which, 0, 0, 0, 0, 0, 0);
650 *ticks_per_second = isrv.v0;
651 *drift_info = isrv.v1;
655 /* Flush all the processor and platform level instruction and/or data caches */
657 ia64_sal_cache_flush (u64 cache_type)
659 struct ia64_sal_retval isrv;
660 SAL_CALL(isrv, SAL_CACHE_FLUSH, cache_type, 0, 0, 0, 0, 0, 0);
665 /* Initialize all the processor and platform level instruction and data caches */
667 ia64_sal_cache_init (void)
669 struct ia64_sal_retval isrv;
670 SAL_CALL(isrv, SAL_CACHE_INIT, 0, 0, 0, 0, 0, 0, 0);
675 * Clear the processor and platform information logged by SAL with respect to the machine
676 * state at the time of MCA's, INITs, CMCs, or CPEs.
679 ia64_sal_clear_state_info (u64 sal_info_type)
681 struct ia64_sal_retval isrv;
682 SAL_CALL_REENTRANT(isrv, SAL_CLEAR_STATE_INFO, sal_info_type, 0,
688 /* Get the processor and platform information logged by SAL with respect to the machine
689 * state at the time of the MCAs, INITs, CMCs, or CPEs.
692 ia64_sal_get_state_info (u64 sal_info_type, u64 *sal_info)
694 struct ia64_sal_retval isrv;
695 SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO, sal_info_type, 0,
696 sal_info, 0, 0, 0, 0);
704 * Get the maximum size of the information logged by SAL with respect to the machine state
705 * at the time of MCAs, INITs, CMCs, or CPEs.
708 ia64_sal_get_state_info_size (u64 sal_info_type)
710 struct ia64_sal_retval isrv;
711 SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO_SIZE, sal_info_type, 0,
719 * Causes the processor to go into a spin loop within SAL where SAL awaits a wakeup from
720 * the monarch processor. Must not lock, because it will not return on any cpu until the
721 * monarch processor sends a wake up.
724 ia64_sal_mc_rendez (void)
726 struct ia64_sal_retval isrv;
727 SAL_CALL_NOLOCK(isrv, SAL_MC_RENDEZ, 0, 0, 0, 0, 0, 0, 0);
732 * Allow the OS to specify the interrupt number to be used by SAL to interrupt OS during
733 * the machine check rendezvous sequence as well as the mechanism to wake up the
734 * non-monarch processor at the end of machine check processing.
735 * Returns the complete ia64_sal_retval because some calls return more than just a status
738 static inline struct ia64_sal_retval
739 ia64_sal_mc_set_params (u64 param_type, u64 i_or_m, u64 i_or_m_val, u64 timeout, u64 rz_always)
741 struct ia64_sal_retval isrv;
742 SAL_CALL(isrv, SAL_MC_SET_PARAMS, param_type, i_or_m, i_or_m_val,
743 timeout, rz_always, 0, 0);
747 /* Read from PCI configuration space */
749 ia64_sal_pci_config_read (u64 pci_config_addr, int type, u64 size, u64 *value)
751 struct ia64_sal_retval isrv;
752 SAL_CALL(isrv, SAL_PCI_CONFIG_READ, pci_config_addr, size, type, 0, 0, 0, 0);
758 /* Write to PCI configuration space */
760 ia64_sal_pci_config_write (u64 pci_config_addr, int type, u64 size, u64 value)
762 struct ia64_sal_retval isrv;
763 SAL_CALL(isrv, SAL_PCI_CONFIG_WRITE, pci_config_addr, size, value,
769 * Register physical addresses of locations needed by SAL when SAL procedures are invoked
773 ia64_sal_register_physical_addr (u64 phys_entry, u64 phys_addr)
775 struct ia64_sal_retval isrv;
776 SAL_CALL(isrv, SAL_REGISTER_PHYSICAL_ADDR, phys_entry, phys_addr,
782 * Register software dependent code locations within SAL. These locations are handlers or
783 * entry points where SAL will pass control for the specified event. These event handlers
784 * are for the bott rendezvous, MCAs and INIT scenarios.
787 ia64_sal_set_vectors (u64 vector_type,
788 u64 handler_addr1, u64 gp1, u64 handler_len1,
789 u64 handler_addr2, u64 gp2, u64 handler_len2)
791 struct ia64_sal_retval isrv;
792 SAL_CALL(isrv, SAL_SET_VECTORS, vector_type,
793 handler_addr1, gp1, handler_len1,
794 handler_addr2, gp2, handler_len2);
799 /* Update the contents of PAL block in the non-volatile storage device */
801 ia64_sal_update_pal (u64 param_buf, u64 scratch_buf, u64 scratch_buf_size,
802 u64 *error_code, u64 *scratch_buf_size_needed)
804 struct ia64_sal_retval isrv;
805 SAL_CALL(isrv, SAL_UPDATE_PAL, param_buf, scratch_buf, scratch_buf_size,
808 *error_code = isrv.v0;
809 if (scratch_buf_size_needed)
810 *scratch_buf_size_needed = isrv.v1;
814 extern unsigned long sal_platform_features;
816 extern int (*salinfo_platform_oemdata)(const u8 *, u8 **, u64 *);
818 struct sal_ret_values {
819 long r8; long r9; long r10; long r11;
822 #endif /* __ASSEMBLY__ */
824 #endif /* _ASM_IA64_SAL_H */