2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved.
9 #ifndef _ASM_IA64_SN_ROUTER_H
10 #define _ASM_IA64_SN_ROUTER_H
13 * Router Register definitions
15 * Macro argument _L always stands for a link number (1 to 8, inclusive).
20 #include <asm/sn/arch.h>
22 typedef uint64_t router_reg_t;
24 #define MAX_ROUTERS 64
26 #define MAX_ROUTER_PATH 80
28 #define ROUTER_REG_CAST (volatile router_reg_t *)
29 typedef signed char port_no_t; /* Type for router port number */
33 #define ROUTERREG_CAST
35 #endif /* __ASSEMBLY__ */
37 #define MAX_ROUTER_PORTS 8 /* Max. number of ports on a router */
39 #define ALL_PORTS ((1 << MAX_ROUTER_PORTS) - 1) /* for 0 based references */
41 #define PORT_INVALID -1 /* Invalid port number */
43 #define IS_META(_rp) ((_rp)->flags & PCFG_ROUTER_META)
45 #define IS_REPEATER(_rp)((_rp)->flags & PCFG_ROUTER_REPEATER)
48 * RR_TURN makes a given number of clockwise turns (0 to 7) from an inport
49 * port to generate an output port.
51 * RR_DISTANCE returns the number of turns necessary (0 to 7) to go from
52 * an input port (_L1 = 1 to 8) to an output port ( _L2 = 1 to 8).
54 * These are written to work on unsigned data.
57 #define RR_TURN(_L, count) ((_L) + (count) > MAX_ROUTER_PORTS ? \
58 (_L) + (count) - MAX_ROUTER_PORTS : \
61 #define RR_DISTANCE(_LS, _LD) ((_LD) >= (_LS) ? \
63 (_LD) + MAX_ROUTER_PORTS - (_LS))
65 /* Router register addresses */
67 #define RR_STATUS_REV_ID 0x00000 /* Status register and Revision ID */
68 #define RR_PORT_RESET 0x00008 /* Multiple port reset */
69 #define RR_PROT_CONF 0x00010 /* Inter-partition protection conf. */
70 #define RR_GLOBAL_PORT_DEF 0x00018 /* Global Port definitions */
71 #define RR_GLOBAL_PARMS0 0x00020 /* Parameters shared by all 8 ports */
72 #define RR_GLOBAL_PARMS1 0x00028 /* Parameters shared by all 8 ports */
73 #define RR_DIAG_PARMS 0x00030 /* Parameters for diag. testing */
74 #define RR_DEBUG_ADDR 0x00038 /* Debug address select - debug port*/
75 #define RR_LB_TO_L2 0x00040 /* Local Block to L2 cntrl intf reg */
76 #define RR_L2_TO_LB 0x00048 /* L2 cntrl intf to Local Block reg */
77 #define RR_JBUS_CONTROL 0x00050 /* read/write timing for JBUS intf */
79 #define RR_SCRATCH_REG0 0x00100 /* Scratch 0 is 64 bits */
80 #define RR_SCRATCH_REG1 0x00108 /* Scratch 1 is 64 bits */
81 #define RR_SCRATCH_REG2 0x00110 /* Scratch 2 is 64 bits */
82 #define RR_SCRATCH_REG3 0x00118 /* Scratch 3 is 1 bit */
83 #define RR_SCRATCH_REG4 0x00120 /* Scratch 4 is 1 bit */
85 #define RR_JBUS0(_D) (((_D) & 0x7) << 3 | 0x00200) /* JBUS0 addresses */
86 #define RR_JBUS1(_D) (((_D) & 0x7) << 3 | 0x00240) /* JBUS1 addresses */
88 #define RR_SCRATCH_REG0_WZ 0x00500 /* Scratch 0 is 64 bits */
89 #define RR_SCRATCH_REG1_WZ 0x00508 /* Scratch 1 is 64 bits */
90 #define RR_SCRATCH_REG2_WZ 0x00510 /* Scratch 2 is 64 bits */
91 #define RR_SCRATCH_REG3_SZ 0x00518 /* Scratch 3 is 1 bit */
92 #define RR_SCRATCH_REG4_SZ 0x00520 /* Scratch 4 is 1 bit */
94 #define RR_VECTOR_HW_BAR(context) (0x08000 | (context)<<3) /* barrier config registers */
95 /* Port-specific registers (_L is the link number from 1 to 8) */
97 #define RR_PORT_PARMS(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0000) /* LLP parameters */
98 #define RR_STATUS_ERROR(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0008) /* Port-related errs */
99 #define RR_CHANNEL_TEST(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0010) /* Port LLP chan test */
100 #define RR_RESET_MASK(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0018) /* Remote reset mask */
101 #define RR_HISTOGRAM0(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0020) /* Port usage histgrm */
102 #define RR_HISTOGRAM1(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0028) /* Port usage histgrm */
103 #define RR_HISTOGRAM0_WC(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0030) /* Port usage histgrm */
104 #define RR_HISTOGRAM1_WC(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0038) /* Port usage histgrm */
105 #define RR_ERROR_CLEAR(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0088) /* Read/clear errors */
106 #define RR_GLOBAL_TABLE0(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0100) /* starting address of global table for this port */
107 #define RR_GLOBAL_TABLE(_L, _x) (RR_GLOBAL_TABLE0(_L) + ((_x) << 3))
108 #define RR_LOCAL_TABLE0(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0200) /* starting address of local table for this port */
109 #define RR_LOCAL_TABLE(_L, _x) (RR_LOCAL_TABLE0(_L) + ((_x) << 3))
111 #define RR_META_ENTRIES 16
113 #define RR_LOCAL_ENTRIES 128
116 * RR_STATUS_REV_ID mask and shift definitions
119 #define RSRI_INPORT_SHFT 52
120 #define RSRI_INPORT_MASK (0xfUL << 52)
121 #define RSRI_LINKWORKING_BIT(_L) (35 + 2 * (_L))
122 #define RSRI_LINKWORKING(_L) (1UL << (35 + 2 * (_L)))
123 #define RSRI_LINKRESETFAIL(_L) (1UL << (34 + 2 * (_L)))
124 #define RSRI_LSTAT_SHFT(_L) (34 + 2 * (_L))
125 #define RSRI_LSTAT_MASK(_L) (0x3UL << 34 + 2 * (_L))
126 #define RSRI_LOCALSBERROR (1UL << 35)
127 #define RSRI_LOCALSTUCK (1UL << 34)
128 #define RSRI_LOCALBADVEC (1UL << 33)
129 #define RSRI_LOCALTAILERR (1UL << 32)
130 #define RSRI_LOCAL_SHFT 32
131 #define RSRI_LOCAL_MASK (0xfUL << 32)
132 #define RSRI_CHIPREV_SHFT 28
133 #define RSRI_CHIPREV_MASK (0xfUL << 28)
134 #define RSRI_CHIPID_SHFT 12
135 #define RSRI_CHIPID_MASK (0xffffUL << 12)
136 #define RSRI_MFGID_SHFT 1
137 #define RSRI_MFGID_MASK (0x7ffUL << 1)
139 #define RSRI_LSTAT_WENTDOWN 0
140 #define RSRI_LSTAT_RESETFAIL 1
141 #define RSRI_LSTAT_LINKUP 2
142 #define RSRI_LSTAT_NOTUSED 3
145 * RR_PORT_RESET mask definitions
148 #define RPRESET_WARM (1UL << 9)
149 #define RPRESET_LINK(_L) (1UL << (_L))
150 #define RPRESET_LOCAL 1UL
153 * RR_PROT_CONF mask and shift definitions
156 #define RPCONF_DIRCMPDIS_SHFT 13
157 #define RPCONF_DIRCMPDIS_MASK (1UL << 13)
158 #define RPCONF_FORCELOCAL (1UL << 12)
159 #define RPCONF_FLOCAL_SHFT 12
160 #define RPCONF_METAID_SHFT 8
161 #define RPCONF_METAID_MASK (0xfUL << 8)
162 #define RPCONF_RESETOK(_L) (1UL << ((_L) - 1))
165 * RR_GLOBAL_PORT_DEF mask and shift definitions
168 #define RGPD_MGLBLNHBR_ID_SHFT 12 /* -global neighbor ID */
169 #define RGPD_MGLBLNHBR_ID_MASK (0xfUL << 12)
170 #define RGPD_MGLBLNHBR_VLD_SHFT 11 /* -global neighbor Valid */
171 #define RGPD_MGLBLNHBR_VLD_MASK (0x1UL << 11)
172 #define RGPD_MGLBLPORT_SHFT 8 /* -global neighbor Port */
173 #define RGPD_MGLBLPORT_MASK (0x7UL << 8)
174 #define RGPD_PGLBLNHBR_ID_SHFT 4 /* +global neighbor ID */
175 #define RGPD_PGLBLNHBR_ID_MASK (0xfUL << 4)
176 #define RGPD_PGLBLNHBR_VLD_SHFT 3 /* +global neighbor Valid */
177 #define RGPD_PGLBLNHBR_VLD_MASK (0x1UL << 3)
178 #define RGPD_PGLBLPORT_SHFT 0 /* +global neighbor Port */
179 #define RGPD_PGLBLPORT_MASK (0x7UL << 0)
181 #define GLBL_PARMS_REGS 2 /* Two Global Parms registers */
184 * RR_GLOBAL_PARMS0 mask and shift definitions
187 #define RGPARM0_ARB_VALUE_SHFT 54 /* Local Block Arbitration State */
188 #define RGPARM0_ARB_VALUE_MASK (0x7UL << 54)
189 #define RGPARM0_ROTATEARB_SHFT 53 /* Rotate Local Block Arbitration */
190 #define RGPARM0_ROTATEARB_MASK (1UL << 53)
191 #define RGPARM0_FAIREN_SHFT 52 /* Fairness logic Enable */
192 #define RGPARM0_FAIREN_MASK (1UL << 52)
193 #define RGPARM0_LOCGNTTO_SHFT 40 /* Local grant timeout */
194 #define RGPARM0_LOCGNTTO_MASK (0xfffUL << 40)
195 #define RGPARM0_DATELINE_SHFT 38 /* Dateline crossing router */
196 #define RGPARM0_DATELINE_MASK (1UL << 38)
197 #define RGPARM0_MAXRETRY_SHFT 28 /* Max retry count */
198 #define RGPARM0_MAXRETRY_MASK (0x3ffUL << 28)
199 #define RGPARM0_URGWRAP_SHFT 20 /* Urgent wrap */
200 #define RGPARM0_URGWRAP_MASK (0xffUL << 20)
201 #define RGPARM0_DEADLKTO_SHFT 16 /* Deadlock timeout */
202 #define RGPARM0_DEADLKTO_MASK (0xfUL << 16)
203 #define RGPARM0_URGVAL_SHFT 12 /* Urgent value */
204 #define RGPARM0_URGVAL_MASK (0xfUL << 12)
205 #define RGPARM0_VCHSELEN_SHFT 11 /* VCH_SEL_EN */
206 #define RGPARM0_VCHSELEN_MASK (1UL << 11)
207 #define RGPARM0_LOCURGTO_SHFT 9 /* Local urgent timeout */
208 #define RGPARM0_LOCURGTO_MASK (0x3UL << 9)
209 #define RGPARM0_TAILVAL_SHFT 5 /* Tail value */
210 #define RGPARM0_TAILVAL_MASK (0xfUL << 5)
211 #define RGPARM0_CLOCK_SHFT 1 /* Global clock select */
212 #define RGPARM0_CLOCK_MASK (0xfUL << 1)
213 #define RGPARM0_BYPEN_SHFT 0
214 #define RGPARM0_BYPEN_MASK 1UL /* Bypass enable */
217 * RR_GLOBAL_PARMS1 shift and mask definitions
220 #define RGPARM1_TTOWRAP_SHFT 12 /* Tail timeout wrap */
221 #define RGPARM1_TTOWRAP_MASK (0xfffffUL << 12)
222 #define RGPARM1_AGERATE_SHFT 8 /* Age rate */
223 #define RGPARM1_AGERATE_MASK (0xfUL << 8)
224 #define RGPARM1_JSWSTAT_SHFT 0 /* JTAG Sw Register bits */
225 #define RGPARM1_JSWSTAT_MASK (0xffUL << 0)
228 * RR_DIAG_PARMS mask and shift definitions
231 #define RDPARM_ABSHISTOGRAM (1UL << 17) /* Absolute histgrm */
232 #define RDPARM_DEADLOCKRESET (1UL << 16) /* Reset on deadlck */
233 #define RDPARM_DISABLE(_L) (1UL << ((_L) + 7))
234 #define RDPARM_SENDERROR(_L) (1UL << ((_L) - 1))
237 * RR_DEBUG_ADDR mask and shift definitions
240 #define RDA_DATA_SHFT 10 /* Observed debug data */
241 #define RDA_DATA_MASK (0xffffUL << 10)
242 #define RDA_ADDR_SHFT 0 /* debug address for data */
243 #define RDA_ADDR_MASK (0x3ffUL << 0)
246 * RR_LB_TO_L2 mask and shift definitions
249 #define RLBTOL2_DATA_VLD_SHFT 32 /* data is valid for JTAG controller */
250 #define RLBTOL2_DATA_VLD_MASK (1UL << 32)
251 #define RLBTOL2_DATA_SHFT 0 /* data bits for JTAG controller */
252 #define RLBTOL2_DATA_MASK 0xffffffffUL
255 * RR_L2_TO_LB mask and shift definitions
258 #define RL2TOLB_DATA_VLD_SHFT 33 /* data is valid from JTAG controller */
259 #define RL2TOLB_DATA_VLD_MASK (1UL << 33)
260 #define RL2TOLB_PARITY_SHFT 32 /* sw implemented parity for data */
261 #define RL2TOLB_PARITY_MASK (1UL << 32)
262 #define RL2TOLB_DATA_SHFT 0 /* data bits from JTAG controller */
263 #define RL2TOLB_DATA_MASK 0xffffffffUL
266 * RR_JBUS_CONTROL mask and shift definitions
269 #define RJC_POS_BITS_SHFT 20 /* Router position bits */
270 #define RJC_POS_BITS_MASK (0xfUL << 20)
271 #define RJC_RD_DATA_STROBE_SHFT 16 /* count when read data is strobed in */
272 #define RJC_RD_DATA_STROBE_MASK (0xfUL << 16)
273 #define RJC_WE_OE_HOLD_SHFT 8 /* time OE or WE is held */
274 #define RJC_WE_OE_HOLD_MASK (0xffUL << 8)
275 #define RJC_ADDR_SET_HLD_SHFT 0 /* time address driven around OE/WE */
276 #define RJC_ADDR_SET_HLD_MASK 0xffUL
279 * RR_SCRATCH_REGx mask and shift definitions
280 * note: these fields represent a software convention, and are not
281 * understood/interpreted by the hardware.
284 #define RSCR0_BOOTED_SHFT 63
285 #define RSCR0_BOOTED_MASK (0x1UL << RSCR0_BOOTED_SHFT)
286 #define RSCR0_LOCALID_SHFT 56
287 #define RSCR0_LOCALID_MASK (0x7fUL << RSCR0_LOCALID_SHFT)
288 #define RSCR0_UNUSED_SHFT 48
289 #define RSCR0_UNUSED_MASK (0xffUL << RSCR0_UNUSED_SHFT)
290 #define RSCR0_NIC_SHFT 0
291 #define RSCR0_NIC_MASK 0xffffffffffffUL
293 #define RSCR1_MODID_SHFT 0
294 #define RSCR1_MODID_MASK 0xffffUL
297 * RR_VECTOR_HW_BAR mask and shift definitions
300 #define BAR_TX_SHFT 27 /* Barrier in trans(m)it when read */
301 #define BAR_TX_MASK (1UL << BAR_TX_SHFT)
302 #define BAR_VLD_SHFT 26 /* Valid Configuration */
303 #define BAR_VLD_MASK (1UL << BAR_VLD_SHFT)
304 #define BAR_SEQ_SHFT 24 /* Sequence number */
305 #define BAR_SEQ_MASK (3UL << BAR_SEQ_SHFT)
306 #define BAR_LEAFSTATE_SHFT 18 /* Leaf State */
307 #define BAR_LEAFSTATE_MASK (0x3fUL << BAR_LEAFSTATE_SHFT)
308 #define BAR_PARENT_SHFT 14 /* Parent Port */
309 #define BAR_PARENT_MASK (0xfUL << BAR_PARENT_SHFT)
310 #define BAR_CHILDREN_SHFT 6 /* Child Select port bits */
311 #define BAR_CHILDREN_MASK (0xffUL << BAR_CHILDREN_SHFT)
312 #define BAR_LEAFCOUNT_SHFT 0 /* Leaf Count to trigger parent */
313 #define BAR_LEAFCOUNT_MASK 0x3fUL
316 * RR_PORT_PARMS(_L) mask and shift definitions
319 #define RPPARM_MIPRESETEN_SHFT 29 /* Message In Progress reset enable */
320 #define RPPARM_MIPRESETEN_MASK (0x1UL << 29)
321 #define RPPARM_UBAREN_SHFT 28 /* Enable user barrier requests */
322 #define RPPARM_UBAREN_MASK (0x1UL << 28)
323 #define RPPARM_OUTPDTO_SHFT 24 /* Output Port Deadlock TO value */
324 #define RPPARM_OUTPDTO_MASK (0xfUL << 24)
325 #define RPPARM_PORTMATE_SHFT 21 /* Port Mate for the port */
326 #define RPPARM_PORTMATE_MASK (0x7UL << 21)
327 #define RPPARM_HISTEN_SHFT 20 /* Histogram counter enable */
328 #define RPPARM_HISTEN_MASK (0x1UL << 20)
329 #define RPPARM_HISTSEL_SHFT 18
330 #define RPPARM_HISTSEL_MASK (0x3UL << 18)
331 #define RPPARM_DAMQHS_SHFT 16
332 #define RPPARM_DAMQHS_MASK (0x3UL << 16)
333 #define RPPARM_NULLTO_SHFT 10
334 #define RPPARM_NULLTO_MASK (0x3fUL << 10)
335 #define RPPARM_MAXBURST_SHFT 0
336 #define RPPARM_MAXBURST_MASK 0x3ffUL
339 * NOTE: Normally the kernel tracks only UTILIZATION statistics.
340 * The other 2 should not be used, except during any experimentation
343 #define RPPARM_HISTSEL_AGE 0 /* Histogram age characterization. */
344 #define RPPARM_HISTSEL_UTIL 1 /* Histogram link utilization */
345 #define RPPARM_HISTSEL_DAMQ 2 /* Histogram DAMQ characterization. */
348 * RR_STATUS_ERROR(_L) and RR_ERROR_CLEAR(_L) mask and shift definitions
350 #define RSERR_POWERNOK (1UL << 38)
351 #define RSERR_PORT_DEADLOCK (1UL << 37)
352 #define RSERR_WARMRESET (1UL << 36)
353 #define RSERR_LINKRESET (1UL << 35)
354 #define RSERR_RETRYTIMEOUT (1UL << 34)
355 #define RSERR_FIFOOVERFLOW (1UL << 33)
356 #define RSERR_ILLEGALPORT (1UL << 32)
357 #define RSERR_DEADLOCKTO_SHFT 28
358 #define RSERR_DEADLOCKTO_MASK (0xfUL << 28)
359 #define RSERR_RECVTAILTO_SHFT 24
360 #define RSERR_RECVTAILTO_MASK (0xfUL << 24)
361 #define RSERR_RETRYCNT_SHFT 16
362 #define RSERR_RETRYCNT_MASK (0xffUL << 16)
363 #define RSERR_CBERRCNT_SHFT 8
364 #define RSERR_CBERRCNT_MASK (0xffUL << 8)
365 #define RSERR_SNERRCNT_SHFT 0
366 #define RSERR_SNERRCNT_MASK (0xffUL << 0)
369 #define PORT_STATUS_UP (1 << 0) /* Router link up */
370 #define PORT_STATUS_FENCE (1 << 1) /* Router link fenced */
371 #define PORT_STATUS_RESETFAIL (1 << 2) /* Router link didnot
372 * come out of reset */
373 #define PORT_STATUS_DISCFAIL (1 << 3) /* Router link failed after
374 * out of reset but before
378 #define PORT_STATUS_KERNFAIL (1 << 4) /* Router link failed
379 * after reset and the
383 #define PORT_STATUS_UNDEF (1 << 5) /* Unable to pinpoint
384 * why the router link
387 #define PROBE_RESULT_BAD -1 /* Set if any of the router
388 * links failed after reset
390 #define PROBE_RESULT_GOOD 0 /* Set if all the router links
391 * which came out of reset
395 /* Should be enough for 256 CPUs */
396 #define MAX_RTR_BREADTH 64 /* Max # of routers possible */
398 /* Get the require set of bits in a var. corr to a sequence of bits */
399 #define GET_FIELD(var, fname) \
400 ((var) >> fname##_SHFT & fname##_MASK >> fname##_SHFT)
401 /* Set the require set of bits in a var. corr to a sequence of bits */
402 #define SET_FIELD(var, fname, fval) \
403 ((var) = (var) & ~fname##_MASK | (uint64_t) (fval) << fname##_SHFT)
408 typedef struct router_map_ent_s {
414 struct rr_status_error_fmt {
415 uint64_t rserr_unused : 30,
416 rserr_fifooverflow : 1,
417 rserr_illegalport : 1,
418 rserr_deadlockto : 4,
419 rserr_recvtailto : 4,
426 * This type is used to store "absolute" counts of router events
428 typedef int router_count_t;
430 /* All utilizations are on a scale from 0 - 1023. */
431 #define RP_BYPASS_UTIL 0
432 #define RP_RCV_UTIL 1
433 #define RP_SEND_UTIL 2
434 #define RP_TOTAL_PKTS 3 /* Free running clock/packet counter */
436 #define RP_NUM_UTILS 3
438 #define RP_HIST_REGS 2
439 #define RP_NUM_BUCKETS 4
440 #define RP_HIST_TYPES 3
448 #define RR_UTIL_SCALE 1024
451 * Router port-oriented information
453 typedef struct router_port_info_s {
454 router_reg_t rp_histograms[RP_HIST_REGS];/* Port usage info */
455 router_reg_t rp_port_error; /* Port error info */
456 router_count_t rp_retry_errors; /* Total retry errors */
457 router_count_t rp_sn_errors; /* Total sn errors */
458 router_count_t rp_cb_errors; /* Total cb errors */
459 int rp_overflows; /* Total count overflows */
460 int rp_excess_err; /* Port has excessive errors */
461 ushort rp_util[RP_NUM_BUCKETS];/* Port utilization */
462 } router_port_info_t;
464 #define ROUTER_INFO_VERSION 7
471 typedef struct router_info_s {
472 char ri_version; /* structure version */
473 cnodeid_t ri_cnode; /* cnode of its legal guardian hub */
474 nasid_t ri_nasid; /* Nasid of same */
475 char ri_ledcache; /* Last LED bitmap */
476 char ri_leds; /* Current LED bitmap */
477 char ri_portmask; /* Active port bitmap */
478 router_reg_t ri_stat_rev_id; /* Status rev ID value */
479 uint64_t ri_vector; /* vector from guardian to router */
480 int ri_writeid; /* router's vector write ID */
481 int64_t ri_timebase; /* Time of first sample */
482 int64_t ri_timestamp; /* Time of last sample */
483 router_port_info_t ri_port[MAX_ROUTER_PORTS]; /* per port info */
484 moduleid_t ri_module; /* Which module are we in? */
485 char ri_slotnum; /* Which slot are we in? */
486 router_reg_t ri_glbl_parms[GLBL_PARMS_REGS];
487 /* Global parms0&1 register contents*/
488 void * ri_vertex; /* hardware graph vertex */
489 router_reg_t ri_prot_conf; /* protection config. register */
490 int64_t ri_per_minute; /* Ticks per minute */
493 * Everything below here is for kernel use only and may change at
494 * at any time with or without a change in the revision number
496 * Any pointers or things that come and go with DEBUG must go at
497 * the bottom of the structure, below the user stuff.
499 char ri_hist_type; /* histogram type */
500 void * ri_guardian; /* guardian node for the router */
501 int64_t ri_last_print; /* When did we last print */
502 char ri_print; /* Should we print */
503 char ri_just_blink; /* Should we blink the LEDs */
506 int64_t ri_deltatime; /* Time it took to sample */
508 spinlock_t ri_lock; /* Lock for access to router info */
509 uint64_t *ri_vecarray; /* Pointer to array of vectors */
510 struct lboard_s *ri_brd; /* Pointer to board structure */
511 char * ri_name; /* This board's hwg path */
512 unsigned char ri_port_maint[MAX_ROUTER_PORTS]; /* should we send a
513 message to availmon */
517 /* Router info location specifiers */
519 #define RIP_PROMLOG 2 /* Router info in promlog */
520 #define RIP_CONSOLE 4 /* Router info on console */
523 * Router info hanging in the nodepda
525 typedef struct nodepda_router_info_s {
526 void * router_vhdl; /* vertex handle of the router */
527 short router_port; /* port thru which we entered */
528 short router_portmask;
529 moduleid_t router_module; /* module in which router is there */
530 char router_slot; /* router slot */
531 unsigned char router_type; /* kind of router */
532 uint64_t router_vector; /* vector from the guardian node */
534 router_info_t *router_infop; /* info hanging off the hwg vertex */
535 struct nodepda_router_info_s *router_next;
536 /* pointer to next element */
537 } nodepda_router_info_t;
539 #define ROUTER_NAME_SIZE 20 /* Max size of a router name */
541 #define NORMAL_ROUTER_NAME "normal_router"
542 #define NULL_ROUTER_NAME "null_router"
543 #define META_ROUTER_NAME "meta_router"
544 #define REPEATER_ROUTER_NAME "repeater_router"
545 #define UNKNOWN_ROUTER_NAME "unknown_router"
547 /* The following definitions are needed by the router traversing
548 * code either using the hardware graph or using vector operations.
550 /* Structure of the router queue element */
551 typedef struct router_elt_s {
553 /* queue element structure during router probing */
555 /* number-in-a-can (unique) for the router */
557 /* vector route from the master hub to
563 char port_status[MAX_ROUTER_PORTS + 1];
565 /* queue element structure during router guardian
569 /* vertex handle for the router */
571 /* guardian for this router */
573 /* vector router from the guardian to the router */
577 /* easy to use port status interpretation */
580 /* structure of the router queue */
582 typedef struct router_queue_s {
583 char head; /* Point where a queue element is inserted */
584 char tail; /* Point where a queue element is removed */
586 router_elt_t array[MAX_RTR_BREADTH];
587 /* Entries for queue elements */
591 #endif /* __ASSEMBLY__ */
594 * RR_HISTOGRAM(_L) mask and shift definitions
595 * There are two 64 bit histogram registers, so the following macros take
596 * into account dealing with an array of 4 32 bit values indexed by _x
599 #define RHIST_BUCKET_SHFT(_x) (32 * ((_x) & 0x1))
600 #define RHIST_BUCKET_MASK(_x) (0xffffffffUL << RHIST_BUCKET_SHFT((_x) & 0x1))
601 #define RHIST_GET_BUCKET(_x, _reg) \
602 ((RHIST_BUCKET_MASK(_x) & ((_reg)[(_x) >> 1])) >> RHIST_BUCKET_SHFT(_x))
605 * RR_RESET_MASK(_L) mask and shift definitions
608 #define RRM_RESETOK(_L) (1UL << ((_L) - 1))
609 #define RRM_RESETOK_ALL ALL_PORTS
612 * RR_META_TABLE(_x) and RR_LOCAL_TABLE(_x) mask and shift definitions
615 #define RTABLE_SHFT(_L) (4 * ((_L) - 1))
616 #define RTABLE_MASK(_L) (0x7UL << RTABLE_SHFT(_L))
618 #endif /* _ASM_IA64_SN_ROUTER_H */