1 #ifndef _ASM_IA64_TLB_H
2 #define _ASM_IA64_TLB_H
4 * Based on <asm-generic/tlb.h>.
6 * Copyright (C) 2002-2003 Hewlett-Packard Co
7 * David Mosberger-Tang <davidm@hpl.hp.com>
10 * Removing a translation from a page table (including TLB-shootdown) is a four-step
13 * (1) Flush (virtual) caches --- ensures virtual memory is coherent with kernel memory
14 * (this is a no-op on ia64).
15 * (2) Clear the relevant portions of the page-table
16 * (3) Flush the TLBs --- ensures that stale content is gone from CPU TLBs
17 * (4) Release the pages that were freed up in step (2).
19 * Note that the ordering of these steps is crucial to avoid races on MP machines.
21 * The Linux kernel defines several platform-specific hooks for TLB-shootdown. When
22 * unmapping a portion of the virtual address space, these hooks are called according to
23 * the following template:
25 * tlb <- tlb_gather_mmu(mm, full_mm_flush); // start unmap for address space MM
27 * for each vma that needs a shootdown do {
28 * tlb_start_vma(tlb, vma);
29 * for each page-table-entry PTE that needs to be removed do {
30 * tlb_remove_tlb_entry(tlb, pte, address);
31 * if (pte refers to a normal page) {
32 * tlb_remove_page(tlb, page);
35 * tlb_end_vma(tlb, vma);
38 * tlb_finish_mmu(tlb, start, end); // finish unmap for address space MM
40 #include <linux/config.h>
42 #include <linux/pagemap.h>
43 #include <linux/swap.h>
44 #include <linux/vs_memory.h>
46 #include <asm/pgalloc.h>
47 #include <asm/processor.h>
48 #include <asm/tlbflush.h>
49 #include <asm/machvec.h>
52 # define FREE_PTE_NR 2048
53 # define tlb_fast_mode(tlb) ((tlb)->nr == ~0U)
55 # define FREE_PTE_NR 0
56 # define tlb_fast_mode(tlb) (1)
61 unsigned int nr; /* == ~0U => fast mode */
62 unsigned char fullmm; /* non-zero means full mm flush */
63 unsigned char need_flush; /* really unmapped some PTEs? */
64 unsigned long freed; /* number of pages freed */
65 unsigned long start_addr;
66 unsigned long end_addr;
67 struct page *pages[FREE_PTE_NR];
70 /* Users of the generic TLB shootdown code must declare this storage space. */
71 DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
74 * Flush the TLB for address range START to END and, if not in fast mode, release the
75 * freed pages that where gathered up to this point.
78 ia64_tlb_flush_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long end)
88 * Tearing down the entire address space. This happens both as a result
89 * of exit() and execve(). The latter case necessitates the call to
90 * flush_tlb_mm() here.
92 flush_tlb_mm(tlb->mm);
93 } else if (unlikely (end - start >= 1024*1024*1024*1024UL
94 || REGION_NUMBER(start) != REGION_NUMBER(end - 1)))
97 * If we flush more than a tera-byte or across regions, we're probably
98 * better off just flushing the entire TLB(s). This should be very rare
99 * and is not worth optimizing for.
104 * XXX fix me: flush_tlb_range() should take an mm pointer instead of a
107 struct vm_area_struct vma;
110 /* flush the address range from the tlb: */
111 flush_tlb_range(&vma, start, end);
112 /* now flush the virt. page-table area mapping the address range: */
113 flush_tlb_range(&vma, ia64_thash(start), ia64_thash(end));
116 /* lastly, release the freed pages */
118 if (!tlb_fast_mode(tlb)) {
121 tlb->start_addr = ~0UL;
122 for (i = 0; i < nr; ++i)
123 free_page_and_swap_cache(tlb->pages[i]);
128 * Return a pointer to an initialized struct mmu_gather.
130 static inline struct mmu_gather *
131 tlb_gather_mmu (struct mm_struct *mm, unsigned int full_mm_flush)
133 struct mmu_gather *tlb = &__get_cpu_var(mmu_gathers);
137 * Use fast mode if only 1 CPU is online.
139 * It would be tempting to turn on fast-mode for full_mm_flush as well. But this
140 * doesn't work because of speculative accesses and software prefetching: the page
141 * table of "mm" may (and usually is) the currently active page table and even
142 * though the kernel won't do any user-space accesses during the TLB shoot down, a
143 * compiler might use speculation or lfetch.fault on what happens to be a valid
144 * user-space address. This in turn could trigger a TLB miss fault (or a VHPT
145 * walk) and re-insert a TLB entry we just removed. Slow mode avoids such
146 * problems. (We could make fast-mode work by switching the current task to a
147 * different "mm" during the shootdown.) --davidm 08/02/2002
149 tlb->nr = (num_online_cpus() == 1) ? ~0U : 0;
150 tlb->fullmm = full_mm_flush;
152 tlb->start_addr = ~0UL;
157 * Called at the end of the shootdown operation to free up any resources that were
158 * collected. The page table lock is still held at this point.
161 tlb_finish_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long end)
163 unsigned long freed = tlb->freed;
164 struct mm_struct *mm = tlb->mm;
165 unsigned long rss = mm->rss;
169 // mm->rss = rss - freed;
170 vx_rsspages_sub(mm, freed);
172 * Note: tlb->nr may be 0 at this point, so we can't rely on tlb->start_addr and
175 ia64_tlb_flush_mmu(tlb, start, end);
177 /* keep the page table cache within bounds */
181 static inline unsigned int
182 tlb_is_full_mm(struct mmu_gather *tlb)
188 * Logically, this routine frees PAGE. On MP machines, the actual freeing of the page
189 * must be delayed until after the TLB has been flushed (see comments at the beginning of
193 tlb_remove_page (struct mmu_gather *tlb, struct page *page)
197 if (tlb_fast_mode(tlb)) {
198 free_page_and_swap_cache(page);
201 tlb->pages[tlb->nr++] = page;
202 if (tlb->nr >= FREE_PTE_NR)
203 ia64_tlb_flush_mmu(tlb, tlb->start_addr, tlb->end_addr);
207 * Remove TLB entry for PTE mapped at virtual address ADDRESS. This is called for any
208 * PTE, not just those pointing to (normal) physical memory.
211 __tlb_remove_tlb_entry (struct mmu_gather *tlb, pte_t *ptep, unsigned long address)
213 if (tlb->start_addr == ~0UL)
214 tlb->start_addr = address;
215 tlb->end_addr = address + PAGE_SIZE;
218 #define tlb_migrate_finish(mm) platform_tlb_migrate_finish(mm)
220 #define tlb_start_vma(tlb, vma) do { } while (0)
221 #define tlb_end_vma(tlb, vma) do { } while (0)
223 #define tlb_remove_tlb_entry(tlb, ptep, addr) \
225 tlb->need_flush = 1; \
226 __tlb_remove_tlb_entry(tlb, ptep, addr); \
229 #define pte_free_tlb(tlb, ptep) \
231 tlb->need_flush = 1; \
232 __pte_free_tlb(tlb, ptep); \
235 #define pmd_free_tlb(tlb, ptep) \
237 tlb->need_flush = 1; \
238 __pmd_free_tlb(tlb, ptep); \
241 #endif /* _ASM_IA64_TLB_H */