1 #ifndef __ARCH_M68K_ATOMIC__
2 #define __ARCH_M68K_ATOMIC__
4 #include <asm/system.h> /* local_irq_XXX() */
7 * Atomic operations that C can't guarantee us. Useful for
8 * resource counting etc..
12 * We do not have SMP m68k systems, so we don't have to deal with that.
15 typedef struct { int counter; } atomic_t;
16 #define ATOMIC_INIT(i) { (i) }
18 #define atomic_read(v) ((v)->counter)
19 #define atomic_set(v, i) (((v)->counter) = i)
21 static inline void atomic_add(int i, atomic_t *v)
23 __asm__ __volatile__("addl %1,%0" : "+m" (*v) : "id" (i));
26 static inline void atomic_sub(int i, atomic_t *v)
28 __asm__ __volatile__("subl %1,%0" : "+m" (*v) : "id" (i));
31 static inline void atomic_inc(atomic_t *v)
33 __asm__ __volatile__("addql #1,%0" : "+m" (*v));
36 static inline void atomic_dec(atomic_t *v)
38 __asm__ __volatile__("subql #1,%0" : "+m" (*v));
41 static inline int atomic_dec_and_test(atomic_t *v)
44 __asm__ __volatile__("subql #1,%1; seq %0" : "=d" (c), "+m" (*v));
48 static inline int atomic_inc_and_test(atomic_t *v)
51 __asm__ __volatile__("addql #1,%1; seq %0" : "=d" (c), "+m" (*v));
55 #ifdef CONFIG_RMW_INSNS
56 static inline int atomic_add_return(int i, atomic_t *v)
65 : "+m" (*v), "=&d" (t), "=&d" (tmp)
66 : "g" (i), "2" (atomic_read(v)));
70 static inline int atomic_sub_return(int i, atomic_t *v)
79 : "+m" (*v), "=&d" (t), "=&d" (tmp)
80 : "g" (i), "2" (atomic_read(v)));
83 #else /* !CONFIG_RMW_INSNS */
84 static inline int atomic_add_return(int i, atomic_t * v)
89 local_irq_save(flags);
93 local_irq_restore(flags);
98 static inline int atomic_sub_return(int i, atomic_t * v)
103 local_irq_save(flags);
107 local_irq_restore(flags);
111 #endif /* !CONFIG_RMW_INSNS */
113 #define atomic_dec_return(v) atomic_sub_return(1, (v))
114 #define atomic_inc_return(v) atomic_add_return(1, (v))
116 static inline int atomic_sub_and_test(int i, atomic_t *v)
119 __asm__ __volatile__("subl %2,%1; seq %0" : "=d" (c), "+m" (*v): "g" (i));
123 static inline int atomic_add_negative(int i, atomic_t *v)
126 __asm__ __volatile__("addl %2,%1; smi %0" : "=d" (c), "+m" (*v): "g" (i));
130 static inline void atomic_clear_mask(unsigned long mask, unsigned long *v)
132 __asm__ __volatile__("andl %1,%0" : "+m" (*v) : "id" (~(mask)));
135 static inline void atomic_set_mask(unsigned long mask, unsigned long *v)
137 __asm__ __volatile__("orl %1,%0" : "+m" (*v) : "id" (mask));
140 /* Atomic operations are already serializing */
141 #define smp_mb__before_atomic_dec() barrier()
142 #define smp_mb__after_atomic_dec() barrier()
143 #define smp_mb__before_atomic_inc() barrier()
144 #define smp_mb__after_atomic_inc() barrier()
146 #endif /* __ARCH_M68K_ATOMIC __ */