2 * linux/include/asm-m68k/io.h
4 * 4/1/00 RZ: - rewritten to avoid clashes between ISA/PCI and other
7 * - added skeleton for GG-II and Amiga PCMCIA
8 * 2/3/01 RZ: - moved a few more defs into raw_io.h
10 * inX/outX/readX/writeX should not be used by any driver unless it does
11 * ISA or PCI access. Other drivers should use function defined in raw_io.h
12 * or define its own macros on top of these.
14 * inX(),outX() are for PCI and ISA I/O
15 * readX(),writeX() are for PCI memory
16 * isa_readX(),isa_writeX() are for ISA memory
18 * moved mem{cpy,set}_*io inside CONFIG_PCI
26 #include <linux/config.h>
27 #include <asm/raw_io.h>
28 #include <asm/virtconvert.h>
32 #include <asm/atarihw.h>
37 * IO/MEM definitions for various ISA bridges
43 #define q40_isa_io_base 0xff400000
44 #define q40_isa_mem_base 0xff800000
46 #define Q40_ISA_IO_B(ioaddr) (q40_isa_io_base+1+4*((unsigned long)(ioaddr)))
47 #define Q40_ISA_IO_W(ioaddr) (q40_isa_io_base+ 4*((unsigned long)(ioaddr)))
48 #define Q40_ISA_MEM_B(madr) (q40_isa_mem_base+1+4*((unsigned long)(madr)))
49 #define Q40_ISA_MEM_W(madr) (q40_isa_mem_base+ 4*((unsigned long)(madr)))
54 /* GG-II Zorro to ISA bridge */
57 extern unsigned long gg2_isa_base;
58 #define GG2_ISA_IO_B(ioaddr) (gg2_isa_base+1+((unsigned long)(ioaddr)*4))
59 #define GG2_ISA_IO_W(ioaddr) (gg2_isa_base+ ((unsigned long)(ioaddr)*4))
60 #define GG2_ISA_MEM_B(madr) (gg2_isa_base+1+(((unsigned long)(madr)*4) & 0xfffff))
61 #define GG2_ISA_MEM_W(madr) (gg2_isa_base+ (((unsigned long)(madr)*4) & 0xfffff))
71 #ifdef CONFIG_AMIGA_PCMCIA
72 #include <asm/amigayle.h>
74 #define AG_ISA_IO_B(ioaddr) ( GAYLE_IO+(ioaddr)+(((ioaddr)&1)*GAYLE_ODD) )
75 #define AG_ISA_IO_W(ioaddr) ( GAYLE_IO+(ioaddr) )
83 #endif /* AMIGA_PCMCIA */
97 #if defined(CONFIG_Q40) && !defined(MULTI_ISA)
98 #define ISA_TYPE Q40_ISA
101 #if defined(CONFIG_AMIGA_PCMCIA) && !defined(MULTI_ISA)
102 #define ISA_TYPE AG_ISA
105 #if defined(CONFIG_GG2) && !defined(MULTI_ISA)
106 #define ISA_TYPE GG2_ISA
114 #define ISA_TYPE isa_type
115 #define ISA_SEX isa_sex
119 * define inline addr translation functions. Normally only one variant will
120 * be compiled in so the case statement will be optimised away
123 static inline u8 *isa_itb(long addr)
128 case Q40_ISA: return (u8 *)Q40_ISA_IO_B(addr);
131 case GG2_ISA: return (u8 *)GG2_ISA_IO_B(addr);
133 #ifdef CONFIG_AMIGA_PCMCIA
134 case AG_ISA: return (u8 *)AG_ISA_IO_B(addr);
136 default: return 0; /* avoid warnings, just in case */
139 static inline u16 *isa_itw(long addr)
144 case Q40_ISA: return (u16 *)Q40_ISA_IO_W(addr);
147 case GG2_ISA: return (u16 *)GG2_ISA_IO_W(addr);
149 #ifdef CONFIG_AMIGA_PCMCIA
150 case AG_ISA: return (u16 *)AG_ISA_IO_W(addr);
152 default: return 0; /* avoid warnings, just in case */
155 static inline u8 *isa_mtb(long addr)
160 case Q40_ISA: return (u8 *)Q40_ISA_MEM_B(addr);
163 case GG2_ISA: return (u8 *)GG2_ISA_MEM_B(addr);
165 #ifdef CONFIG_AMIGA_PCMCIA
166 case AG_ISA: return (u8 *)addr;
168 default: return 0; /* avoid warnings, just in case */
171 static inline u16 *isa_mtw(long addr)
176 case Q40_ISA: return (u16 *)Q40_ISA_MEM_W(addr);
179 case GG2_ISA: return (u16 *)GG2_ISA_MEM_W(addr);
181 #ifdef CONFIG_AMIGA_PCMCIA
182 case AG_ISA: return (u16 *)addr;
184 default: return 0; /* avoid warnings, just in case */
189 #define isa_inb(port) in_8(isa_itb(port))
190 #define isa_inw(port) (ISA_SEX ? in_be16(isa_itw(port)) : in_le16(isa_itw(port)))
191 #define isa_outb(val,port) out_8(isa_itb(port),(val))
192 #define isa_outw(val,port) (ISA_SEX ? out_be16(isa_itw(port),(val)) : out_le16(isa_itw(port),(val)))
194 #define isa_readb(p) in_8(isa_mtb(p))
195 #define isa_readw(p) (ISA_SEX ? in_be16(isa_mtw(p)) : in_le16(isa_mtw(p)))
196 #define isa_writeb(val,p) out_8(isa_mtb(p),(val))
197 #define isa_writew(val,p) (ISA_SEX ? out_be16(isa_mtw(p),(val)) : out_le16(isa_mtw(p),(val)))
199 static inline void isa_delay(void)
204 case Q40_ISA: isa_outb(0,0x80); break;
209 #ifdef CONFIG_AMIGA_PCMCIA
212 default: break; /* avoid warnings */
216 #define isa_inb_p(p) ({u8 v=isa_inb(p);isa_delay();v;})
217 #define isa_outb_p(v,p) ({isa_outb((v),(p));isa_delay();})
219 #define isa_insb(port, buf, nr) raw_insb(isa_itb(port), (buf), (nr))
220 #define isa_outsb(port, buf, nr) raw_outsb(isa_itb(port), (buf), (nr))
222 #define isa_insw(port, buf, nr) \
223 (ISA_SEX ? raw_insw(isa_itw(port), (buf), (nr)) : \
224 raw_insw_swapw(isa_itw(port), (buf), (nr)))
226 #define isa_outsw(port, buf, nr) \
227 (ISA_SEX ? raw_outsw(isa_itw(port), (buf), (nr)) : \
228 raw_outsw_swapw(isa_itw(port), (buf), (nr)))
229 #endif /* CONFIG_ISA */
232 #if defined(CONFIG_ISA) && !defined(CONFIG_PCI)
234 #define inb_p isa_inb_p
235 #define outb isa_outb
236 #define outb_p isa_outb_p
238 #define outw isa_outw
240 #define outl isa_outw
241 #define insb isa_insb
242 #define insw isa_insw
243 #define outsb isa_outsb
244 #define outsw isa_outsw
245 #define readb isa_readb
246 #define readw isa_readw
247 #define writeb isa_writeb
248 #define writew isa_writew
249 #endif /* CONFIG_ISA */
251 #if defined(CONFIG_PCI)
253 #define inl(port) in_le32(port)
254 #define outl(val,port) out_le32((port),(val))
255 #define readl(addr) in_le32(addr)
256 #define writel(val,addr) out_le32((addr),(val))
258 /* those can be defined for both ISA and PCI - it won't work though */
259 #define readb(addr) in_8(addr)
260 #define readw(addr) in_le16(addr)
261 #define writeb(val,addr) out_8((addr),(val))
262 #define writew(val,addr) out_le16((addr),(val))
264 #define readb_relaxed(addr) readb(addr)
265 #define readw_relaxed(addr) readw(addr)
266 #define readl_relaxed(addr) readl(addr)
269 #define inb(port) in_8(port)
270 #define outb(val,port) out_8((port),(val))
271 #define inw(port) in_le16(port)
272 #define outw(val,port) out_le16((port),(val))
276 * kernel with both ISA and PCI compiled in, those have
277 * conflicting defs for in/out. Simply consider port < 1024
278 * ISA and everything else PCI. read,write not defined
281 #define inb(port) ((port)<1024 ? isa_inb(port) : in_8(port))
282 #define inb_p(port) ((port)<1024 ? isa_inb_p(port) : in_8(port))
283 #define inw(port) ((port)<1024 ? isa_inw(port) : in_le16(port))
285 #define outb(val,port) ((port)<1024 ? isa_outb((val),(port)) : out_8((port),(val)))
286 #define outb_p(val,port) ((port)<1024 ? isa_outb_p((val),(port)) : out_8((port),(val)))
287 #define outw(val,port) ((port)<1024 ? isa_outw((val),(port)) : out_le16((port),(val)))
289 #endif /* CONFIG_PCI */
292 static inline void *ioremap(unsigned long physaddr, unsigned long size)
294 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
296 static inline void *ioremap_nocache(unsigned long physaddr, unsigned long size)
298 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
300 static inline void *ioremap_writethrough(unsigned long physaddr,
303 return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
305 static inline void *ioremap_fullcache(unsigned long physaddr,
308 return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
312 /* m68k caches aren't DMA coherent */
313 extern void dma_cache_wback_inv(unsigned long start, unsigned long size);
314 extern void dma_cache_wback(unsigned long start, unsigned long size);
315 extern void dma_cache_inv(unsigned long start, unsigned long size);
319 #define IO_SPACE_LIMIT 0xffff
321 #define IO_SPACE_LIMIT 0x0fffffff
324 #endif /* __KERNEL__ */