2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1996, 99 Ralf Baechle
7 * Copyright (C) 2000, 2002 Maciej W. Rozycki
8 * Copyright (C) 1990, 1999 by Silicon Graphics, Inc.
10 #ifndef _ASM_ADDRSPACE_H
11 #define _ASM_ADDRSPACE_H
13 #include <linux/config.h>
24 #define _ATYPE_ __PTRDIFF_TYPE__
26 #define _ATYPE64_ long long
30 * 32-bit MIPS address spaces
36 #define _ACAST32_ (_ATYPE_)(_ATYPE32_) /* widen if necessary */
37 #define _ACAST64_ (_ATYPE64_) /* do _not_ narrow */
41 * Memory segments (32bit kernel mode addresses)
42 * These are the traditional names used in the 32-bit universe.
44 #define KUSEG 0x00000000
45 #define KSEG0 0x80000000
46 #define KSEG1 0xa0000000
47 #define KSEG2 0xc0000000
48 #define KSEG3 0xe0000000
51 * Returns the kernel segment base of a given address
53 #define KSEGX(a) ((_ACAST32_ (a)) & 0xe0000000)
56 * Returns the physical address of a CKSEGx / XKPHYS address
58 #define CPHYSADDR(a) ((_ACAST32_ (a)) & 0x1fffffff)
59 #define XPHYSADDR(a) ((_ACAST64_ (a)) & 0x000000ffffffffff)
62 * Map an address to a certain kernel segment
64 #define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
65 #define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1)
66 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
67 #define KSEG3ADDR(a) (CPHYSADDR(a) | KSEG3)
69 #define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0)
70 #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1)
71 #define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2)
72 #define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3)
75 * Memory segments (64bit kernel mode addresses)
76 * The compatibility segments use the full 64-bit sign extended value. Note
77 * the R8000 doesn't have them so don't reference these in generic MIPS code.
79 #define XKUSEG 0x0000000000000000
80 #define XKSSEG 0x4000000000000000
81 #define XKPHYS 0x8000000000000000
82 #define XKSEG 0xc000000000000000
83 #define CKSEG0 0xffffffff80000000
84 #define CKSEG1 0xffffffffa0000000
85 #define CKSSEG 0xffffffffc0000000
86 #define CKSEG3 0xffffffffe0000000
89 * Cache modes for XKPHYS address conversion macros
91 #define K_CALG_COH_EXCL1_NOL2 0
92 #define K_CALG_COH_SHRL1_NOL2 1
93 #define K_CALG_UNCACHED 2
94 #define K_CALG_NONCOHERENT 3
95 #define K_CALG_COH_EXCL 4
96 #define K_CALG_COH_SHAREABLE 5
97 #define K_CALG_NOTUSED 6
98 #define K_CALG_UNCACHED_ACCEL 7
101 * 64-bit address conversions
103 #define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED,(p))
104 #define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE,(p))
105 #define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK)
106 #define PHYS_TO_XKPHYS(cm,a) (0x8000000000000000 | ((cm)<<59) | (a))
108 #if defined (CONFIG_CPU_R4300) \
109 || defined (CONFIG_CPU_R4X00) \
110 || defined (CONFIG_CPU_R5000) \
111 || defined (CONFIG_CPU_NEVADA) \
112 || defined (CONFIG_CPU_MIPS64)
113 #define KUSIZE 0x0000010000000000 /* 2^^40 */
114 #define KUSIZE_64 0x0000010000000000 /* 2^^40 */
115 #define K0SIZE 0x0000001000000000 /* 2^^36 */
116 #define K1SIZE 0x0000001000000000 /* 2^^36 */
117 #define K2SIZE 0x000000ff80000000
118 #define KSEGSIZE 0x000000ff80000000 /* max syssegsz */
119 #define TO_PHYS_MASK 0x0000000fffffffff /* 2^^36 - 1 */
122 #if defined (CONFIG_CPU_R8000)
123 /* We keep KUSIZE consistent with R4000 for now (2^^40) instead of (2^^48) */
124 #define KUSIZE 0x0000010000000000 /* 2^^40 */
125 #define KUSIZE_64 0x0000010000000000 /* 2^^40 */
126 #define K0SIZE 0x0000010000000000 /* 2^^40 */
127 #define K1SIZE 0x0000010000000000 /* 2^^40 */
128 #define K2SIZE 0x0001000000000000
129 #define KSEGSIZE 0x0000010000000000 /* max syssegsz */
130 #define TO_PHYS_MASK 0x000000ffffffffff /* 2^^40 - 1 */
133 #if defined (CONFIG_CPU_R10000)
134 #define KUSIZE 0x0000010000000000 /* 2^^40 */
135 #define KUSIZE_64 0x0000010000000000 /* 2^^40 */
136 #define K0SIZE 0x0000010000000000 /* 2^^40 */
137 #define K1SIZE 0x0000010000000000 /* 2^^40 */
138 #define K2SIZE 0x00000fff80000000
139 #define KSEGSIZE 0x00000fff80000000 /* max syssegsz */
140 #define TO_PHYS_MASK 0x000000ffffffffff /* 2^^40 - 1 */
144 * Further names for SGI source compatibility. These are stolen from
145 * IRIX's <sys/mips_addrspace.h>.
148 #define KUSIZE_32 0x0000000080000000 /* KUSIZE
150 #define K0BASE_EXL_WR 0xa800000000000000 /* exclusive on write */
151 #define K0BASE_NONCOH 0x9800000000000000 /* noncoherent */
152 #define K0BASE_EXL 0xa000000000000000 /* exclusive */
154 #ifndef CONFIG_CPU_R8000
157 * The R8000 doesn't have the 32-bit compat spaces so we don't define them
158 * in order to catch bugs in the source code.
161 #define COMPAT_K1BASE32 0xffffffffa0000000
162 #define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */
166 #define KDM_TO_PHYS(x) (_ACAST64_ (x) & TO_PHYS_MASK)
167 #define PHYS_TO_K0(x) (_ACAST64_ (x) | CAC_BASE)
169 #endif /* _ASM_ADDRSPACE_H */