2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2003 Ralf Baechle
8 #ifndef __ASM_CPU_FEATURES_H
9 #define __ASM_CPU_FEATURES_H
11 #include <cpu-feature-overrides.h>
14 * SMP assumption: Options of CPU 0 are a superset of all processors.
15 * This is true for all known MIPS systems.
18 #define cpu_has_tlb (cpu_data[0].options & MIPS_CPU_TLB)
21 #define cpu_has_4kex (cpu_data[0].options & MIPS_CPU_4KEX)
24 #define cpu_has_4ktlb (cpu_data[0].options & MIPS_CPU_4KTLB)
27 #define cpu_has_fpu (cpu_data[0].options & MIPS_CPU_FPU)
30 #define cpu_has_32fpr (cpu_data[0].options & MIPS_CPU_32FPR)
32 #ifndef cpu_has_counter
33 #define cpu_has_counter (cpu_data[0].options & MIPS_CPU_COUNTER)
36 #define cpu_has_watch (cpu_data[0].options & MIPS_CPU_WATCH)
38 #ifndef cpu_has_mips16
39 #define cpu_has_mips16 (cpu_data[0].options & MIPS_CPU_MIPS16)
42 #define cpu_has_divec (cpu_data[0].options & MIPS_CPU_DIVEC)
45 #define cpu_has_vce (cpu_data[0].options & MIPS_CPU_VCE)
47 #ifndef cpu_has_cache_cdex_p
48 #define cpu_has_cache_cdex_p (cpu_data[0].options & MIPS_CPU_CACHE_CDEX_P)
50 #ifndef cpu_has_cache_cdex_s
51 #define cpu_has_cache_cdex_s (cpu_data[0].options & MIPS_CPU_CACHE_CDEX_S)
53 #ifndef cpu_has_prefetch
54 #define cpu_has_prefetch (cpu_data[0].options & MIPS_CPU_PREFETCH)
56 #ifndef cpu_has_mcheck
57 #define cpu_has_mcheck (cpu_data[0].options & MIPS_CPU_MCHECK)
60 #define cpu_has_ejtag (cpu_data[0].options & MIPS_CPU_EJTAG)
63 #define cpu_has_llsc (cpu_data[0].options & MIPS_CPU_LLSC)
65 #ifndef cpu_has_vtag_icache
66 #define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG)
68 #ifndef cpu_has_dc_aliases
69 #define cpu_has_dc_aliases (cpu_data[0].dcache.flags & MIPS_CACHE_ALIASES)
71 #ifndef cpu_has_ic_fills_f_dc
72 #define cpu_has_ic_fills_f_dc (cpu_data[0].dcache.flags & MIPS_CACHE_IC_F_DC)
76 # ifndef cpu_has_nofpuex
77 # define cpu_has_nofpuex (cpu_data[0].options & MIPS_CPU_NOFPUEX)
79 # ifndef cpu_has_64bits
80 # define cpu_has_64bits (cpu_data[0].isa_level & MIPS_CPU_ISA_64BIT)
82 # ifndef cpu_has_64bit_zero_reg
83 # define cpu_has_64bit_zero_reg (cpu_data[0].isa_level & MIPS_CPU_ISA_64BIT)
85 # ifndef cpu_has_64bit_gp_regs
86 # define cpu_has_64bit_gp_regs 0
88 # ifndef cpu_has_64bit_addresses
89 # define cpu_has_64bit_addresses 0
94 # ifndef cpu_has_nofpuex
95 # define cpu_has_nofpuex 0
97 # ifndef cpu_has_64bits
98 # define cpu_has_64bits 1
100 # ifndef cpu_has_64bit_zero_reg
101 # define cpu_has_64bit_zero_reg 1
103 # ifndef cpu_has_64bit_gp_regs
104 # define cpu_has_64bit_gp_regs 1
106 # ifndef cpu_has_64bit_addresses
107 # define cpu_has_64bit_addresses 1
111 #ifndef cpu_has_subset_pcaches
112 #define cpu_has_subset_pcaches (cpu_data[0].options & MIPS_CPU_SUBSET_CACHES)
115 #ifndef cpu_dcache_line_size
116 #define cpu_dcache_line_size() current_cpu_data.dcache.linesz
118 #ifndef cpu_icache_line_size
119 #define cpu_icache_line_size() current_cpu_data.icache.linesz
121 #ifndef cpu_scache_line_size
122 #define cpu_scache_line_size() current_cpu_data.scache.linesz
125 #endif /* __ASM_CPU_FEATURES_H */