2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1994-1996 Linus Torvalds & authors
8 * Copied from i386; many of the especially older MIPS or ISA-based platforms
9 * are basically identical. Using this file probably implies i8259 PIC
10 * support in a system but the very least interrupt numbers 0 - 15 need to
11 * be put aside for legacy devices.
13 #ifndef __ASM_MACH_GENERIC_IDE_H
14 #define __ASM_MACH_GENERIC_IDE_H
18 #include <linux/config.h>
19 #include <linux/pci.h>
20 #include <linux/stddef.h>
21 #include <asm/processor.h>
24 # ifdef CONFIG_BLK_DEV_IDEPCI
31 #define IDE_ARCH_OBSOLETE_DEFAULTS
33 static __inline__ int ide_probe_legacy(void)
37 if ((dev = pci_get_class(PCI_CLASS_BRIDGE_EISA << 8, NULL)) != NULL ||
38 (dev = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL)) != NULL) {
44 #elif defined(CONFIG_EISA) || defined(CONFIG_ISA)
51 static __inline__ int ide_default_irq(unsigned long base)
53 if (ide_probe_legacy())
74 static __inline__ unsigned long ide_default_io_base(int index)
76 if (ide_probe_legacy())
97 #define IDE_ARCH_OBSOLETE_INIT
98 #define ide_default_io_ctl(base) ((base) + 0x206) /* obsolete */
100 #ifdef CONFIG_BLK_DEV_IDEPCI
101 #define ide_init_default_irq(base) (0)
103 #define ide_init_default_irq(base) ide_default_irq(base)
106 /* MIPS port and memory-mapped I/O string operations. */
107 static inline void __ide_flush_prologue(void)
110 if (cpu_has_dc_aliases)
115 static inline void __ide_flush_epilogue(void)
118 if (cpu_has_dc_aliases)
123 static inline void __ide_flush_dcache_range(unsigned long addr, unsigned long size)
125 if (cpu_has_dc_aliases) {
126 unsigned long end = addr + size;
129 local_flush_data_cache_page((void *)addr);
136 * insw() and gang might be called with interrupts disabled, so we can't
137 * send IPIs for flushing due to the potencial of deadlocks, see the comment
138 * above smp_call_function() in arch/mips/kernel/smp.c. We work around the
139 * problem by disabling preemption so we know we actually perform the flush
140 * on the processor that actually has the lines to be flushed which hopefully
141 * is even better for performance anyway.
143 static inline void __ide_insw(unsigned long port, void *addr,
146 __ide_flush_prologue();
147 insw(port, addr, count);
148 __ide_flush_dcache_range((unsigned long)addr, count * 2);
149 __ide_flush_epilogue();
152 static inline void __ide_insl(unsigned long port, void *addr, unsigned int count)
154 __ide_flush_prologue();
155 insl(port, addr, count);
156 __ide_flush_dcache_range((unsigned long)addr, count * 4);
157 __ide_flush_epilogue();
160 static inline void __ide_outsw(unsigned long port, const void *addr,
163 __ide_flush_prologue();
164 outsw(port, addr, count);
165 __ide_flush_dcache_range((unsigned long)addr, count * 2);
166 __ide_flush_epilogue();
169 static inline void __ide_outsl(unsigned long port, const void *addr,
172 __ide_flush_prologue();
173 outsl(port, addr, count);
174 __ide_flush_dcache_range((unsigned long)addr, count * 4);
175 __ide_flush_epilogue();
178 static inline void __ide_mm_insw(void __iomem *port, void *addr, u32 count)
180 __ide_flush_prologue();
181 readsw(port, addr, count);
182 __ide_flush_dcache_range((unsigned long)addr, count * 2);
183 __ide_flush_epilogue();
186 static inline void __ide_mm_insl(void __iomem *port, void *addr, u32 count)
188 __ide_flush_prologue();
189 readsl(port, addr, count);
190 __ide_flush_dcache_range((unsigned long)addr, count * 4);
191 __ide_flush_epilogue();
194 static inline void __ide_mm_outsw(void __iomem *port, void *addr, u32 count)
196 __ide_flush_prologue();
197 writesw(port, addr, count);
198 __ide_flush_dcache_range((unsigned long)addr, count * 2);
199 __ide_flush_epilogue();
202 static inline void __ide_mm_outsl(void __iomem * port, void *addr, u32 count)
204 __ide_flush_prologue();
205 writesl(port, addr, count);
206 __ide_flush_dcache_range((unsigned long)addr, count * 4);
207 __ide_flush_epilogue();
210 /* ide_insw calls insw, not __ide_insw. Why? */
215 #define insw(port, addr, count) __ide_insw(port, addr, count)
216 #define insl(port, addr, count) __ide_insl(port, addr, count)
217 #define outsw(port, addr, count) __ide_outsw(port, addr, count)
218 #define outsl(port, addr, count) __ide_outsl(port, addr, count)
220 #endif /* __KERNEL__ */
222 #endif /* __ASM_MACH_GENERIC_IDE_H */