2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2003 by Ralf Baechle
8 #ifndef __ASM_PREFETCH_H
9 #define __ASM_PREFETCH_H
12 * R5000 and RM5200 implements pref and prefx instructions but they're nops, so
13 * rather than wasting time we pretend these processors don't support
16 * R5432 implements Load, Store, LoadStreamed, StoreStreamed, LoadRetained,
17 * StoreRetained and WriteBackInvalidate but not Pref_PrepareForStore.
19 * Hell (and the book on my shelf I can't open ...) know what the R8000 does.
21 * RM7000 version 1.0 interprets all hints as Pref_Load; version 2.0 implements
22 * Pref_PrepareForStore also.
24 * RM9000 is MIPS IV but implements prefetching like MIPS32/MIPS64; it's
25 * Pref_WriteBackInvalidate is a nop and Pref_PrepareForStore is broken in
26 * current versions due to erratum G105.
28 * VR7701 only implements the Load prefetch.
30 * Finally MIPS32 and MIPS64 implement all of the following hints.
35 /* 2 and 3 are reserved */
36 #define Pref_LoadStreamed 4
37 #define Pref_StoreStreamed 5
38 #define Pref_LoadRetained 6
39 #define Pref_StoreRetained 7
40 /* 8 ... 24 are reserved */
41 #define Pref_WriteBackInvalidate 25
42 #define Pref_PrepareForStore 30
44 #endif /* __ASM_PREFETCH_H */