2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1994 Waldorf GMBH
7 * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
8 * Copyright (C) 1996 Paul M. Antoine
9 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
11 #ifndef _ASM_PROCESSOR_H
12 #define _ASM_PROCESSOR_H
14 #include <linux/config.h>
15 #include <linux/cache.h>
16 #include <linux/threads.h>
18 #include <asm/cachectl.h>
20 #include <asm/mipsregs.h>
21 #include <asm/prefetch.h>
22 #include <asm/system.h>
24 #ifdef CONFIG_SGI_IP27
25 #include <asm/sn/types.h>
29 * Descriptor for a cache
32 unsigned short linesz; /* Size of line in bytes */
33 unsigned short ways; /* Number of ways */
34 unsigned short sets; /* Number of lines per set */
35 unsigned int waysize; /* Bytes per way */
36 unsigned int waybit; /* Bits to select in a cache set */
37 unsigned int flags; /* Flags describing cache properties */
43 #define MIPS_CACHE_NOT_PRESENT 0x00000001
44 #define MIPS_CACHE_VTAG 0x00000002 /* Virtually tagged cache */
45 #define MIPS_CACHE_ALIASES 0x00000004 /* Cache could have aliases */
46 #define MIPS_CACHE_IC_F_DC 0x00000008 /* Ic can refill from D-cache */
49 unsigned long udelay_val;
50 unsigned long asid_cache;
51 #if defined(CONFIG_SGI_IP27)
52 // cpuid_t p_cpuid; /* PROM assigned cpuid */
53 cnodeid_t p_nodeid; /* my node ID in compact-id-space */
54 nasid_t p_nasid; /* my node ID in numa-as-id-space */
55 unsigned char p_slice; /* Physical position on node board */
58 unsigned long loops_per_sec;
59 unsigned long ipi_count;
60 unsigned long irq_attempt[NR_IRQS];
61 unsigned long smp_local_irq_count;
62 unsigned long prof_multiplier;
63 unsigned long prof_counter;
67 * Capability and feature descriptor structure for MIPS CPU
69 unsigned long options;
70 unsigned int processor_id;
75 struct cache_desc icache; /* Primary I-cache */
76 struct cache_desc dcache; /* Primary D or combined I/D cache */
77 struct cache_desc scache; /* Secondary cache */
78 struct cache_desc tcache; /* Tertiary/split secondary cache */
79 void *data; /* Additional data */
80 } __attribute__((aligned(SMP_CACHE_BYTES)));
82 extern struct cpuinfo_mips cpu_data[];
83 #define current_cpu_data cpu_data[smp_processor_id()]
85 extern void cpu_probe(void);
86 extern void cpu_report(void);
89 * Return current * instruction pointer ("program counter").
91 #define current_text_addr() ({ __label__ _l; _l: &&_l;})
94 * System setup and hardware flags..
96 extern void (*cpu_wait)(void);
98 extern unsigned int vced_count, vcei_count;
101 * Bus types (default is ISA, but people can check others with these..)
104 #define MCA_bus__is_a_macro /* for versions in ksyms.c */
108 * User space process size: 2GB. This is hardcoded into a few places,
109 * so don't change it unless you know what you are doing.
111 #define TASK_SIZE 0x7fff8000UL
114 * This decides where the kernel will search for a free chunk of vm
115 * space during mmap's.
117 #define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3))
122 * User space process size: 1TB. This is hardcoded into a few places,
123 * so don't change it unless you know what you are doing. TASK_SIZE
124 * is limited to 1TB by the R4000 architecture; R10000 and better can
125 * support 16TB; the architectural reserve for future expansion is
128 #define TASK_SIZE32 0x7fff8000UL
129 #define TASK_SIZE 0x10000000000UL
132 * This decides where the kernel will search for a free chunk of vm
133 * space during mmap's.
135 #define TASK_UNMAPPED_BASE ((current->thread.mflags & MF_32BIT_ADDR) ? \
136 PAGE_ALIGN(TASK_SIZE32 / 3) : PAGE_ALIGN(TASK_SIZE / 3))
140 * Size of io_bitmap in longwords.
142 #define IO_BITMAP_SIZE 2048
144 #define NUM_FPU_REGS 32
146 typedef u64 fpureg_t;
148 struct mips_fpu_hard_struct {
149 fpureg_t fpr[NUM_FPU_REGS];
154 * It would be nice to add some more fields for emulator statistics, but there
155 * are a number of fixed offsets in offset.h and elsewhere that would have to
156 * be recalculated by hand. So the additional information will be private to
157 * the FPU emulator for now. See asm-mips/fpu_emulator.h.
160 struct mips_fpu_soft_struct {
161 fpureg_t fpr[NUM_FPU_REGS];
165 union mips_fpu_union {
166 struct mips_fpu_hard_struct hard;
167 struct mips_fpu_soft_struct soft;
178 #define ARCH_MIN_TASKALIGN 8
181 * If you change thread_struct remember to change the #defines below too!
183 struct thread_struct {
184 /* Saved main processor registers. */
186 unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;
187 unsigned long reg29, reg30, reg31;
189 /* Saved cp0 stuff. */
190 unsigned long cp0_status;
192 /* Saved fpu/fpu emulator stuff. */
193 union mips_fpu_union fpu;
195 /* Other stuff associated with the thread. */
196 unsigned long cp0_badvaddr; /* Last user fault */
197 unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */
198 unsigned long error_code;
199 unsigned long trap_no;
200 #define MF_FIXADE 1 /* Fix address errors in software */
201 #define MF_LOGADE 2 /* Log address errors to syslog */
202 #define MF_32BIT_REGS 4 /* also implies 16/32 fprs */
203 #define MF_32BIT_ADDR 8 /* 32-bit address space (o32/n32) */
204 unsigned long mflags;
205 unsigned long irix_trampoline; /* Wheee... */
206 unsigned long irix_oldctx;
209 #define MF_ABI_MASK (MF_32BIT_REGS | MF_32BIT_ADDR)
210 #define MF_O32 (MF_32BIT_REGS | MF_32BIT_ADDR)
211 #define MF_N32 MF_32BIT_ADDR
214 #define INIT_THREAD { \
216 * saved main processor registers \
218 0, 0, 0, 0, 0, 0, 0, 0, \
225 * saved fpu/fpu emulator stuff \
229 * Other stuff associated with the process \
233 * For now the default is to fix address errors \
242 /* Free all resources held by a thread. */
243 #define release_thread(thread) do { } while(0)
245 /* Prepare to copy thread state - unlazy all lazy status */
246 #define prepare_to_copy(tsk) do { } while (0)
248 extern long kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
250 extern unsigned long thread_saved_pc(struct task_struct *tsk);
253 * Do necessary setup to start up a newly executed thread.
255 extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp);
257 unsigned long get_wchan(struct task_struct *p);
259 #define __PT_REG(reg) ((long)&((struct pt_regs *)0)->reg - sizeof(struct pt_regs))
260 #define __KSTK_TOS(tsk) ((unsigned long)(tsk->thread_info) + THREAD_SIZE - 32)
261 #define KSTK_EIP(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(cp0_epc)))
262 #define KSTK_ESP(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(regs[29])))
263 #define KSTK_STATUS(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(cp0_status)))
265 #define cpu_relax() barrier()
267 #endif /* __KERNEL__ */
270 * Return_address is a replacement for __builtin_return_address(count)
271 * which on certain architectures cannot reasonably be implemented in GCC
272 * (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386).
273 * Note that __builtin_return_address(x>=1) is forbidden because GCC
274 * aborts compilation on some CPUs. It's simply not possible to unwind
275 * some CPU's stackframes.
277 * __builtin_return_address works only for non-leaf functions. We avoid the
278 * overhead of a function call by forcing the compiler to save the return
279 * address register on the stack.
281 #define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})
283 #ifdef CONFIG_CPU_HAS_PREFETCH
285 #define ARCH_HAS_PREFETCH
287 extern inline void prefetch(const void *addr)
289 __asm__ __volatile__(
294 : "i" (Pref_Load), "r" (addr));
299 #endif /* _ASM_PROCESSOR_H */