include/asm-mips/spinlock.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1999, 2000 by Ralf Baechle
   7  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
   8  */
   9 #ifndef _ASM_SPINLOCK_H
  10 #define _ASM_SPINLOCK_H
  11
  12 #include <asm/war.h>
  13
  14 /*
  15  * Your basic SMP spinlocks, allowing only a single CPU anywhere
  16  */
  17
  18 typedef struct {
  19         volatile unsigned int lock;
  20 } spinlock_t;
  21
  22 #define SPIN_LOCK_UNLOCKED (spinlock_t) { 0 }
  23
  24 #define spin_lock_init(x)       do { (x)->lock = 0; } while(0)
  25
  26 #define spin_is_locked(x)       ((x)->lock != 0)
  27 #define spin_unlock_wait(x)     do { barrier(); } while ((x)->lock)
  28 #define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock)
  29
  30 /*
  31  * Simple spin lock operations.  There are two variants, one clears IRQ's
  32  * on the local processor, one does not.
  33  *
  34  * We make no fairness assumptions.  They have a cost.
  35  */
  36
  37 static inline void _raw_spin_lock(spinlock_t *lock)
  38 {
  39         unsigned int tmp;
  40
  41         if (R10000_LLSC_WAR) {
  42                 __asm__ __volatile__(
  43                 "       .set    noreorder       # _raw_spin_lock        \n"
  44                 "1:     ll      %1, %2                                  \n"
  45                 "       bnez    %1, 1b                                  \n"
  46                 "        li     %1, 1                                   \n"
  47                 "       sc      %1, %0                                  \n"
  48                 "       beqzl   %1, 1b                                  \n"
  49                 "        nop                                            \n"
  50                 "       sync                                            \n"
  51                 "       .set    reorder                                 \n"
  52                 : "=m" (lock->lock), "=&r" (tmp)
  53                 : "m" (lock->lock)
  54                 : "memory");
  55         } else {
  56                 __asm__ __volatile__(
  57                 "       .set    noreorder       # _raw_spin_lock        \n"
  58                 "1:     ll      %1, %2                                  \n"
  59                 "       bnez    %1, 1b                                  \n"
  60                 "        li     %1, 1                                   \n"
  61                 "       sc      %1, %0                                  \n"
  62                 "       beqz    %1, 1b                                  \n"
  63                 "        sync                                           \n"
  64                 "       .set    reorder                                 \n"
  65                 : "=m" (lock->lock), "=&r" (tmp)
  66                 : "m" (lock->lock)
  67                 : "memory");
  68         }
  69 }
  70
  71 static inline void _raw_spin_unlock(spinlock_t *lock)
  72 {
  73         __asm__ __volatile__(
  74         "       .set    noreorder       # _raw_spin_unlock      \n"
  75         "       sync                                            \n"
  76         "       sw      $0, %0                                  \n"
  77         "       .set\treorder                                   \n"
  78         : "=m" (lock->lock)
  79         : "m" (lock->lock)
  80         : "memory");
  81 }
  82
  83 static inline unsigned int _raw_spin_trylock(spinlock_t *lock)
  84 {
  85         unsigned int temp, res;
  86
  87         if (R10000_LLSC_WAR) {
  88                 __asm__ __volatile__(
  89                 "       .set    noreorder       # _raw_spin_trylock     \n"
  90                 "1:     ll      %0, %3                                  \n"
  91                 "       ori     %2, %0, 1                               \n"
  92                 "       sc      %2, %1                                  \n"
  93                 "       beqzl   %2, 1b                                  \n"
  94                 "        nop                                            \n"
  95                 "       andi    %2, %0, 1                               \n"
  96                 "       sync                                            \n"
  97                 "       .set    reorder"
  98                 : "=&r" (temp), "=m" (lock->lock), "=&r" (res)
  99                 : "m" (lock->lock)
 100                 : "memory");
 101         } else {
 102                 __asm__ __volatile__(
 103                 "       .set    noreorder       # _raw_spin_trylock     \n"
 104                 "1:     ll      %0, %3                                  \n"
 105                 "       ori     %2, %0, 1                               \n"
 106                 "       sc      %2, %1                                  \n"
 107                 "       beqz    %2, 1b                                  \n"
 108                 "        andi   %2, %0, 1                               \n"
 109                 "       sync                                            \n"
 110                 "       .set    reorder"
 111                 : "=&r" (temp), "=m" (lock->lock), "=&r" (res)
 112                 : "m" (lock->lock)
 113                 : "memory");
 114         }
 115
 116         return res == 0;
 117 }
 118
 119 /*
 120  * Read-write spinlocks, allowing multiple readers but only one writer.
 121  *
 122  * NOTE! it is quite common to have readers in interrupts but no interrupt
 123  * writers. For those circumstances we can "mix" irq-safe locks - any writer
 124  * needs to get a irq-safe write-lock, but readers can get non-irqsafe
 125  * read-locks.
 126  */
 127
 128 typedef struct {
 129         volatile unsigned int lock;
 130 } rwlock_t;
 131
 132 #define RW_LOCK_UNLOCKED (rwlock_t) { 0 }
 133
 134 #define rwlock_init(x)  do { *(x) = RW_LOCK_UNLOCKED; } while(0)
 135
 136 #define rwlock_is_locked(x) ((x)->lock)
 137
 138 static inline void _raw_read_lock(rwlock_t *rw)
 139 {
 140         unsigned int tmp;
 141
 142         if (R10000_LLSC_WAR) {
 143                 __asm__ __volatile__(
 144                 "       .set    noreorder       # _raw_read_lock        \n"
 145                 "1:     ll      %1, %2                                  \n"
 146                 "       bltz    %1, 1b                                  \n"
 147                 "        addu   %1, 1                                   \n"
 148                 "       sc      %1, %0                                  \n"
 149                 "       beqzl   %1, 1b                                  \n"
 150                 "        nop                                            \n"
 151                 "       sync                                            \n"
 152                 "       .set    reorder                                 \n"
 153                 : "=m" (rw->lock), "=&r" (tmp)
 154                 : "m" (rw->lock)
 155                 : "memory");
 156         } else {
 157                 __asm__ __volatile__(
 158                 "       .set    noreorder       # _raw_read_lock        \n"
 159                 "1:     ll      %1, %2                                  \n"
 160                 "       bltz    %1, 1b                                  \n"
 161                 "        addu   %1, 1                                   \n"
 162                 "       sc      %1, %0                                  \n"
 163                 "       beqz    %1, 1b                                  \n"
 164                 "        sync                                           \n"
 165                 "       .set    reorder                                 \n"
 166                 : "=m" (rw->lock), "=&r" (tmp)
 167                 : "m" (rw->lock)
 168                 : "memory");
 169         }
 170 }
 171
 172 /* Note the use of sub, not subu which will make the kernel die with an
 173    overflow exception if we ever try to unlock an rwlock that is already
 174    unlocked or is being held by a writer.  */
 175 static inline void _raw_read_unlock(rwlock_t *rw)
 176 {
 177         unsigned int tmp;
 178
 179         if (R10000_LLSC_WAR) {
 180                 __asm__ __volatile__(
 181                 "1:     ll      %1, %2          # _raw_read_unlock      \n"
 182                 "       sub     %1, 1                                   \n"
 183                 "       sc      %1, %0                                  \n"
 184                 "       beqzl   %1, 1b                                  \n"
 185                 "       sync                                            \n"
 186                 : "=m" (rw->lock), "=&r" (tmp)
 187                 : "m" (rw->lock)
 188                 : "memory");
 189         } else {
 190                 __asm__ __volatile__(
 191                 "       .set    noreorder       # _raw_read_unlock      \n"
 192                 "1:     ll      %1, %2                                  \n"
 193                 "       sub     %1, 1                                   \n"
 194                 "       sc      %1, %0                                  \n"
 195                 "       beqz    %1, 1b                                  \n"
 196                 "        sync                                           \n"
 197                 "       .set    reorder                                 \n"
 198                 : "=m" (rw->lock), "=&r" (tmp)
 199                 : "m" (rw->lock)
 200                 : "memory");
 201         }
 202 }
 203
 204 static inline void _raw_write_lock(rwlock_t *rw)
 205 {
 206         unsigned int tmp;
 207
 208         if (R10000_LLSC_WAR) {
 209                 __asm__ __volatile__(
 210                 "       .set    noreorder       # _raw_write_lock       \n"
 211                 "1:     ll      %1, %2                                  \n"
 212                 "       bnez    %1, 1b                                  \n"
 213                 "        lui    %1, 0x8000                              \n"
 214                 "       sc      %1, %0                                  \n"
 215                 "       beqzl   %1, 1b                                  \n"
 216                 "        nop                                            \n"
 217                 "       sync                                            \n"
 218                 "       .set    reorder                                 \n"
 219                 : "=m" (rw->lock), "=&r" (tmp)
 220                 : "m" (rw->lock)
 221                 : "memory");
 222         } else {
 223                 __asm__ __volatile__(
 224                 "       .set    noreorder       # _raw_write_lock       \n"
 225                 "1:     ll      %1, %2                                  \n"
 226                 "       bnez    %1, 1b                                  \n"
 227                 "        lui    %1, 0x8000                              \n"
 228                 "       sc      %1, %0                                  \n"
 229                 "       beqz    %1, 1b                                  \n"
 230                 "        nop                                            \n"
 231                 "       sync                                            \n"
 232                 "       .set    reorder                                 \n"
 233                 : "=m" (rw->lock), "=&r" (tmp)
 234                 : "m" (rw->lock)
 235                 : "memory");
 236         }
 237 }
 238
 239 static inline void _raw_write_unlock(rwlock_t *rw)
 240 {
 241         __asm__ __volatile__(
 242         "       sync                    # _raw_write_unlock     \n"
 243         "       sw      $0, %0                                  \n"
 244         : "=m" (rw->lock)
 245         : "m" (rw->lock)
 246         : "memory");
 247 }
 248
 249 static inline int _raw_write_trylock(rwlock_t *rw)
 250 {
 251         unsigned int tmp;
 252         int ret;
 253
 254         if (R10000_LLSC_WAR) {
 255                 __asm__ __volatile__(
 256                 "       .set    noreorder       # _raw_write_trylock    \n"
 257                 "       li      %2, 0                                   \n"
 258                 "1:     ll      %1, %3                                  \n"
 259                 "       bnez    %1, 2f                                  \n"
 260                 "        lui    %1, 0x8000                              \n"
 261                 "       sc      %1, %0                                  \n"
 262                 "       beqzl   %1, 1b                                  \n"
 263                 "        nop                                            \n"
 264                 "       sync                                            \n"
 265                 "       li      %2, 1                                   \n"
 266                 "       .set    reorder                                 \n"
 267                 "2:                                                     \n"
 268                 : "=m" (rw->lock), "=&r" (tmp), "=&r" (ret)
 269                 : "m" (rw->lock)
 270                 : "memory");
 271         } else {
 272                 __asm__ __volatile__(
 273                 "       .set    noreorder       # _raw_write_trylock    \n"
 274                 "       li      %2, 0                                   \n"
 275                 "1:     ll      %1, %3                                  \n"
 276                 "       bnez    %1, 2f                                  \n"
 277                 "       lui     %1, 0x8000                              \n"
 278                 "       sc      %1, %0                                  \n"
 279                 "       beqz    %1, 1b                                  \n"
 280                 "        sync                                           \n"
 281                 "       li      %2, 1                                   \n"
 282                 "       .set    reorder                                 \n"
 283                 "2:                                                     \n"
 284                 : "=m" (rw->lock), "=&r" (tmp), "=&r" (ret)
 285                 : "m" (rw->lock)
 286                 : "memory");
 287         }
 288
 289         return ret;
 290 }
 291
 292 #endif /* _ASM_SPINLOCK_H */