1 /* hardirq.h: PA-RISC hard IRQ support.
3 * Copyright (C) 2001 Matthew Wilcox <matthew@wil.cx>
5 * The locking is really quite interesting. There's a cpu-local
6 * count of how many interrupts are being handled, and a global
7 * lock. An interrupt can only be serviced if the global lock
8 * is free. You can't be sure no more interrupts are being
9 * serviced until you've acquired the lock and then checked
10 * all the per-cpu interrupt counts are all zero. It's a specialised
11 * br_lock, and that's exactly how Sparc does it. We don't because
12 * it's more locking for us. This way is lock-free in the interrupt path.
15 #ifndef _PARISC_HARDIRQ_H
16 #define _PARISC_HARDIRQ_H
18 #include <linux/config.h>
19 #include <linux/threads.h>
20 #include <linux/cache.h>
23 unsigned long __softirq_pending; /* set_bit is used on this */
24 unsigned int __syscall_count;
25 struct task_struct * __ksoftirqd_task;
26 unsigned long idle_timestamp;
27 } ____cacheline_aligned irq_cpustat_t;
29 #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
32 * We put the hardirq and softirq counter into the preemption counter. The bitmask has the
35 * - bits 0-7 are the preemption count (max preemption depth: 256)
36 * - bits 8-15 are the softirq count (max # of softirqs: 256)
37 * - bits 16-31 are the hardirq count (max # of hardirqs: 65536)
39 * - (bit 63 is the PREEMPT_ACTIVE flag---not currently implemented.)
41 * PREEMPT_MASK: 0x000000ff
42 * SOFTIRQ_MASK: 0x0000ff00
43 * HARDIRQ_MASK: 0xffff0000
46 #define PREEMPT_BITS 8
47 #define SOFTIRQ_BITS 8
48 #define HARDIRQ_BITS 16
50 #define PREEMPT_SHIFT 0
51 #define SOFTIRQ_SHIFT (PREEMPT_SHIFT + PREEMPT_BITS)
52 #define HARDIRQ_SHIFT (SOFTIRQ_SHIFT + SOFTIRQ_BITS)
54 #define __MASK(x) ((1UL << (x))-1)
56 #define PREEMPT_MASK (__MASK(PREEMPT_BITS) << PREEMPT_SHIFT)
57 #define HARDIRQ_MASK (__MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT)
58 #define SOFTIRQ_MASK (__MASK(SOFTIRQ_BITS) << SOFTIRQ_SHIFT)
60 #define hardirq_count() (preempt_count() & HARDIRQ_MASK)
61 #define softirq_count() (preempt_count() & SOFTIRQ_MASK)
62 #define irq_count() (preempt_count() & (HARDIRQ_MASK | SOFTIRQ_MASK))
64 #define PREEMPT_OFFSET (1UL << PREEMPT_SHIFT)
65 #define SOFTIRQ_OFFSET (1UL << SOFTIRQ_SHIFT)
66 #define HARDIRQ_OFFSET (1UL << HARDIRQ_SHIFT)
69 * The hardirq mask has to be large enough to have space for potentially all IRQ sources
70 * in the system nesting on a single CPU:
72 #if (1 << HARDIRQ_BITS) < NR_IRQS
73 # error HARDIRQ_BITS is too low!
77 * Are we doing bottom half or hardware interrupt processing?
78 * Are we in a softirq context?
81 #define in_irq() (hardirq_count())
82 #define in_softirq() (softirq_count())
83 #define in_interrupt() (irq_count())
85 #define hardirq_trylock() (!in_interrupt())
86 #define hardirq_endlock() do { } while (0)
88 #define irq_enter() (preempt_count() += HARDIRQ_OFFSET)
91 # error CONFIG_PREEMT currently not supported.
92 # define in_atomic() BUG()
93 # define IRQ_EXIT_OFFSET (HARDIRQ_OFFSET-1)
95 # define in_atomic() (preempt_count() != 0)
96 # define IRQ_EXIT_OFFSET HARDIRQ_OFFSET
101 preempt_count() -= IRQ_EXIT_OFFSET; \
102 if (!in_interrupt() && softirq_pending(smp_processor_id())) \
104 preempt_enable_no_resched(); \
108 extern void synchronize_irq (unsigned int irq);
110 # define synchronize_irq(irq) barrier()
111 #endif /* CONFIG_SMP */
113 #endif /* _PARISC_HARDIRQ_H */