4 #include <linux/config.h>
7 * PDC return values ...
8 * All PDC calls return a subset of these errors.
11 #define PDC_WARN 3 /* Call completed with a warning */
12 #define PDC_REQ_ERR_1 2 /* See above */
13 #define PDC_REQ_ERR_0 1 /* Call would generate a requestor error */
14 #define PDC_OK 0 /* Call completed successfully */
15 #define PDC_BAD_PROC -1 /* Called non-existent procedure*/
16 #define PDC_BAD_OPTION -2 /* Called with non-existent option */
17 #define PDC_ERROR -3 /* Call could not complete without an error */
18 #define PDC_NE_MOD -5 /* Module not found */
19 #define PDC_NE_CELL_MOD -7 /* Cell module not found */
20 #define PDC_INVALID_ARG -10 /* Called with an invalid argument */
21 #define PDC_BUS_POW_WARN -12 /* Call could not complete in allowed power budget */
22 #define PDC_NOT_NARROW -17 /* Narrow mode not supported */
29 #define PDC_POW_FAIL 1 /* perform a power-fail */
30 #define PDC_POW_FAIL_PREPARE 0 /* prepare for powerfail */
32 #define PDC_CHASSIS 2 /* PDC-chassis functions */
33 #define PDC_CHASSIS_DISP 0 /* update chassis display */
34 #define PDC_CHASSIS_WARN 1 /* return chassis warnings */
35 #define PDC_CHASSIS_DISPWARN 2 /* update&return chassis status */
36 #define PDC_RETURN_CHASSIS_INFO 128 /* HVERSION dependent: return chassis LED/LCD info */
38 #define PDC_PIM 3 /* Get PIM data */
39 #define PDC_PIM_HPMC 0 /* Transfer HPMC data */
40 #define PDC_PIM_RETURN_SIZE 1 /* Get Max buffer needed for PIM*/
41 #define PDC_PIM_LPMC 2 /* Transfer HPMC data */
42 #define PDC_PIM_SOFT_BOOT 3 /* Transfer Soft Boot data */
43 #define PDC_PIM_TOC 4 /* Transfer TOC data */
45 #define PDC_MODEL 4 /* PDC model information call */
46 #define PDC_MODEL_INFO 0 /* returns information */
47 #define PDC_MODEL_BOOTID 1 /* set the BOOT_ID */
48 #define PDC_MODEL_VERSIONS 2 /* returns cpu-internal versions*/
49 #define PDC_MODEL_SYSMODEL 3 /* return system model info */
50 #define PDC_MODEL_ENSPEC 4 /* enable specific option */
51 #define PDC_MODEL_DISPEC 5 /* disable specific option */
52 #define PDC_MODEL_CPU_ID 6 /* returns cpu-id (only newer machines!) */
53 #define PDC_MODEL_CAPABILITIES 7 /* returns OS32/OS64-flags */
54 #define PDC_MODEL_GET_BOOT__OP 8 /* returns boot test options */
55 #define PDC_MODEL_SET_BOOT__OP 9 /* set boot test options */
57 #define PA89_INSTRUCTION_SET 0x4 /* capatibilies returned */
58 #define PA90_INSTRUCTION_SET 0x8
60 #define PDC_CACHE 5 /* return/set cache (& TLB) info*/
61 #define PDC_CACHE_INFO 0 /* returns information */
62 #define PDC_CACHE_SET_COH 1 /* set coherence state */
63 #define PDC_CACHE_RET_SPID 2 /* returns space-ID bits */
65 #define PDC_HPA 6 /* return HPA of processor */
66 #define PDC_HPA_PROCESSOR 0
67 #define PDC_HPA_MODULES 1
69 #define PDC_COPROC 7 /* Co-Processor (usually FP unit(s)) */
70 #define PDC_COPROC_CFG 0 /* Co-Processor Cfg (FP unit(s) enabled?) */
72 #define PDC_IODC 8 /* talk to IODC */
73 #define PDC_IODC_READ 0 /* read IODC entry point */
74 /* PDC_IODC_RI_ * INDEX parameter of PDC_IODC_READ */
75 #define PDC_IODC_RI_DATA_BYTES 0 /* IODC Data Bytes */
76 /* 1, 2 obsolete - HVERSION dependent*/
77 #define PDC_IODC_RI_INIT 3 /* Initialize module */
78 #define PDC_IODC_RI_IO 4 /* Module input/output */
79 #define PDC_IODC_RI_SPA 5 /* Module input/output */
80 #define PDC_IODC_RI_CONFIG 6 /* Module input/output */
81 /* 7 obsolete - HVERSION dependent */
82 #define PDC_IODC_RI_TEST 8 /* Module input/output */
83 #define PDC_IODC_RI_TLB 9 /* Module input/output */
84 #define PDC_IODC_NINIT 2 /* non-destructive init */
85 #define PDC_IODC_DINIT 3 /* destructive init */
86 #define PDC_IODC_MEMERR 4 /* check for memory errors */
87 #define PDC_IODC_INDEX_DATA 0 /* get first 16 bytes from mod IODC */
88 #define PDC_IODC_BUS_ERROR -4 /* bus error return value */
89 #define PDC_IODC_INVALID_INDEX -5 /* invalid index return value */
90 #define PDC_IODC_COUNT -6 /* count is too small */
92 #define PDC_TOD 9 /* time-of-day clock (TOD) */
93 #define PDC_TOD_READ 0 /* read TOD */
94 #define PDC_TOD_WRITE 1 /* write TOD */
95 #define PDC_TOD_ITIMER 2 /* calibrate Interval Timer (CR16) */
97 #define PDC_STABLE 10 /* stable storage (sprockets) */
98 #define PDC_STABLE_READ 0
99 #define PDC_STABLE_WRITE 1
100 #define PDC_STABLE_RETURN_SIZE 2
101 #define PDC_STABLE_VERIFY_CONTENTS 3
102 #define PDC_STABLE_INITIALIZE 4
104 #define PDC_NVOLATILE 11 /* often not implemented */
106 #define PDC_ADD_VALID 12 /* Memory validation PDC call */
107 #define PDC_ADD_VALID_VERIFY 0 /* Make PDC_ADD_VALID verify region */
109 #define PDC_INSTR 15 /* get instr to invoke PDCE_CHECK() */
111 #define PDC_PROC 16 /* (sprockets) */
113 #define PDC_CONFIG 16 /* (sprockets) */
114 #define PDC_CONFIG_DECONFIG 0
115 #define PDC_CONFIG_DRECONFIG 1
116 #define PDC_CONFIG_DRETURN_CONFIG 2
118 #define PDC_BLOCK_TLB 18 /* manage hardware block-TLB */
119 #define PDC_BTLB_INFO 0 /* returns parameter */
120 #define PDC_BTLB_INSERT 1 /* insert BTLB entry */
121 #define PDC_BTLB_PURGE 2 /* purge BTLB entries */
122 #define PDC_BTLB_PURGE_ALL 3 /* purge all BTLB entries */
124 #define PDC_TLB 19 /* manage hardware TLB miss handling */
125 #define PDC_TLB_INFO 0 /* returns parameter */
126 #define PDC_TLB_SETUP 1 /* set up miss handling */
128 #define PDC_MEM 20 /* Manage memory */
129 #define PDC_MEM_MEMINFO 0
130 #define PDC_MEM_ADD_PAGE 1
131 #define PDC_MEM_CLEAR_PDT 2
132 #define PDC_MEM_READ_PDT 3
133 #define PDC_MEM_RESET_CLEAR 4
134 #define PDC_MEM_GOODMEM 5
135 #define PDC_MEM_TABLE 128 /* Non contig mem map (sprockets) */
136 #define PDC_MEM_RETURN_ADDRESS_TABLE PDC_MEM_TABLE
137 #define PDC_MEM_GET_MEMORY_SYSTEM_TABLES_SIZE 131
138 #define PDC_MEM_GET_MEMORY_SYSTEM_TABLES 132
139 #define PDC_MEM_GET_PHYSICAL_LOCATION_FROM_MEMORY_ADDRESS 133
141 #define PDC_MEM_RET_SBE_REPLACED 5 /* PDC_MEM return values */
142 #define PDC_MEM_RET_DUPLICATE_ENTRY 4
143 #define PDC_MEM_RET_BUF_SIZE_SMALL 1
144 #define PDC_MEM_RET_PDT_FULL -11
145 #define PDC_MEM_RET_INVALID_PHYSICAL_LOCATION ~0ULL
149 unsigned long long baseAddr;
151 unsigned int reserved;
156 #define PDC_PSW 21 /* Get/Set default System Mask */
157 #define PDC_PSW_MASK 0 /* Return mask */
158 #define PDC_PSW_GET_DEFAULTS 1 /* Return defaults */
159 #define PDC_PSW_SET_DEFAULTS 2 /* Set default */
160 #define PDC_PSW_ENDIAN_BIT 1 /* set for big endian */
161 #define PDC_PSW_WIDE_BIT 2 /* set for wide mode */
163 #define PDC_SYSTEM_MAP 22 /* find system modules */
164 #define PDC_FIND_MODULE 0
165 #define PDC_FIND_ADDRESS 1
166 #define PDC_TRANSLATE_PATH 2
168 #define PDC_SOFT_POWER 23 /* soft power switch */
169 #define PDC_SOFT_POWER_INFO 0 /* return info about the soft power switch */
170 #define PDC_SOFT_POWER_ENABLE 1 /* enable/disable soft power switch */
173 /* HVERSION dependent */
175 /* The PDC_MEM_MAP calls */
176 #define PDC_MEM_MAP 128 /* on s700: return page info */
177 #define PDC_MEM_MAP_HPA 0 /* returns hpa of a module */
179 #define PDC_EEPROM 129 /* EEPROM access */
180 #define PDC_EEPROM_READ_WORD 0
181 #define PDC_EEPROM_WRITE_WORD 1
182 #define PDC_EEPROM_READ_BYTE 2
183 #define PDC_EEPROM_WRITE_BYTE 3
184 #define PDC_EEPROM_EEPROM_PASSWORD -1000
186 #define PDC_NVM 130 /* NVM (non-volatile memory) access */
187 #define PDC_NVM_READ_WORD 0
188 #define PDC_NVM_WRITE_WORD 1
189 #define PDC_NVM_READ_BYTE 2
190 #define PDC_NVM_WRITE_BYTE 3
192 #define PDC_SEED_ERROR 132 /* (sprockets) */
194 #define PDC_IO 135 /* log error info, reset IO system */
195 #define PDC_IO_READ_AND_CLEAR_ERRORS 0
196 #define PDC_IO_RESET 1
197 #define PDC_IO_RESET_DEVICES 2
198 /* sets bits 6&7 (little endian) of the HcControl Register */
199 #define PDC_IO_USB_SUSPEND 0xC000000000000000
200 #define PDC_IO_EEPROM_IO_ERR_TABLE_FULL -5 /* return value */
201 #define PDC_IO_NO_SUSPEND -6 /* return value */
203 #define PDC_BROADCAST_RESET 136 /* reset all processors */
204 #define PDC_DO_RESET 0 /* option: perform a broadcast reset */
205 #define PDC_DO_FIRM_TEST_RESET 1 /* Do broadcast reset with bitmap */
206 #define PDC_BR_RECONFIGURATION 2 /* reset w/reconfiguration */
207 #define PDC_FIRM_TEST_MAGIC 0xab9ec36fUL /* for this reboot only */
209 #define PDC_LAN_STATION_ID 138 /* Hversion dependent mechanism for */
210 #define PDC_LAN_STATION_ID_READ 0 /* getting the lan station address */
212 #define PDC_LAN_STATION_ID_SIZE 6
214 #define PDC_CHECK_RANGES 139 /* (sprockets) */
216 #define PDC_NV_SECTIONS 141 /* (sprockets) */
218 #define PDC_PERFORMANCE 142 /* performance monitoring */
220 #define PDC_SYSTEM_INFO 143 /* system information */
221 #define PDC_SYSINFO_RETURN_INFO_SIZE 0
222 #define PDC_SYSINFO_RRETURN_SYS_INFO 1
223 #define PDC_SYSINFO_RRETURN_ERRORS 2
224 #define PDC_SYSINFO_RRETURN_WARNINGS 3
225 #define PDC_SYSINFO_RETURN_REVISIONS 4
226 #define PDC_SYSINFO_RRETURN_DIAGNOSE 5
227 #define PDC_SYSINFO_RRETURN_HV_DIAGNOSE 1005
229 #define PDC_RDR 144 /* (sprockets) */
230 #define PDC_RDR_READ_BUFFER 0
231 #define PDC_RDR_READ_SINGLE 1
232 #define PDC_RDR_WRITE_SINGLE 2
234 #define PDC_INTRIGUE 145 /* (sprockets) */
235 #define PDC_INTRIGUE_WRITE_BUFFER 0
236 #define PDC_INTRIGUE_GET_SCRATCH_BUFSIZE 1
237 #define PDC_INTRIGUE_START_CPU_COUNTERS 2
238 #define PDC_INTRIGUE_STOP_CPU_COUNTERS 3
240 #define PDC_STI 146 /* STI access */
241 /* same as PDC_PCI_XXX values (see below) */
243 /* Legacy PDC definitions for same stuff */
244 #define PDC_PCI_INDEX 147
245 #define PDC_PCI_INTERFACE_INFO 0
246 #define PDC_PCI_SLOT_INFO 1
247 #define PDC_PCI_INFLIGHT_BYTES 2
248 #define PDC_PCI_READ_CONFIG 3
249 #define PDC_PCI_WRITE_CONFIG 4
250 #define PDC_PCI_READ_PCI_IO 5
251 #define PDC_PCI_WRITE_PCI_IO 6
252 #define PDC_PCI_READ_CONFIG_DELAY 7
253 #define PDC_PCI_UPDATE_CONFIG_DELAY 8
254 #define PDC_PCI_PCI_PATH_TO_PCI_HPA 9
255 #define PDC_PCI_PCI_HPA_TO_PCI_PATH 10
256 #define PDC_PCI_PCI_PATH_TO_PCI_BUS 11
257 #define PDC_PCI_PCI_RESERVED 12
258 #define PDC_PCI_PCI_INT_ROUTE_SIZE 13
259 #define PDC_PCI_GET_INT_TBL_SIZE PDC_PCI_PCI_INT_ROUTE_SIZE
260 #define PDC_PCI_PCI_INT_ROUTE 14
261 #define PDC_PCI_GET_INT_TBL PDC_PCI_PCI_INT_ROUTE
262 #define PDC_PCI_READ_MON_TYPE 15
263 #define PDC_PCI_WRITE_MON_TYPE 16
266 /* Get SCSI Interface Card info: SDTR, SCSI ID, mode (SE vs LVD) */
267 #define PDC_INITIATOR 163
268 #define PDC_GET_INITIATOR 0
269 #define PDC_SET_INITIATOR 1
270 #define PDC_DELETE_INITIATOR 2
271 #define PDC_RETURN_TABLE_SIZE 3
272 #define PDC_RETURN_TABLE 4
274 #define PDC_LINK 165 /* (sprockets) */
275 #define PDC_LINK_PCI_ENTRY_POINTS 0 /* list (Arg1) = 0 */
276 #define PDC_LINK_USB_ENTRY_POINTS 1 /* list (Arg1) = 1 */
279 /* constants for OS (NVM...) */
280 #define OS_ID_NONE 0 /* Undefined OS ID */
281 #define OS_ID_HPUX 1 /* HP-UX OS */
282 #define OS_ID_LINUX OS_ID_HPUX /* just use the same value as hpux */
283 #define OS_ID_MPEXL 2 /* MPE XL OS */
284 #define OS_ID_OSF 3 /* OSF OS */
285 #define OS_ID_HPRT 4 /* HP-RT OS */
286 #define OS_ID_NOVEL 5 /* NOVELL OS */
287 #define OS_ID_NT 6 /* NT OS */
290 /* constants for PDC_CHASSIS */
302 #define PDC_PAT_CELL 64L /* Interface for gaining and
303 * manipulating cell state within PD */
304 #define PDC_PAT_CELL_GET_NUMBER 0L /* Return Cell number */
305 #define PDC_PAT_CELL_GET_INFO 1L /* Returns info about Cell */
306 #define PDC_PAT_CELL_MODULE 2L /* Returns info about Module */
307 #define PDC_PAT_CELL_SET_ATTENTION 9L /* Set Cell Attention indicator */
308 #define PDC_PAT_CELL_NUMBER_TO_LOC 10L /* Cell Number -> Location */
309 #define PDC_PAT_CELL_WALK_FABRIC 11L /* Walk the Fabric */
310 #define PDC_PAT_CELL_GET_RDT_SIZE 12L /* Return Route Distance Table Sizes */
311 #define PDC_PAT_CELL_GET_RDT 13L /* Return Route Distance Tables */
312 #define PDC_PAT_CELL_GET_LOCAL_PDH_SZ 14L /* Read Local PDH Buffer Size*/
313 #define PDC_PAT_CELL_SET_LOCAL_PDH 15L /* Write Local PDH Buffer */
314 #define PDC_PAT_CELL_GET_REMOTE_PDH_SZ 16L /* Return Remote PDH Buffer Size */
315 #define PDC_PAT_CELL_GET_REMOTE_PDH 17L /* Read Remote PDH Buffer */
316 #define PDC_PAT_CELL_GET_DBG_INFO 128L /* Return DBG Buffer Info */
317 #define PDC_PAT_CELL_CHANGE_ALIAS 129L /* Change Non-Equivalent Alias Checking */
320 ** Arg to PDC_PAT_CELL_MODULE memaddr[4]
322 ** Addresses on the Merced Bus != all Runway Bus addresses.
323 ** This is intended for programming SBA/LBA chips range registers.
328 /* PDC_PAT_CELL_MODULE entity type values */
329 #define PAT_ENTITY_CA 0 /* central agent */
330 #define PAT_ENTITY_PROC 1 /* processor */
331 #define PAT_ENTITY_MEM 2 /* memory controller */
332 #define PAT_ENTITY_SBA 3 /* system bus adapter */
333 #define PAT_ENTITY_LBA 4 /* local bus adapter */
334 #define PAT_ENTITY_PBC 5 /* processor bus converter */
335 #define PAT_ENTITY_XBC 6 /* crossbar fabric connect */
336 #define PAT_ENTITY_RC 7 /* fabric interconnect */
338 /* PDC_PAT_CELL_MODULE address range type values */
339 #define PAT_PBNUM 0 /* PCI Bus Number */
340 #define PAT_LMMIO 1 /* < 4G MMIO Space */
341 #define PAT_GMMIO 2 /* > 4G MMIO Space */
342 #define PAT_NPIOP 3 /* Non Postable I/O Port Space */
343 #define PAT_PIOP 4 /* Postable I/O Port Space */
344 #define PAT_AHPA 5 /* Additional HPA Space */
345 #define PAT_UFO 6 /* HPA Space (UFO for Mariposa) */
346 #define PAT_GNIP 7 /* GNI Reserved Space */
349 /* PDC PAT CHASSIS LOG */
350 #define PDC_PAT_CHASSIS_LOG 65L /* Platform logging & forward
351 ** progress functions */
352 #define PDC_PAT_CHASSIS_WRITE_LOG 0L /* Write Log Entry */
353 #define PDC_PAT_CHASSIS_READ_LOG 1L /* Read Log Entry */
357 #define PDC_PAT_CPU 67L /* Interface to CPU configuration
358 * within the protection domain */
359 #define PDC_PAT_CPU_INFO 0L /* Return CPU config info */
360 #define PDC_PAT_CPU_DELETE 1L /* Delete CPU */
361 #define PDC_PAT_CPU_ADD 2L /* Add CPU */
362 #define PDC_PAT_CPU_GET_NUMBER 3L /* Return CPU Number */
363 #define PDC_PAT_CPU_GET_HPA 4L /* Return CPU HPA */
364 #define PDC_PAT_CPU_STOP 5L /* Stop CPU */
365 #define PDC_PAT_CPU_RENDEZVOUS 6L /* Rendezvous CPU */
366 #define PDC_PAT_CPU_GET_CLOCK_INFO 7L /* Return CPU Clock info */
367 #define PDC_PAT_CPU_GET_RENDEZVOUS_STATE 8L /* Return Rendezvous State */
368 #define PDC_PAT_CPU_PLUNGE_FABRIC 128L /* Plunge Fabric */
369 #define PDC_PAT_CPU_UPDATE_CACHE_CLEANSING 129L /* Manipulate Cache
373 #define PDC_PAT_EVENT 68L /* Interface to Platform Events */
374 #define PDC_PAT_EVENT_GET_CAPS 0L /* Get Capabilities */
375 #define PDC_PAT_EVENT_SET_MODE 1L /* Set Notification Mode */
376 #define PDC_PAT_EVENT_SCAN 2L /* Scan Event */
377 #define PDC_PAT_EVENT_HANDLE 3L /* Handle Event */
378 #define PDC_PAT_EVENT_GET_NB_CALL 4L /* Get Non-Blocking call Args*/
381 #define PDC_PAT_HPMC 70L /* Cause processor to go into spin
382 ** loop, and wait for wake up from
383 ** Monarch Processor */
384 #define PDC_PAT_HPMC_RENDEZ_CPU 0L /* go into spin loop */
385 #define PDC_PAT_HPMC_SET_PARAMS 1L /* Allows OS to specify intr which PDC
386 * will use to interrupt OS during machine
387 * check rendezvous */
389 /* parameters for PDC_PAT_HPMC_SET_PARAMS */
390 #define HPMC_SET_PARAMS_INTR 1L /* Rendezvous Interrupt */
391 #define HPMC_SET_PARAMS_WAKE 2L /* Wake up processor */
394 #define PDC_PAT_IO 71L /* On-line services for I/O modules */
395 #define PDC_PAT_IO_GET_SLOT_STATUS 5L /* Get Slot Status Info */
396 #define PDC_PAT_IO_GET_LOC_FROM_HARDWARE 6L /* Get Physical Location from */
398 #define PDC_PAT_IO_GET_HARDWARE_FROM_LOC 7L /* Get Hardware Path from
399 * Physical Location */
400 #define PDC_PAT_IO_GET_PCI_CONFIG_FROM_HW 11L /* Get PCI Configuration
401 * Address from Hardware Path */
402 #define PDC_PAT_IO_GET_HW_FROM_PCI_CONFIG 12L /* Get Hardware Path
403 * from PCI Configuration Address */
404 #define PDC_PAT_IO_READ_HOST_BRIDGE_INFO 13L /* Read Host Bridge State Info */
405 #define PDC_PAT_IO_CLEAR_HOST_BRIDGE_INFO 14L /* Clear Host Bridge State Info*/
406 #define PDC_PAT_IO_GET_PCI_ROUTING_TABLE_SIZE 15L /* Get PCI INT Routing Table
408 #define PDC_PAT_IO_GET_PCI_ROUTING_TABLE 16L /* Get PCI INT Routing Table */
409 #define PDC_PAT_IO_GET_HINT_TABLE_SIZE 17L /* Get Hint Table Size */
410 #define PDC_PAT_IO_GET_HINT_TABLE 18L /* Get Hint Table */
411 #define PDC_PAT_IO_PCI_CONFIG_READ 19L /* PCI Config Read */
412 #define PDC_PAT_IO_PCI_CONFIG_WRITE 20L /* PCI Config Write */
413 #define PDC_PAT_IO_GET_NUM_IO_SLOTS 21L /* Get Number of I/O Bay Slots in
415 #define PDC_PAT_IO_GET_LOC_IO_SLOTS 22L /* Get Physical Location of I/O */
416 /* Bay Slots in Cabinet */
417 #define PDC_PAT_IO_BAY_STATUS_INFO 28L /* Get I/O Bay Slot Status Info */
418 #define PDC_PAT_IO_GET_PROC_VIEW 29L /* Get Processor view of IO address */
419 #define PDC_PAT_IO_PROG_SBA_DIR_RANGE 30L /* Program directed range */
422 #define PDC_PAT_MEM 72L /* Manage memory page deallocation */
423 #define PDC_PAT_MEM_PD_INFO 0L /* Return PDT info for PD */
424 #define PDC_PAT_MEM_PD_CLEAR 1L /* Clear PDT for PD */
425 #define PDC_PAT_MEM_PD_READ 2L /* Read PDT entries for PD */
426 #define PDC_PAT_MEM_PD_RESET 3L /* Reset clear bit for PD */
427 #define PDC_PAT_MEM_CELL_INFO 5L /* Return PDT info For Cell */
428 #define PDC_PAT_MEM_CELL_CLEAR 6L /* Clear PDT For Cell */
429 #define PDC_PAT_MEM_CELL_READ 7L /* Read PDT entries For Cell */
430 #define PDC_PAT_MEM_CELL_RESET 8L /* Reset clear bit For Cell */
431 #define PDC_PAT_MEM_SETGM 9L /* Set Golden Memory value */
432 #define PDC_PAT_MEM_ADD_PAGE 10L /* ADDs a page to the cell */
433 #define PDC_PAT_MEM_ADDRESS 11L /* Get Physical Location From*/
435 #define PDC_PAT_MEM_GET_TXT_SIZE 12L /* Get Formatted Text Size */
436 #define PDC_PAT_MEM_GET_PD_TXT 13L /* Get PD Formatted Text */
437 #define PDC_PAT_MEM_GET_CELL_TXT 14L /* Get Cell Formatted Text */
438 #define PDC_PAT_MEM_RD_STATE_INFO 15L /* Read Mem Module State Info*/
439 #define PDC_PAT_MEM_CLR_STATE_INFO 16L /*Clear Mem Module State Info*/
440 #define PDC_PAT_MEM_CLEAN_RANGE 128L /*Clean Mem in specific range*/
441 #define PDC_PAT_MEM_GET_TBL_SIZE 131L /* Get Memory Table Size */
442 #define PDC_PAT_MEM_GET_TBL 132L /* Get Memory Table */
444 /* PDC PAT NVOLATILE */
445 #define PDC_PAT_NVOLATILE 73L /* Access Non-Volatile Memory*/
446 #define PDC_PAT_NVOLATILE_READ 0L /* Read Non-Volatile Memory */
447 #define PDC_PAT_NVOLATILE_WRITE 1L /* Write Non-Volatile Memory */
448 #define PDC_PAT_NVOLATILE_GET_SIZE 2L /* Return size of NVM */
449 #define PDC_PAT_NVOLATILE_VERIFY 3L /* Verify contents of NVM */
450 #define PDC_PAT_NVOLATILE_INIT 4L /* Initialize NVM */
453 #define PDC_PAT_PD 74L /* Protection Domain Info */
454 #define PDC_PAT_PD_GET_ADDR_MAP 0L /* Get Address Map */
456 /* PDC_PAT_PD_GET_ADDR_MAP entry types */
457 #define PAT_MEMORY_DESCRIPTOR 1
459 /* PDC_PAT_PD_GET_ADDR_MAP memory types */
460 #define PAT_MEMTYPE_MEMORY 0
461 #define PAT_MEMTYPE_FIRMWARE 4
463 /* PDC_PAT_PD_GET_ADDR_MAP memory usage */
464 #define PAT_MEMUSE_GENERAL 0
465 #define PAT_MEMUSE_GI 128
466 #define PAT_MEMUSE_GNI 129
467 #endif /* __LP64__ */
471 #include <linux/types.h>
475 /* Values for pdc_type */
476 #define PDC_TYPE_ILLEGAL -1
477 #define PDC_TYPE_PAT 0 /* 64-bit PAT-PDC */
478 #define PDC_TYPE_SYSTEM_MAP 1 /* 32-bit, but supports PDC_SYSTEM_MAP */
479 #define PDC_TYPE_SNAKE 2 /* Doesn't support SYSTEM_MAP */
481 #ifdef CONFIG_PARISC64
482 #define is_pdc_pat() (PDC_TYPE_PAT == pdc_type)
484 #define is_pdc_pat() (0)
487 struct pdc_chassis_info { /* for PDC_CHASSIS_INFO */
488 unsigned long actcnt; /* actual number of bytes returned */
489 unsigned long maxcnt; /* maximum number of bytes that could be returned */
492 struct pdc_coproc_cfg { /* for PDC_COPROC_CFG */
493 unsigned long ccr_functional;
494 unsigned long ccr_present;
495 unsigned long revision;
499 struct pdc_model { /* for PDC_MODEL */
500 unsigned long hversion;
501 unsigned long sversion;
503 unsigned long boot_id;
505 unsigned long sw_cap;
506 unsigned long arch_rev;
507 unsigned long pot_key;
508 unsigned long curr_key;
511 /* Values for PDC_MODEL_CAPABILITES non-equivalent virtual aliasing support */
513 #define PDC_MODEL_IOPDIR_FDC (1 << 2) /* see sba_iommu.c */
514 #define PDC_MODEL_NVA_MASK (3 << 4)
515 #define PDC_MODEL_NVA_SUPPORTED (0 << 4)
516 #define PDC_MODEL_NVA_SLOW (1 << 4)
517 #define PDC_MODEL_NVA_UNSUPPORTED (3 << 4)
519 struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */
524 cc_alias:4, /* alias boundaries for virtual addresses */
525 cc_block: 4, /* to determine most efficient stride */
526 cc_line : 3, /* maximum amount written back as a result of store (multiple of 16 bytes) */
527 cc_pad0 : 2, /* reserved */
528 cc_wt : 1, /* 0 = WT-Dcache, 1 = WB-Dcache */
529 cc_sh : 2, /* 0 = separate I/D-cache, else shared I/D-cache */
530 cc_cst : 3, /* 0 = incoherent D-cache, 1=coherent D-cache */
531 cc_pad1 : 5, /* reserved */
532 cc_assoc: 8; /* associativity of I/D-cache */
535 struct pdc_tlb_cf { /* for PDC_CACHE (I/D-TLB's) */
536 unsigned long tc_pad0:12, /* reserved */
540 tc_sh : 2, /* 0 = separate I/D-TLB, else shared I/D-TLB */
542 tc_page : 1, /* 0 = 2K page-size-machine, 1 = 4k page size */
543 tc_cst : 3, /* 0 = incoherent operations, else coherent operations */
544 tc_aid : 5, /* ITLB: width of access ids of processor (encoded!) */
545 tc_pad1 : 8; /* ITLB: width of space-registers (encoded) */
548 struct pdc_cache_info { /* main-PDC_CACHE-structure (caches & TLB's) */
550 unsigned long ic_size; /* size in bytes */
551 struct pdc_cache_cf ic_conf; /* configuration */
552 unsigned long ic_base; /* base-addr */
553 unsigned long ic_stride;
554 unsigned long ic_count;
555 unsigned long ic_loop;
557 unsigned long dc_size; /* size in bytes */
558 struct pdc_cache_cf dc_conf; /* configuration */
559 unsigned long dc_base; /* base-addr */
560 unsigned long dc_stride;
561 unsigned long dc_count;
562 unsigned long dc_loop;
563 /* Instruction-TLB */
564 unsigned long it_size; /* number of entries in I-TLB */
565 struct pdc_tlb_cf it_conf; /* I-TLB-configuration */
566 unsigned long it_sp_base;
567 unsigned long it_sp_stride;
568 unsigned long it_sp_count;
569 unsigned long it_off_base;
570 unsigned long it_off_stride;
571 unsigned long it_off_count;
572 unsigned long it_loop;
574 unsigned long dt_size; /* number of entries in D-TLB */
575 struct pdc_tlb_cf dt_conf; /* D-TLB-configuration */
576 unsigned long dt_sp_base;
577 unsigned long dt_sp_stride;
578 unsigned long dt_sp_count;
579 unsigned long dt_off_base;
580 unsigned long dt_off_stride;
581 unsigned long dt_off_count;
582 unsigned long dt_loop;
586 /* If you start using the next struct, you'll have to adjust it to
587 * work with 64-bit firmware I think -PB
589 struct pdc_iodc { /* PDC_IODC */
590 unsigned char hversion_model;
591 unsigned char hversion;
594 unsigned int sversion_rev:4;
595 unsigned int sversion_model:19;
596 unsigned int sversion_opt:8;
599 unsigned char features;
601 unsigned int checksum:16;
602 unsigned int length:16;
603 unsigned int pad[15];
604 } __attribute__((aligned(8))) ;
608 /* no BLTBs in pa2.0 processors */
609 struct pdc_btlb_info_range {
616 struct pdc_btlb_info { /* PDC_BLOCK_TLB, return of PDC_BTLB_INFO */
617 unsigned int min_size; /* minimum size of BTLB in pages */
618 unsigned int max_size; /* maximum size of BTLB in pages */
619 struct pdc_btlb_info_range fixed_range_info;
620 struct pdc_btlb_info_range variable_range_info;
623 #endif /* !CONFIG_PA20 */
626 struct pdc_memory_table_raddr { /* PDC_MEM/PDC_MEM_TABLE (return info) */
627 unsigned long entries_returned;
628 unsigned long entries_total;
631 struct pdc_memory_table { /* PDC_MEM/PDC_MEM_TABLE (arguments) */
634 unsigned int reserved;
636 #endif /* __LP64__ */
638 struct pdc_system_map_mod_info { /* PDC_SYSTEM_MAP/FIND_MODULE */
639 unsigned long mod_addr;
640 unsigned long mod_pgs;
641 unsigned long add_addrs;
644 struct pdc_system_map_addr_info { /* PDC_SYSTEM_MAP/FIND_ADDRESS */
645 unsigned long mod_addr;
646 unsigned long mod_pgs;
649 struct hardware_path {
650 char flags; /* see bit definitions below */
651 char bc[6]; /* Bus Converter routing info to a specific */
652 /* I/O adaptor (< 0 means none, > 63 resvd) */
653 char mod; /* fixed field of specified module */
657 * Device path specifications used by PDC.
659 struct pdc_module_path {
660 struct hardware_path path;
661 unsigned int layers[6]; /* device-specific info (ctlr #, unit # ...) */
665 /* Only used on some pre-PA2.0 boxes */
666 struct pdc_memory_map { /* PDC_MEMORY_MAP */
667 unsigned long hpa; /* mod's register set address */
668 unsigned long more_pgs; /* number of additional I/O pgs */
673 unsigned long tod_sec;
674 unsigned long tod_usec;
678 struct pdc_pat_cell_num {
679 unsigned long cell_num;
680 unsigned long cell_loc;
683 struct pdc_pat_cpu_num {
684 unsigned long cpu_num;
685 unsigned long cpu_loc;
688 struct pdc_pat_pd_addr_map_entry {
689 unsigned char entry_type; /* 1 = Memory Descriptor Entry Type */
690 unsigned char reserve1[5];
691 unsigned char memory_type;
692 unsigned char memory_usage;
694 unsigned int pages; /* Length in 4K pages */
695 unsigned int reserve2;
696 unsigned long cell_map;
699 /* FIXME: mod[508] should really be a union of the various mod components */
700 struct pdc_pat_cell_mod_maddr_block { /* PDC_PAT_CELL_MODULE */
701 unsigned long cba; /* function 0 configuration space address */
702 unsigned long mod_info; /* module information */
703 unsigned long mod_location; /* physical location of the module */
704 struct hardware_path mod_path; /* hardware path */
705 unsigned long mod[508]; /* PAT cell module components */
708 typedef struct pdc_pat_cell_mod_maddr_block pdc_pat_cell_mod_maddr_block_t;
709 #endif /* __LP64__ */
711 /* architected results from PDC_PIM/transfer hpmc on a PA1.1 machine */
713 struct pdc_hpmc_pim_11 { /* PDC_PIM */
728 __u32 responder_addr;
729 __u32 requestor_addr;
735 * architected results from PDC_PIM/transfer hpmc on a PA2.0 machine
737 * Note that PDC_PIM doesn't care whether or not wide mode was enabled
738 * so the results are different on PA1.1 vs. PA2.0 when in narrow mode.
740 * Note also that there are unarchitected results available, which
741 * are hversion dependent. Do a "ser pim 0 hpmc" after rebooting, since
742 * the firmware is probably the best way of printing hversion dependent
746 struct pdc_hpmc_pim_20 { /* PDC_PIM */
760 __u64 responder_addr;
761 __u64 requestor_addr;
765 #endif /* __ASSEMBLY__ */
767 /* flags of the device_path (see below) */
768 #define PF_AUTOBOOT 0x80
769 #define PF_AUTOSEARCH 0x40
770 #define PF_TIMER 0x0F
774 struct device_path { /* page 1-69 */
775 unsigned char flags; /* flags see above! */
776 unsigned char bc[6]; /* bus converter routing info */
778 unsigned int layers[6];/* device-specific layer-info */
779 } __attribute__((aligned(8))) ;
782 struct device_path dp; /* see above */
783 /* struct iomod *hpa; */
784 unsigned int hpa; /* HPA base address */
786 unsigned int spa; /* SPA base address */
787 /* int (*iodc_io)(struct iomod*, ...); */
788 unsigned int iodc_io; /* device entry point */
789 short pad; /* reserved */
790 unsigned short cl_class;/* see below */
791 } __attribute__((aligned(8))) ;
793 #endif /* __ASSEMBLY__ */
796 * page 3-33 of IO-Firmware ARS
797 * IODC ENTRY_INIT(Search first) RET[1]
799 #define CL_NULL 0 /* invalid */
800 #define CL_RANDOM 1 /* random access (as disk) */
801 #define CL_SEQU 2 /* sequential access (as tape) */
802 #define CL_DUPLEX 7 /* full-duplex point-to-point (RS-232, Net) */
803 #define CL_KEYBD 8 /* half-duplex console (HIL Keyboard) */
804 #define CL_DISPL 9 /* half-duplex console (display) */
805 #define CL_FC 10 /* FiberChannel access media */
808 /* FIXME: DEVCLASS_* duplicates CL_* (above). Delete DEVCLASS_*? */
809 #define DEVCLASS_RANDOM 1
810 #define DEVCLASS_SEQU 2
811 #define DEVCLASS_DUPLEX 7
812 #define DEVCLASS_KEYBD 8
813 #define DEVCLASS_DISP 9
816 /* IODC ENTRY_INIT() */
817 #define ENTRY_INIT_SRCH_FRST 2
818 #define ENTRY_INIT_SRCH_NEXT 3
819 #define ENTRY_INIT_MOD_DEV 4
820 #define ENTRY_INIT_DEV 5
821 #define ENTRY_INIT_MOD 6
822 #define ENTRY_INIT_MSG 9
824 /* IODC ENTRY_IO() */
825 #define ENTRY_IO_BOOTIN 0
826 #define ENTRY_IO_BOOTOUT 1
827 #define ENTRY_IO_CIN 2
828 #define ENTRY_IO_COUT 3
829 #define ENTRY_IO_CLOSE 4
830 #define ENTRY_IO_GETMSG 9
831 #define ENTRY_IO_BBLOCK_IN 16
832 #define ENTRY_IO_BBLOCK_OUT 17
834 /* IODC ENTRY_SPA() */
836 /* IODC ENTRY_CONFIG() */
838 /* IODC ENTRY_TEST() */
840 /* IODC ENTRY_TLB() */
843 /* DEFINITION OF THE ZERO-PAGE (PAG0) */
844 /* based on work by Jason Eckhardt (jason@equator.com) */
848 #define PAGE0 ((struct zeropage *)__PAGE_OFFSET)
851 /* [0x000] initialize vectors (VEC) */
852 unsigned int vec_special; /* must be zero */
853 /* int (*vec_pow_fail)(void);*/
854 unsigned int vec_pow_fail; /* power failure handler */
855 /* int (*vec_toc)(void); */
856 unsigned int vec_toc;
857 unsigned int vec_toclen;
858 /* int (*vec_rendz)(void); */
859 unsigned int vec_rendz;
860 int vec_pow_fail_flen;
863 /* [0x040] reserved processor dependent */
866 /* [0x200] reserved */
869 /* [0x350] memory configuration (MC) */
870 int memc_cont; /* contiguous mem size (bytes) */
871 int memc_phsize; /* physical memory size */
872 int memc_adsize; /* additional mem size, bytes of SPA space used by PDC */
873 unsigned int mem_pdc_hi; /* used for 64-bit */
875 /* [0x360] various parameters for the boot-CPU */
876 /* unsigned int *mem_booterr[8]; */
877 unsigned int mem_booterr[8]; /* ptr to boot errors */
878 unsigned int mem_free; /* first location, where OS can be loaded */
879 /* struct iomod *mem_hpa; */
880 unsigned int mem_hpa; /* HPA of the boot-CPU */
881 /* int (*mem_pdc)(int, ...); */
882 unsigned int mem_pdc; /* PDC entry point */
883 unsigned int mem_10msec; /* number of clock ticks in 10msec */
885 /* [0x390] initial memory module (IMM) */
886 /* struct iomod *imm_hpa; */
887 unsigned int imm_hpa; /* HPA of the IMM */
888 int imm_soft_boot; /* 0 = was hard boot, 1 = was soft boot */
889 unsigned int imm_spa_size; /* SPA size of the IMM in bytes */
890 unsigned int imm_max_mem; /* bytes of mem in IMM */
892 /* [0x3A0] boot console, display device and keyboard */
893 struct pz_device mem_cons; /* description of console device */
894 struct pz_device mem_boot; /* description of boot device */
895 struct pz_device mem_kbd; /* description of keyboard device */
897 /* [0x430] reserved */
900 /* [0x600] processor dependent */
902 __u32 proc_sti; /* pointer to STI ROM */
906 #endif /* __ASSEMBLY__ */
908 /* Page Zero constant offsets used by the HPMC handler */
910 #define BOOT_CONSOLE_HPA_OFFSET 0x3c0
911 #define BOOT_CONSOLE_SPA_OFFSET 0x3c4
912 #define BOOT_CONSOLE_PATH_OFFSET 0x3a8
915 void pdc_console_init(void); /* in pdc_console.c */
916 void pdc_console_restart(void);
918 void setup_pdc(void); /* in inventory.c */
920 /* wrapper-functions from pdc.c */
922 int pdc_add_valid(unsigned long address);
923 int pdc_chassis_info(struct pdc_chassis_info *chassis_info, void *led_info, unsigned long len);
924 int pdc_chassis_disp(unsigned long disp);
925 int pdc_coproc_cfg(struct pdc_coproc_cfg *pdc_coproc_info);
926 int pdc_iodc_read(unsigned long *actcnt, unsigned long hpa, unsigned int index,
927 void *iodc_data, unsigned int iodc_data_size);
928 int pdc_system_map_find_mods(struct pdc_system_map_mod_info *pdc_mod_info,
929 struct pdc_module_path *mod_path, long mod_index);
930 int pdc_system_map_find_addrs(struct pdc_system_map_addr_info *pdc_addr_info,
931 long mod_index, long addr_index);
932 int pdc_model_info(struct pdc_model *model);
933 int pdc_model_sysmodel(char *name);
934 int pdc_model_cpuid(unsigned long *cpu_id);
935 int pdc_model_versions(unsigned long *versions, int id);
936 int pdc_model_capabilities(unsigned long *capabilities);
937 int pdc_cache_info(struct pdc_cache_info *cache);
939 int pdc_btlb_info(struct pdc_btlb_info *btlb);
940 int pdc_mem_map_hpa(struct pdc_memory_map *r_addr, struct pdc_module_path *mod_path);
941 #endif /* !CONFIG_PA20 */
942 int pdc_lan_station_id(char *lan_addr, unsigned long net_hpa);
944 int pdc_pci_irt_size(unsigned long *num_entries, unsigned long hpa);
945 int pdc_pci_irt(unsigned long num_entries, unsigned long hpa, void *tbl);
947 int pdc_get_initiator(struct hardware_path *hwpath, unsigned char *scsi_id, unsigned long *period, char *width, char *mode);
948 int pdc_tod_read(struct pdc_tod *tod);
949 int pdc_tod_set(unsigned long sec, unsigned long usec);
952 int pdc_mem_mem_table(struct pdc_memory_table_raddr *r_addr,
953 struct pdc_memory_table *tbl, unsigned long entries);
956 void set_firmware_width(void);
957 int pdc_do_firm_test_reset(unsigned long ftc_bitmap);
958 int pdc_do_reset(void);
959 int pdc_soft_power_info(unsigned long *power_reg);
960 int pdc_soft_power_button(int sw_control);
961 void pdc_io_reset(void);
962 void pdc_io_reset_devices(void);
963 int pdc_iodc_getc(void);
964 void pdc_iodc_putc(unsigned char c);
965 void pdc_iodc_outc(unsigned char c);
967 void pdc_emergency_unlock(void);
968 int pdc_sti_call(unsigned long func, unsigned long flags,
969 unsigned long inptr, unsigned long outputr,
970 unsigned long glob_cfg);
973 int pdc_pat_chassis_send_log(unsigned long status, unsigned long data);
974 int pdc_pat_cell_get_number(struct pdc_pat_cell_num *cell_info);
975 int pdc_pat_cell_module(unsigned long *actcnt, unsigned long ploc, unsigned long mod,
976 unsigned long view_type, void *mem_addr);
977 int pdc_pat_cpu_get_number(struct pdc_pat_cpu_num *cpu_info, void *hpa);
978 int pdc_pat_get_irt_size(unsigned long *num_entries, unsigned long cell_num);
979 int pdc_pat_get_irt(void *r_addr, unsigned long cell_num);
980 int pdc_pat_pd_get_addr_map(unsigned long *actual_len, void *mem_addr,
981 unsigned long count, unsigned long offset);
983 /********************************************************************
984 * PDC_PAT_CELL[Return Cell Module] memaddr[0] conf_base_addr
985 * ----------------------------------------------------------
986 * Bit 0 to 51 - conf_base_addr
987 * Bit 52 to 62 - reserved
988 * Bit 63 - endianess bit
989 ********************************************************************/
990 #define PAT_GET_CBA(value) ((value) & 0xfffffffffffff000UL)
992 /********************************************************************
993 * PDC_PAT_CELL[Return Cell Module] memaddr[1] mod_info
994 * ----------------------------------------------------
995 * Bit 0 to 7 - entity type
996 * 0 = central agent, 1 = processor,
997 * 2 = memory controller, 3 = system bus adapter,
998 * 4 = local bus adapter, 5 = processor bus converter,
999 * 6 = crossbar fabric connect, 7 = fabric interconnect,
1000 * 8 to 254 reserved, 255 = unknown.
1002 * Bit 16 to 23 - IOC functions
1003 * Bit 24 to 39 - reserved
1004 * Bit 40 to 63 - mod_pages
1005 * number of 4K pages a module occupies starting at conf_base_addr
1006 ********************************************************************/
1007 #define PAT_GET_ENTITY(value) (((value) >> 56) & 0xffUL)
1008 #define PAT_GET_DVI(value) (((value) >> 48) & 0xffUL)
1009 #define PAT_GET_IOC(value) (((value) >> 40) & 0xffUL)
1010 #define PAT_GET_MOD_PAGES(value)(((value) & 0xffffffUL)
1012 #else /* !__LP64__ */
1013 /* No PAT support for 32-bit kernels...sorry */
1014 #define pdc_pat_get_irt_size(num_entries, cell_numn) PDC_BAD_PROC
1015 #define pdc_pat_get_irt(r_addr, cell_num) PDC_BAD_PROC
1016 #endif /* !__LP64__ */
1018 extern void pdc_init(void);
1020 #endif /* __ASSEMBLY__ */
1022 #endif /* _PARISC_PDC_H */