4 /*============================================================================
6 * Name______________: paca.h
10 * This control block defines the PACA which defines the processor
11 * specific data for each logical processor on the system.
12 * There are some pointers defined that are utilized by PLIC.
14 * C 2001 PPC 64 Team, IBM Corp
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License
18 * as published by the Free Software Foundation; either version
19 * 2 of the License, or (at your option) any later version.
21 #include <asm/types.h>
25 /*-----------------------------------------------------------------------------
27 *-----------------------------------------------------------------------------
29 #include <asm/iSeries/ItLpPaca.h>
30 #include <asm/iSeries/ItLpRegSave.h>
31 #include <asm/iSeries/ItLpQueue.h>
34 #include <asm/processor.h>
36 extern struct paca_struct paca[];
37 register struct paca_struct *local_paca asm("r13");
38 #define get_paca() local_paca
40 /*============================================================================
45 * Defines the layout of the paca.
47 * This structure is not directly accessed by PLIC or the SP except
48 * for the first two pointers that point to the ItLpPaca area and the
49 * ItLpRegSave area for this processor. Both the ItLpPaca and
50 * ItLpRegSave objects are currently contained within the
51 * PACA but they do not need to be.
53 *============================================================================
56 /*=====================================================================================
57 * CACHE_LINE_1 0x0000 - 0x007F
58 *=====================================================================================
60 struct ItLpPaca *xLpPacaPtr; /* Pointer to LpPaca for PLIC 0x00 */
61 struct ItLpRegSave *xLpRegSavePtr; /* Pointer to LpRegSave for PLIC 0x08 */
62 u64 xCurrent; /* Pointer to current 0x10 */
63 u16 xPacaIndex; /* Logical processor number 0x18 */
64 u16 xHwProcNum; /* Physical processor number 0x1A */
65 u32 default_decr; /* Default decrementer value 0x1c */
66 u64 xKsave; /* Saved Kernel stack addr or zero 0x20 */
67 struct ItLpQueue *lpQueuePtr; /* LpQueue handled by this processor 0x28 */
68 u64 xTOC; /* Kernel TOC address 0x30 */
69 STAB xStab_data; /* Segment table information 0x38,0x40,0x48 */
70 u8 *exception_sp; /* 0x50 */
71 u8 xProcEnabled; /* 0x58 */
72 u8 prof_enabled; /* 1=iSeries profiling enabled 0x59 */
73 u8 resv1[38]; /* 0x5a-0x7f*/
75 /*=====================================================================================
76 * CACHE_LINE_2 0x0080 - 0x00FF
77 *=====================================================================================
79 u64 spare1; /* 0x00 */
80 u64 spare2; /* 0x08 */
81 u64 spare3; /* 0x10 */
82 u64 spare4; /* 0x18 */
83 u64 next_jiffy_update_tb; /* TB value for next jiffy update 0x20 */
84 u32 lpEvent_count; /* lpEvents processed 0x28 */
85 u32 prof_multiplier; /* 0x2C */
86 u32 prof_counter; /* 0x30 */
87 u32 prof_shift; /* iSeries shift for profile bucket size0x34 */
88 u32 *prof_buffer; /* iSeries profiling buffer 0x38 */
89 u32 *prof_stext; /* iSeries start of kernel text 0x40 */
90 u32 prof_len; /* iSeries length of profile buffer -1 0x48 */
91 u8 yielded; /* 0 = this processor is running 0x4c */
92 /* 1 = this processor is yielded */
93 u8 rsvd2[128-77]; /* 0x49 */
95 /*=====================================================================================
96 * CACHE_LINE_3 0x0100 - 0x017F
97 *=====================================================================================
99 u8 xProcStart; /* At startup, processor spins until 0x100 */
100 /* xProcStart becomes non-zero. */
103 /*=====================================================================================
104 * CACHE_LINE_4-8 0x0180 - 0x03FF Contains ItLpPaca
105 *=====================================================================================
107 struct ItLpPaca xLpPaca; /* Space for ItLpPaca */
109 /*=====================================================================================
110 * CACHE_LINE_9-16 0x0400 - 0x07FF Contains ItLpRegSave
111 *=====================================================================================
113 struct ItLpRegSave xRegSav; /* Register save for proc */
115 /*=====================================================================================
116 * CACHE_LINE_17-18 0x0800 - 0x08FF Reserved
117 *=====================================================================================
119 struct rtas_args xRtas; /* Per processor RTAS struct */
120 u64 xR1; /* r1 save for RTAS calls */
121 u64 xSavedMsr; /* Old msr saved here by HvCall */
122 u8 rsvd5[256-16-sizeof(struct rtas_args)];
124 /*=====================================================================================
125 * CACHE_LINE_19-30 0x0900 - 0x0EFF Reserved
126 *=====================================================================================
128 u64 slb_shadow[0x20];
130 u8 rsvd6[0x500 - 0x8];
132 /*=====================================================================================
133 * CACHE_LINE_31 0x0F00 - 0x0F7F Exception stack
134 *=====================================================================================
136 u8 exception_stack[N_EXC_STACK*EXC_FRAME_SIZE];
138 /*=====================================================================================
139 * CACHE_LINE_32 0x0F80 - 0x0FFF Reserved
140 *=====================================================================================
142 u8 rsvd7[0x80]; /* Give the stack some rope ... */
144 /*=====================================================================================
145 * Page 2 Reserved for guard page. Also used as a stack early in SMP boots before
146 * relocation is enabled.
147 *=====================================================================================
149 u8 guard[0x1000]; /* ... and then hang 'em */
152 #endif /* _PPC64_PACA_H */