5 * include/asm-s390/bitops.h
8 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
9 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
11 * Derived from "include/asm-i386/bitops.h"
12 * Copyright (C) 1992, Linus Torvalds
15 #include <linux/config.h>
16 #include <linux/compiler.h>
19 * 32 bit bitops format:
20 * bit 0 is the LSB of *addr; bit 31 is the MSB of *addr;
21 * bit 32 is the LSB of *(addr+4). That combined with the
22 * big endian byte order on S390 give the following bit
24 * 1f 1e 1d 1c 1b 1a 19 18 17 16 15 14 13 12 11 10 \
25 * 0f 0e 0d 0c 0b 0a 09 08 07 06 05 04 03 02 01 00
26 * after that follows the next long with bit numbers
27 * 3f 3e 3d 3c 3b 3a 39 38 37 36 35 34 33 32 31 30
28 * 2f 2e 2d 2c 2b 2a 29 28 27 26 25 24 23 22 21 20
29 * The reason for this bit ordering is the fact that
30 * in the architecture independent code bits operations
31 * of the form "flags |= (1 << bitnr)" are used INTERMIXED
32 * with operation of the form "set_bit(bitnr, flags)".
34 * 64 bit bitops format:
35 * bit 0 is the LSB of *addr; bit 63 is the MSB of *addr;
36 * bit 64 is the LSB of *(addr+8). That combined with the
37 * big endian byte order on S390 give the following bit
39 * 3f 3e 3d 3c 3b 3a 39 38 37 36 35 34 33 32 31 30
40 * 2f 2e 2d 2c 2b 2a 29 28 27 26 25 24 23 22 21 20
41 * 1f 1e 1d 1c 1b 1a 19 18 17 16 15 14 13 12 11 10
42 * 0f 0e 0d 0c 0b 0a 09 08 07 06 05 04 03 02 01 00
43 * after that follows the next long with bit numbers
44 * 7f 7e 7d 7c 7b 7a 79 78 77 76 75 74 73 72 71 70
45 * 6f 6e 6d 6c 6b 6a 69 68 67 66 65 64 63 62 61 60
46 * 5f 5e 5d 5c 5b 5a 59 58 57 56 55 54 53 52 51 50
47 * 4f 4e 4d 4c 4b 4a 49 48 47 46 45 44 43 42 41 40
48 * The reason for this bit ordering is the fact that
49 * in the architecture independent code bits operations
50 * of the form "flags |= (1 << bitnr)" are used INTERMIXED
51 * with operation of the form "set_bit(bitnr, flags)".
54 /* set ALIGN_CS to 1 if the SMP safe bit operations should
55 * align the address to 4 byte boundary. It seems to work
56 * without the alignment.
63 #error "bitops won't work without CONFIG_SMP"
67 /* bitmap tables from arch/S390/kernel/bitmap.S */
68 extern const char _oi_bitmap[];
69 extern const char _ni_bitmap[];
70 extern const char _zb_findmap[];
71 extern const char _sb_findmap[];
75 #define __BITOPS_ALIGN 3
76 #define __BITOPS_WORDSIZE 32
77 #define __BITOPS_OR "or"
78 #define __BITOPS_AND "nr"
79 #define __BITOPS_XOR "xr"
81 #define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \
82 __asm__ __volatile__(" l %0,0(%4)\n" \
84 __op_string " %1,%3\n" \
87 : "=&d" (__old), "=&d" (__new), \
88 "=m" (*(unsigned long *) __addr) \
89 : "d" (__val), "a" (__addr), \
90 "m" (*(unsigned long *) __addr) : "cc" );
94 #define __BITOPS_ALIGN 7
95 #define __BITOPS_WORDSIZE 64
96 #define __BITOPS_OR "ogr"
97 #define __BITOPS_AND "ngr"
98 #define __BITOPS_XOR "xgr"
100 #define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \
101 __asm__ __volatile__(" lg %0,0(%4)\n" \
103 __op_string " %1,%3\n" \
104 " csg %0,%1,0(%4)\n" \
106 : "=&d" (__old), "=&d" (__new), \
107 "=m" (*(unsigned long *) __addr) \
108 : "d" (__val), "a" (__addr), \
109 "m" (*(unsigned long *) __addr) : "cc" );
111 #endif /* __s390x__ */
113 #define __BITOPS_BARRIER() __asm__ __volatile__ ( "" : : : "memory" )
117 * SMP safe set_bit routine based on compare and swap (CS)
119 static inline void set_bit_cs(unsigned long nr, volatile unsigned long *ptr)
121 unsigned long addr, old, new, mask;
123 addr = (unsigned long) ptr;
125 nr += (addr & __BITOPS_ALIGN) << 3; /* add alignment to bit number */
126 addr ^= addr & __BITOPS_ALIGN; /* align address to 8 */
128 /* calculate address for CS */
129 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
131 mask = 1UL << (nr & (__BITOPS_WORDSIZE - 1));
132 /* Do the atomic update. */
133 __BITOPS_LOOP(old, new, addr, mask, __BITOPS_OR);
137 * SMP safe clear_bit routine based on compare and swap (CS)
139 static inline void clear_bit_cs(unsigned long nr, volatile unsigned long *ptr)
141 unsigned long addr, old, new, mask;
143 addr = (unsigned long) ptr;
145 nr += (addr & __BITOPS_ALIGN) << 3; /* add alignment to bit number */
146 addr ^= addr & __BITOPS_ALIGN; /* align address to 8 */
148 /* calculate address for CS */
149 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
151 mask = ~(1UL << (nr & (__BITOPS_WORDSIZE - 1)));
152 /* Do the atomic update. */
153 __BITOPS_LOOP(old, new, addr, mask, __BITOPS_AND);
157 * SMP safe change_bit routine based on compare and swap (CS)
159 static inline void change_bit_cs(unsigned long nr, volatile unsigned long *ptr)
161 unsigned long addr, old, new, mask;
163 addr = (unsigned long) ptr;
165 nr += (addr & __BITOPS_ALIGN) << 3; /* add alignment to bit number */
166 addr ^= addr & __BITOPS_ALIGN; /* align address to 8 */
168 /* calculate address for CS */
169 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
171 mask = 1UL << (nr & (__BITOPS_WORDSIZE - 1));
172 /* Do the atomic update. */
173 __BITOPS_LOOP(old, new, addr, mask, __BITOPS_XOR);
177 * SMP safe test_and_set_bit routine based on compare and swap (CS)
180 test_and_set_bit_cs(unsigned long nr, volatile unsigned long *ptr)
182 unsigned long addr, old, new, mask;
184 addr = (unsigned long) ptr;
186 nr += (addr & __BITOPS_ALIGN) << 3; /* add alignment to bit number */
187 addr ^= addr & __BITOPS_ALIGN; /* align address to 8 */
189 /* calculate address for CS */
190 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
191 /* make OR/test mask */
192 mask = 1UL << (nr & (__BITOPS_WORDSIZE - 1));
193 /* Do the atomic update. */
194 __BITOPS_LOOP(old, new, addr, mask, __BITOPS_OR);
196 return (old & mask) != 0;
200 * SMP safe test_and_clear_bit routine based on compare and swap (CS)
203 test_and_clear_bit_cs(unsigned long nr, volatile unsigned long *ptr)
205 unsigned long addr, old, new, mask;
207 addr = (unsigned long) ptr;
209 nr += (addr & __BITOPS_ALIGN) << 3; /* add alignment to bit number */
210 addr ^= addr & __BITOPS_ALIGN; /* align address to 8 */
212 /* calculate address for CS */
213 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
214 /* make AND/test mask */
215 mask = ~(1UL << (nr & (__BITOPS_WORDSIZE - 1)));
216 /* Do the atomic update. */
217 __BITOPS_LOOP(old, new, addr, mask, __BITOPS_AND);
219 return (old ^ new) != 0;
223 * SMP safe test_and_change_bit routine based on compare and swap (CS)
226 test_and_change_bit_cs(unsigned long nr, volatile unsigned long *ptr)
228 unsigned long addr, old, new, mask;
230 addr = (unsigned long) ptr;
232 nr += (addr & __BITOPS_ALIGN) << 3; /* add alignment to bit number */
233 addr ^= addr & __BITOPS_ALIGN; /* align address to 8 */
235 /* calculate address for CS */
236 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
237 /* make XOR/test mask */
238 mask = 1UL << (nr & (__BITOPS_WORDSIZE - 1));
239 /* Do the atomic update. */
240 __BITOPS_LOOP(old, new, addr, mask, __BITOPS_XOR);
242 return (old & mask) != 0;
244 #endif /* CONFIG_SMP */
247 * fast, non-SMP set_bit routine
249 static inline void __set_bit(unsigned long nr, volatile unsigned long *ptr)
253 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
254 asm volatile("oc 0(1,%1),0(%2)"
255 : "=m" (*(char *) addr)
256 : "a" (addr), "a" (_oi_bitmap + (nr & 7)),
257 "m" (*(char *) addr) : "cc" );
261 __constant_set_bit(const unsigned long nr, volatile unsigned long *ptr)
265 addr = ((unsigned long) ptr) + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
268 asm volatile ("oi 0(%1),0x01" : "=m" (*(char *) addr)
269 : "a" (addr), "m" (*(char *) addr) : "cc" );
272 asm volatile ("oi 0(%1),0x02" : "=m" (*(char *) addr)
273 : "a" (addr), "m" (*(char *) addr) : "cc" );
276 asm volatile ("oi 0(%1),0x04" : "=m" (*(char *) addr)
277 : "a" (addr), "m" (*(char *) addr) : "cc" );
280 asm volatile ("oi 0(%1),0x08" : "=m" (*(char *) addr)
281 : "a" (addr), "m" (*(char *) addr) : "cc" );
284 asm volatile ("oi 0(%1),0x10" : "=m" (*(char *) addr)
285 : "a" (addr), "m" (*(char *) addr) : "cc" );
288 asm volatile ("oi 0(%1),0x20" : "=m" (*(char *) addr)
289 : "a" (addr), "m" (*(char *) addr) : "cc" );
292 asm volatile ("oi 0(%1),0x40" : "=m" (*(char *) addr)
293 : "a" (addr), "m" (*(char *) addr) : "cc" );
296 asm volatile ("oi 0(%1),0x80" : "=m" (*(char *) addr)
297 : "a" (addr), "m" (*(char *) addr) : "cc" );
302 #define set_bit_simple(nr,addr) \
303 (__builtin_constant_p((nr)) ? \
304 __constant_set_bit((nr),(addr)) : \
305 __set_bit((nr),(addr)) )
308 * fast, non-SMP clear_bit routine
311 __clear_bit(unsigned long nr, volatile unsigned long *ptr)
315 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
316 asm volatile("nc 0(1,%1),0(%2)"
317 : "=m" (*(char *) addr)
318 : "a" (addr), "a" (_ni_bitmap + (nr & 7)),
319 "m" (*(char *) addr) : "cc" );
323 __constant_clear_bit(const unsigned long nr, volatile unsigned long *ptr)
327 addr = ((unsigned long) ptr) + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
330 asm volatile ("ni 0(%1),0xFE" : "=m" (*(char *) addr)
331 : "a" (addr), "m" (*(char *) addr) : "cc" );
334 asm volatile ("ni 0(%1),0xFD": "=m" (*(char *) addr)
335 : "a" (addr), "m" (*(char *) addr) : "cc" );
338 asm volatile ("ni 0(%1),0xFB" : "=m" (*(char *) addr)
339 : "a" (addr), "m" (*(char *) addr) : "cc" );
342 asm volatile ("ni 0(%1),0xF7" : "=m" (*(char *) addr)
343 : "a" (addr), "m" (*(char *) addr) : "cc" );
346 asm volatile ("ni 0(%1),0xEF" : "=m" (*(char *) addr)
347 : "a" (addr), "m" (*(char *) addr) : "cc" );
350 asm volatile ("ni 0(%1),0xDF" : "=m" (*(char *) addr)
351 : "a" (addr), "m" (*(char *) addr) : "cc" );
354 asm volatile ("ni 0(%1),0xBF" : "=m" (*(char *) addr)
355 : "a" (addr), "m" (*(char *) addr) : "cc" );
358 asm volatile ("ni 0(%1),0x7F" : "=m" (*(char *) addr)
359 : "a" (addr), "m" (*(char *) addr) : "cc" );
364 #define clear_bit_simple(nr,addr) \
365 (__builtin_constant_p((nr)) ? \
366 __constant_clear_bit((nr),(addr)) : \
367 __clear_bit((nr),(addr)) )
370 * fast, non-SMP change_bit routine
372 static inline void __change_bit(unsigned long nr, volatile unsigned long *ptr)
376 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
377 asm volatile("xc 0(1,%1),0(%2)"
378 : "=m" (*(char *) addr)
379 : "a" (addr), "a" (_oi_bitmap + (nr & 7)),
380 "m" (*(char *) addr) : "cc" );
384 __constant_change_bit(const unsigned long nr, volatile unsigned long *ptr)
388 addr = ((unsigned long) ptr) + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
391 asm volatile ("xi 0(%1),0x01" : "=m" (*(char *) addr)
392 : "a" (addr), "m" (*(char *) addr) : "cc" );
395 asm volatile ("xi 0(%1),0x02" : "=m" (*(char *) addr)
396 : "a" (addr), "m" (*(char *) addr) : "cc" );
399 asm volatile ("xi 0(%1),0x04" : "=m" (*(char *) addr)
400 : "a" (addr), "m" (*(char *) addr) : "cc" );
403 asm volatile ("xi 0(%1),0x08" : "=m" (*(char *) addr)
404 : "a" (addr), "m" (*(char *) addr) : "cc" );
407 asm volatile ("xi 0(%1),0x10" : "=m" (*(char *) addr)
408 : "a" (addr), "m" (*(char *) addr) : "cc" );
411 asm volatile ("xi 0(%1),0x20" : "=m" (*(char *) addr)
412 : "a" (addr), "m" (*(char *) addr) : "cc" );
415 asm volatile ("xi 0(%1),0x40" : "=m" (*(char *) addr)
416 : "a" (addr), "m" (*(char *) addr) : "cc" );
419 asm volatile ("xi 0(%1),0x80" : "=m" (*(char *) addr)
420 : "a" (addr), "m" (*(char *) addr) : "cc" );
425 #define change_bit_simple(nr,addr) \
426 (__builtin_constant_p((nr)) ? \
427 __constant_change_bit((nr),(addr)) : \
428 __change_bit((nr),(addr)) )
431 * fast, non-SMP test_and_set_bit routine
434 test_and_set_bit_simple(unsigned long nr, volatile unsigned long *ptr)
439 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
440 ch = *(unsigned char *) addr;
441 asm volatile("oc 0(1,%1),0(%2)"
442 : "=m" (*(char *) addr)
443 : "a" (addr), "a" (_oi_bitmap + (nr & 7)),
444 "m" (*(char *) addr) : "cc", "memory" );
445 return (ch >> (nr & 7)) & 1;
447 #define __test_and_set_bit(X,Y) test_and_set_bit_simple(X,Y)
450 * fast, non-SMP test_and_clear_bit routine
453 test_and_clear_bit_simple(unsigned long nr, volatile unsigned long *ptr)
458 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
459 ch = *(unsigned char *) addr;
460 asm volatile("nc 0(1,%1),0(%2)"
461 : "=m" (*(char *) addr)
462 : "a" (addr), "a" (_ni_bitmap + (nr & 7)),
463 "m" (*(char *) addr) : "cc", "memory" );
464 return (ch >> (nr & 7)) & 1;
466 #define __test_and_clear_bit(X,Y) test_and_clear_bit_simple(X,Y)
469 * fast, non-SMP test_and_change_bit routine
472 test_and_change_bit_simple(unsigned long nr, volatile unsigned long *ptr)
477 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
478 ch = *(unsigned char *) addr;
479 asm volatile("xc 0(1,%1),0(%2)"
480 : "=m" (*(char *) addr)
481 : "a" (addr), "a" (_oi_bitmap + (nr & 7)),
482 "m" (*(char *) addr) : "cc", "memory" );
483 return (ch >> (nr & 7)) & 1;
485 #define __test_and_change_bit(X,Y) test_and_change_bit_simple(X,Y)
488 #define set_bit set_bit_cs
489 #define clear_bit clear_bit_cs
490 #define change_bit change_bit_cs
491 #define test_and_set_bit test_and_set_bit_cs
492 #define test_and_clear_bit test_and_clear_bit_cs
493 #define test_and_change_bit test_and_change_bit_cs
495 #define set_bit set_bit_simple
496 #define clear_bit clear_bit_simple
497 #define change_bit change_bit_simple
498 #define test_and_set_bit test_and_set_bit_simple
499 #define test_and_clear_bit test_and_clear_bit_simple
500 #define test_and_change_bit test_and_change_bit_simple
505 * This routine doesn't need to be atomic.
508 static inline int __test_bit(unsigned long nr, const volatile unsigned long *ptr)
513 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
514 ch = *(volatile unsigned char *) addr;
515 return (ch >> (nr & 7)) & 1;
519 __constant_test_bit(unsigned long nr, const volatile unsigned long *addr) {
520 return (((volatile char *) addr)
521 [(nr^(__BITOPS_WORDSIZE-8))>>3] & (1<<(nr&7)));
524 #define test_bit(nr,addr) \
525 (__builtin_constant_p((nr)) ? \
526 __constant_test_bit((nr),(addr)) : \
527 __test_bit((nr),(addr)) )
532 * Find-bit routines..
535 find_first_zero_bit(const unsigned long * addr, unsigned int size)
537 unsigned long cmp, count;
542 __asm__(" lhi %1,-1\n"
568 : "=&a" (res), "=&d" (cmp), "=&a" (count)
569 : "a" (size), "a" (addr), "a" (&_zb_findmap) : "cc" );
570 return (res < size) ? res : size;
574 find_first_bit(const unsigned long * addr, unsigned int size)
576 unsigned long cmp, count;
581 __asm__(" slr %1,%1\n"
607 : "=&a" (res), "=&d" (cmp), "=&a" (count)
608 : "a" (size), "a" (addr), "a" (&_sb_findmap) : "cc" );
609 return (res < size) ? res : size;
613 find_next_zero_bit (const unsigned long * addr, int size, int offset)
615 unsigned long * p = ((unsigned long *) addr) + (offset >> 5);
616 unsigned long bitvec, reg;
617 int set, bit = offset & 31, res;
621 * Look for zero in first word
623 bitvec = (*p) >> bit;
624 __asm__(" slr %0,%0\n"
637 : "=&d" (set), "+a" (bitvec), "=&d" (reg)
638 : "a" (&_zb_findmap) : "cc" );
639 if (set < (32 - bit))
645 * No zero yet, search remaining full words for a zero
647 res = find_first_zero_bit (p, size - 32 * (p - (unsigned long *) addr));
648 return (offset + res);
652 find_next_bit (const unsigned long * addr, int size, int offset)
654 unsigned long * p = ((unsigned long *) addr) + (offset >> 5);
655 unsigned long bitvec, reg;
656 int set, bit = offset & 31, res;
660 * Look for set bit in first word
662 bitvec = (*p) >> bit;
663 __asm__(" slr %0,%0\n"
676 : "=&d" (set), "+a" (bitvec), "=&d" (reg)
677 : "a" (&_sb_findmap) : "cc" );
678 if (set < (32 - bit))
684 * No set bit yet, search remaining full words for a bit
686 res = find_first_bit (p, size - 32 * (p - (unsigned long *) addr));
687 return (offset + res);
690 #else /* __s390x__ */
693 * Find-bit routines..
695 static inline unsigned long
696 find_first_zero_bit(const unsigned long * addr, unsigned long size)
698 unsigned long res, cmp, count;
702 __asm__(" lghi %1,-1\n"
707 "0: cg %1,0(%0,%4)\n"
713 "1: lg %2,0(%0,%4)\n"
724 "3: tmll %2,0x00ff\n"
732 : "=&a" (res), "=&d" (cmp), "=&a" (count)
733 : "a" (size), "a" (addr), "a" (&_zb_findmap) : "cc" );
734 return (res < size) ? res : size;
737 static inline unsigned long
738 find_first_bit(const unsigned long * addr, unsigned long size)
740 unsigned long res, cmp, count;
744 __asm__(" slgr %1,%1\n"
749 "0: cg %1,0(%0,%4)\n"
755 "1: lg %2,0(%0,%4)\n"
766 "3: tmll %2,0x00ff\n"
774 : "=&a" (res), "=&d" (cmp), "=&a" (count)
775 : "a" (size), "a" (addr), "a" (&_sb_findmap) : "cc" );
776 return (res < size) ? res : size;
779 static inline unsigned long
780 find_next_zero_bit (const unsigned long * addr, unsigned long size, unsigned long offset)
782 unsigned long * p = ((unsigned long *) addr) + (offset >> 6);
783 unsigned long bitvec, reg;
784 unsigned long set, bit = offset & 63, res;
788 * Look for zero in first word
790 bitvec = (*p) >> bit;
791 __asm__(" lhi %2,-1\n"
802 "1: tmll %1,0x00ff\n"
809 : "=&d" (set), "+a" (bitvec), "=&d" (reg)
810 : "a" (&_zb_findmap) : "cc" );
811 if (set < (64 - bit))
817 * No zero yet, search remaining full words for a zero
819 res = find_first_zero_bit (p, size - 64 * (p - (unsigned long *) addr));
820 return (offset + res);
823 static inline unsigned long
824 find_next_bit (const unsigned long * addr, unsigned long size, unsigned long offset)
826 unsigned long * p = ((unsigned long *) addr) + (offset >> 6);
827 unsigned long bitvec, reg;
828 unsigned long set, bit = offset & 63, res;
832 * Look for zero in first word
834 bitvec = (*p) >> bit;
835 __asm__(" slgr %0,%0\n"
845 "1: tmll %1,0x00ff\n"
852 : "=&d" (set), "+a" (bitvec), "=&d" (reg)
853 : "a" (&_sb_findmap) : "cc" );
854 if (set < (64 - bit))
860 * No set bit yet, search remaining full words for a bit
862 res = find_first_bit (p, size - 64 * (p - (unsigned long *) addr));
863 return (offset + res);
866 #endif /* __s390x__ */
869 * ffz = Find First Zero in word. Undefined if no zero exists,
870 * so code should check against ~0UL first..
872 static inline unsigned long ffz(unsigned long word)
874 unsigned long bit = 0;
877 if (likely((word & 0xffffffff) == 0xffffffff)) {
882 if (likely((word & 0xffff) == 0xffff)) {
886 if (likely((word & 0xff) == 0xff)) {
890 return bit + _zb_findmap[word & 0xff];
894 * __ffs = find first bit in word. Undefined if no bit exists,
895 * so code should check against 0UL first..
897 static inline unsigned long __ffs (unsigned long word)
899 unsigned long bit = 0;
902 if (likely((word & 0xffffffff) == 0)) {
907 if (likely((word & 0xffff) == 0)) {
911 if (likely((word & 0xff) == 0)) {
915 return bit + _sb_findmap[word & 0xff];
919 * Every architecture must define this function. It's the fastest
920 * way of searching a 140-bit bitmap where the first 100 bits are
921 * unlikely to be set. It's guaranteed that at least one of the 140
924 static inline int sched_find_first_bit(unsigned long *b)
926 return find_first_bit(b, 140);
930 * ffs: find first bit set. This is defined the same way as
931 * the libc and compiler builtin ffs routines, therefore
932 * differs in spirit from the above ffz (man ffs).
934 #define ffs(x) generic_ffs(x)
937 * fls: find last bit set.
939 #define fls(x) generic_fls(x)
942 * hweightN: returns the hamming weight (i.e. the number
943 * of bits set) of a N-bit word
945 #define hweight64(x) \
947 unsigned long __x = (x); \
949 __w = generic_hweight32((unsigned int) __x); \
950 __w += generic_hweight32((unsigned int) (__x>>32)); \
953 #define hweight32(x) generic_hweight32(x)
954 #define hweight16(x) generic_hweight16(x)
955 #define hweight8(x) generic_hweight8(x)
961 * ATTENTION: intel byte ordering convention for ext2 and minix !!
962 * bit 0 is the LSB of addr; bit 31 is the MSB of addr;
963 * bit 32 is the LSB of (addr+4).
964 * That combined with the little endian byte order of Intel gives the
965 * following bit order in memory:
966 * 07 06 05 04 03 02 01 00 15 14 13 12 11 10 09 08 \
967 * 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
970 #define ext2_set_bit(nr, addr) \
971 test_and_set_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
972 #define ext2_set_bit_atomic(lock, nr, addr) \
973 test_and_set_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
974 #define ext2_clear_bit(nr, addr) \
975 test_and_clear_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
976 #define ext2_clear_bit_atomic(lock, nr, addr) \
977 test_and_clear_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
978 #define ext2_test_bit(nr, addr) \
979 test_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
984 ext2_find_first_zero_bit(void *vaddr, unsigned int size)
986 unsigned long cmp, count;
991 __asm__(" lhi %1,-1\n"
996 "0: cl %1,0(%0,%4)\n"
1002 "1: l %2,0(%0,%4)\n"
1010 "2: tml %2,0xff00\n"
1018 : "=&a" (res), "=&d" (cmp), "=&a" (count)
1019 : "a" (size), "a" (vaddr), "a" (&_zb_findmap) : "cc" );
1020 return (res < size) ? res : size;
1024 ext2_find_next_zero_bit(void *vaddr, unsigned int size, unsigned offset)
1026 unsigned long *addr = vaddr;
1027 unsigned long *p = addr + (offset >> 5);
1028 unsigned long word, reg;
1029 unsigned int bit = offset & 31UL, res;
1035 __asm__(" ic %0,0(%1)\n"
1039 : "=&a" (word) : "a" (p) : "cc" );
1042 /* Look for zero in first longword */
1043 __asm__(" lhi %2,0xff\n"
1048 "0: tml %1,0x00ff\n"
1055 : "+&d" (res), "+&a" (word), "=&d" (reg)
1056 : "a" (&_zb_findmap) : "cc" );
1058 return (p - addr)*32 + res;
1061 /* No zero yet, search remaining full bytes for a zero */
1062 res = ext2_find_first_zero_bit (p, size - 32 * (p - addr));
1063 return (p - addr) * 32 + res;
1066 #else /* __s390x__ */
1068 static inline unsigned long
1069 ext2_find_first_zero_bit(void *vaddr, unsigned long size)
1071 unsigned long res, cmp, count;
1075 __asm__(" lghi %1,-1\n"
1080 "0: clg %1,0(%0,%4)\n"
1086 "1: cl %1,0(%0,%4)\n"
1089 "2: l %2,0(%0,%4)\n"
1097 "3: tmll %2,0xff00\n"
1105 : "=&a" (res), "=&d" (cmp), "=&a" (count)
1106 : "a" (size), "a" (vaddr), "a" (&_zb_findmap) : "cc" );
1107 return (res < size) ? res : size;
1110 static inline unsigned long
1111 ext2_find_next_zero_bit(void *vaddr, unsigned long size, unsigned long offset)
1113 unsigned long *addr = vaddr;
1114 unsigned long *p = addr + (offset >> 6);
1115 unsigned long word, reg;
1116 unsigned long bit = offset & 63UL, res;
1122 __asm__(" lrvg %0,%1" /* load reversed, neat instruction */
1123 : "=a" (word) : "m" (*p) );
1126 /* Look for zero in first 8 byte word */
1127 __asm__(" lghi %2,0xff\n"
1132 "0: tmll %1,0xffff\n"
1136 "1: tmll %1,0xffff\n"
1140 "2: tmll %1,0x00ff\n"
1147 : "+&d" (res), "+a" (word), "=&d" (reg)
1148 : "a" (&_zb_findmap) : "cc" );
1150 return (p - addr)*64 + res;
1153 /* No zero yet, search remaining full bytes for a zero */
1154 res = ext2_find_first_zero_bit (p, size - 64 * (p - addr));
1155 return (p - addr) * 64 + res;
1158 #endif /* __s390x__ */
1160 /* Bitmap functions for the minix filesystem. */
1162 #define minix_test_and_set_bit(nr,addr) \
1163 test_and_set_bit(nr,(unsigned long *)addr)
1164 #define minix_set_bit(nr,addr) \
1165 set_bit(nr,(unsigned long *)addr)
1166 #define minix_test_and_clear_bit(nr,addr) \
1167 test_and_clear_bit(nr,(unsigned long *)addr)
1168 #define minix_test_bit(nr,addr) \
1169 test_bit(nr,(unsigned long *)addr)
1170 #define minix_find_first_zero_bit(addr,size) \
1171 find_first_zero_bit(addr,size)
1173 #endif /* __KERNEL__ */
1175 #endif /* _S390_BITOPS_H */