1 /* $Id: ide.h,v 1.21 2001/09/25 20:21:48 kanoj Exp $
2 * ide.h: Ultra/PCI specific IDE glue.
4 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
13 #include <linux/config.h>
14 #include <asm/pgalloc.h>
17 #include <asm/spitfire.h>
20 # ifdef CONFIG_BLK_DEV_IDEPCI
27 #define IDE_ARCH_OBSOLETE_INIT
28 #define ide_default_io_ctl(base) ((base) + 0x206) /* obsolete */
30 #define __ide_insl(data_reg, buffer, wcount) \
31 __ide_insw(data_reg, buffer, (wcount)<<1)
32 #define __ide_outsl(data_reg, buffer, wcount) \
33 __ide_outsw(data_reg, buffer, (wcount)<<1)
35 /* On sparc64, I/O ports and MMIO registers are accessed identically. */
36 #define __ide_mm_insw __ide_insw
37 #define __ide_mm_insl __ide_insl
38 #define __ide_mm_outsw __ide_outsw
39 #define __ide_mm_outsl __ide_outsl
41 static __inline__ unsigned int inw_be(unsigned long addr)
45 __asm__ __volatile__("lduha [%1] %2, %0"
47 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
52 static __inline__ void __ide_insw(unsigned long port,
56 #if (L1DCACHE_SIZE > PAGE_SIZE) /* is there D$ aliasing problem */
57 unsigned long end = (unsigned long)dst + (count << 1);
70 w = inw_be(port) << 16;
79 #if (L1DCACHE_SIZE > PAGE_SIZE) /* is there D$ aliasing problem */
80 __flush_dcache_range((unsigned long)dst, end);
84 static __inline__ void outw_be(unsigned short w, unsigned long addr)
86 __asm__ __volatile__("stha %0, [%1] %2"
88 : "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
91 static __inline__ void __ide_outsw(unsigned long port,
95 #if (L1DCACHE_SIZE > PAGE_SIZE) /* is there D$ aliasing problem */
96 unsigned long end = (unsigned long)src + (count << 1);
101 if(((u64)src) & 0x2) {
102 outw_be(*ps++, port);
105 pi = (const u32 *)ps;
110 outw_be((w >> 16), port);
114 ps = (const u16 *)pi;
118 #if (L1DCACHE_SIZE > PAGE_SIZE) /* is there D$ aliasing problem */
119 __flush_dcache_range((unsigned long)src, end);
123 #endif /* __KERNEL__ */
125 #endif /* _SPARC64_IDE_H */