1 /* $Id: io.h,v 1.47 2001/12/13 10:36:02 davem Exp $ */
5 #include <linux/kernel.h>
6 #include <linux/types.h>
8 #include <asm/page.h> /* IO address mapping routines need this */
9 #include <asm/system.h>
13 #define __SLOW_DOWN_IO do { } while (0)
14 #define SLOW_DOWN_IO do { } while (0)
16 extern unsigned long virt_to_bus_not_defined_use_pci_map(volatile void *addr);
17 #define virt_to_bus virt_to_bus_not_defined_use_pci_map
18 extern unsigned long bus_to_virt_not_defined_use_pci_map(volatile void *addr);
19 #define bus_to_virt bus_to_virt_not_defined_use_pci_map
21 /* BIO layer definitions. */
22 extern unsigned long phys_base, kern_base, kern_size;
23 #define page_to_phys(page) ((((page) - mem_map) << PAGE_SHIFT)+phys_base)
24 #define BIO_VMERGE_BOUNDARY 8192
26 /* Different PCI controllers we support have their PCI MEM space
27 * mapped to an either 2GB (Psycho) or 4GB (Sabre) aligned area,
28 * so need to chop off the top 33 or 32 bits.
30 extern unsigned long pci_memspace_mask;
32 #define bus_dvma_to_mem(__vaddr) ((__vaddr) & pci_memspace_mask)
34 static __inline__ u8 _inb(unsigned long addr)
38 __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_inb */"
40 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
45 static __inline__ u16 _inw(unsigned long addr)
49 __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_inw */"
51 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
56 static __inline__ u32 _inl(unsigned long addr)
60 __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_inl */"
62 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
67 static __inline__ void _outb(u8 b, unsigned long addr)
69 __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */"
71 : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
74 static __inline__ void _outw(u16 w, unsigned long addr)
76 __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */"
78 : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
81 static __inline__ void _outl(u32 l, unsigned long addr)
83 __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */"
85 : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
88 #define inb(__addr) (_inb((unsigned long)(__addr)))
89 #define inw(__addr) (_inw((unsigned long)(__addr)))
90 #define inl(__addr) (_inl((unsigned long)(__addr)))
91 #define outb(__b, __addr) (_outb((u8)(__b), (unsigned long)(__addr)))
92 #define outw(__w, __addr) (_outw((u16)(__w), (unsigned long)(__addr)))
93 #define outl(__l, __addr) (_outl((u32)(__l), (unsigned long)(__addr)))
95 #define inb_p(__addr) inb(__addr)
96 #define outb_p(__b, __addr) outb(__b, __addr)
97 #define inw_p(__addr) inw(__addr)
98 #define outw_p(__w, __addr) outw(__w, __addr)
99 #define inl_p(__addr) inl(__addr)
100 #define outl_p(__l, __addr) outl(__l, __addr)
102 extern void outsb(unsigned long addr, const void *src, unsigned long count);
103 extern void outsw(unsigned long addr, const void *src, unsigned long count);
104 extern void outsl(unsigned long addr, const void *src, unsigned long count);
105 extern void insb(unsigned long addr, void *dst, unsigned long count);
106 extern void insw(unsigned long addr, void *dst, unsigned long count);
107 extern void insl(unsigned long addr, void *dst, unsigned long count);
109 /* Memory functions, same as I/O accesses on Ultra. */
110 static __inline__ u8 _readb(unsigned long addr)
114 __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_readb */"
116 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
121 static __inline__ u16 _readw(unsigned long addr)
125 __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_readw */"
127 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
132 static __inline__ u32 _readl(unsigned long addr)
136 __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_readl */"
138 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
143 static __inline__ u64 _readq(unsigned long addr)
147 __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_readq */"
149 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
154 static __inline__ void _writeb(u8 b, unsigned long addr)
156 __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_writeb */"
158 : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
161 static __inline__ void _writew(u16 w, unsigned long addr)
163 __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_writew */"
165 : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
168 static __inline__ void _writel(u32 l, unsigned long addr)
170 __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_writel */"
172 : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
175 static __inline__ void _writeq(u64 q, unsigned long addr)
177 __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_writeq */"
179 : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
182 #define readb(__addr) (_readb((unsigned long)(__addr)))
183 #define readw(__addr) (_readw((unsigned long)(__addr)))
184 #define readl(__addr) (_readl((unsigned long)(__addr)))
185 #define readq(__addr) (_readq((unsigned long)(__addr)))
186 #define readb_relaxed(a) readb(a)
187 #define readw_relaxed(a) readw(a)
188 #define readl_relaxed(a) readl(a)
189 #define readq_relaxed(a) readq(a)
190 #define writeb(__b, __addr) (_writeb((u8)(__b), (unsigned long)(__addr)))
191 #define writew(__w, __addr) (_writew((u16)(__w), (unsigned long)(__addr)))
192 #define writel(__l, __addr) (_writel((u32)(__l), (unsigned long)(__addr)))
193 #define writeq(__q, __addr) (_writeq((u64)(__q), (unsigned long)(__addr)))
195 /* Now versions without byte-swapping. */
196 static __inline__ u8 _raw_readb(unsigned long addr)
200 __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_raw_readb */"
202 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
207 static __inline__ u16 _raw_readw(unsigned long addr)
211 __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_raw_readw */"
213 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
218 static __inline__ u32 _raw_readl(unsigned long addr)
222 __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_raw_readl */"
224 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
229 static __inline__ u64 _raw_readq(unsigned long addr)
233 __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_raw_readq */"
235 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
240 static __inline__ void _raw_writeb(u8 b, unsigned long addr)
242 __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */"
244 : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
247 static __inline__ void _raw_writew(u16 w, unsigned long addr)
249 __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */"
251 : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
254 static __inline__ void _raw_writel(u32 l, unsigned long addr)
256 __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */"
258 : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
261 static __inline__ void _raw_writeq(u64 q, unsigned long addr)
263 __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_raw_writeq */"
265 : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
268 #define __raw_readb(__addr) (_raw_readb((unsigned long)(__addr)))
269 #define __raw_readw(__addr) (_raw_readw((unsigned long)(__addr)))
270 #define __raw_readl(__addr) (_raw_readl((unsigned long)(__addr)))
271 #define __raw_readq(__addr) (_raw_readq((unsigned long)(__addr)))
272 #define __raw_writeb(__b, __addr) (_raw_writeb((u8)(__b), (unsigned long)(__addr)))
273 #define __raw_writew(__w, __addr) (_raw_writew((u16)(__w), (unsigned long)(__addr)))
274 #define __raw_writel(__l, __addr) (_raw_writel((u32)(__l), (unsigned long)(__addr)))
275 #define __raw_writeq(__q, __addr) (_raw_writeq((u64)(__q), (unsigned long)(__addr)))
277 /* Valid I/O Space regions are anywhere, because each PCI bus supported
278 * can live in an arbitrary area of the physical address range.
280 #define IO_SPACE_LIMIT 0xffffffffffffffffUL
282 /* Now, SBUS variants, only difference from PCI is that we do
283 * not use little-endian ASIs.
285 static __inline__ u8 _sbus_readb(unsigned long addr)
289 __asm__ __volatile__("lduba\t[%1] %2, %0\t/* sbus_readb */"
291 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
296 static __inline__ u16 _sbus_readw(unsigned long addr)
300 __asm__ __volatile__("lduha\t[%1] %2, %0\t/* sbus_readw */"
302 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
307 static __inline__ u32 _sbus_readl(unsigned long addr)
311 __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* sbus_readl */"
313 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
318 static __inline__ u64 _sbus_readq(unsigned long addr)
322 __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* sbus_readq */"
324 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
329 static __inline__ void _sbus_writeb(u8 b, unsigned long addr)
331 __asm__ __volatile__("stba\t%r0, [%1] %2\t/* sbus_writeb */"
333 : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
336 static __inline__ void _sbus_writew(u16 w, unsigned long addr)
338 __asm__ __volatile__("stha\t%r0, [%1] %2\t/* sbus_writew */"
340 : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
343 static __inline__ void _sbus_writel(u32 l, unsigned long addr)
345 __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* sbus_writel */"
347 : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
350 static __inline__ void _sbus_writeq(u64 l, unsigned long addr)
352 __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* sbus_writeq */"
354 : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
357 #define sbus_readb(__addr) (_sbus_readb((unsigned long)(__addr)))
358 #define sbus_readw(__addr) (_sbus_readw((unsigned long)(__addr)))
359 #define sbus_readl(__addr) (_sbus_readl((unsigned long)(__addr)))
360 #define sbus_readq(__addr) (_sbus_readq((unsigned long)(__addr)))
361 #define sbus_writeb(__b, __addr) (_sbus_writeb((__b), (unsigned long)(__addr)))
362 #define sbus_writew(__w, __addr) (_sbus_writew((__w), (unsigned long)(__addr)))
363 #define sbus_writel(__l, __addr) (_sbus_writel((__l), (unsigned long)(__addr)))
364 #define sbus_writeq(__l, __addr) (_sbus_writeq((__l), (unsigned long)(__addr)))
366 static inline void *_sbus_memset_io(unsigned long dst, int c, __kernel_size_t n)
375 #define sbus_memset_io(d,c,sz) \
376 _sbus_memset_io((unsigned long)d,(int)c,(__kernel_size_t)sz)
379 _memset_io(void *dst, int c, __kernel_size_t n)
391 #define memset_io(d,c,sz) \
392 _memset_io((void *)d,(int)c,(__kernel_size_t)sz)
395 _memcpy_fromio(void *dst, unsigned long src, __kernel_size_t n)
400 char tmp = readb(src);
408 #define memcpy_fromio(d,s,sz) \
409 _memcpy_fromio((void *)d,(unsigned long)s,(__kernel_size_t)sz)
412 _memcpy_toio(unsigned long dst, const void *src, __kernel_size_t n)
415 unsigned long d = dst;
425 #define memcpy_toio(d,s,sz) \
426 _memcpy_toio((unsigned long)d,(const void *)s,(__kernel_size_t)sz)
428 static inline int check_signature(unsigned long io_addr,
429 const unsigned char *signature,
434 if (readb(io_addr++) != *signature++)
444 /* On sparc64 we have the whole physical IO address space accessible
445 * using physically addressed loads and stores, so this does nothing.
447 #define ioremap(__offset, __size) ((void *)(__offset))
448 #define ioremap_nocache(X,Y) ioremap((X),(Y))
449 #define iounmap(__addr) do { (void)(__addr); } while(0)
451 /* Similarly for SBUS. */
452 #define sbus_ioremap(__res, __offset, __size, __name) \
453 ({ unsigned long __ret; \
454 __ret = (__res)->start + (((__res)->flags & 0x1ffUL) << 32UL); \
455 __ret += (unsigned long) (__offset); \
456 if (! request_region((__ret), (__size), (__name))) \
461 #define sbus_iounmap(__addr, __size) \
462 release_region((__addr), (__size))
466 #define dma_cache_inv(_start,_size) do { } while (0)
467 #define dma_cache_wback(_start,_size) do { } while (0)
468 #define dma_cache_wback_inv(_start,_size) do { } while (0)
472 #endif /* !(__SPARC64_IO_H) */