1 #ifndef __SPARC64_PCI_H
2 #define __SPARC64_PCI_H
9 /* Can be used to override the logic in pci_scan_bus for skipping
10 * already-configured bus numbers - to be used for buggy BIOSes
11 * or architectures with incomplete PCI setup by the loader.
13 #define pcibios_assign_all_busses() 0
14 #define pcibios_scan_all_fns(a, b) 0
16 #define PCIBIOS_MIN_IO 0UL
17 #define PCIBIOS_MIN_MEM 0UL
19 #define PCI_IRQ_NONE 0xffffffff
21 static inline void pcibios_set_master(struct pci_dev *dev)
23 /* No special bus mastering setup handling */
26 static inline void pcibios_penalize_isa_irq(int irq, int active)
28 /* We don't do dynamic PCI IRQ allocation */
31 /* Dynamic DMA mapping stuff.
34 /* The PCI address space does not equal the physical memory
35 * address space. The networking and block device layers use
36 * this boolean for bounce buffer decisions.
38 #define PCI_DMA_BUS_IS_PHYS (0)
40 #include <asm/scatterlist.h>
44 /* Allocate and map kernel buffer using consistent mode DMA for a device.
45 * hwdev should be valid struct pci_dev pointer for PCI devices.
47 extern void *__pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle, gfp_t gfp);
48 #define pci_alloc_consistent(DEV,SZ,HANDLE) \
49 __pci_alloc_consistent(DEV,SZ,HANDLE,GFP_ATOMIC)
51 /* Free and unmap a consistent DMA buffer.
52 * cpu_addr is what was returned from pci_alloc_consistent,
53 * size must be the same as what as passed into pci_alloc_consistent,
54 * and likewise dma_addr must be the same as what *dma_addrp was set to.
56 * References to the memory and mappings associated with cpu_addr/dma_addr
57 * past this call are illegal.
59 extern void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle);
61 /* Map a single buffer of the indicated size for DMA in streaming mode.
62 * The 32-bit bus address to use is returned.
64 * Once the device is given the dma address, the device owns this memory
65 * until either pci_unmap_single or pci_dma_sync_single_for_cpu is performed.
67 extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction);
69 /* Unmap a single streaming mode DMA translation. The dma_addr and size
70 * must match what was provided for in a previous pci_map_single call. All
71 * other usages are undefined.
73 * After this call, reads by the cpu to the buffer are guaranteed to see
74 * whatever the device wrote there.
76 extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction);
78 /* No highmem on sparc64, plus we have an IOMMU, so mapping pages is easy. */
79 #define pci_map_page(dev, page, off, size, dir) \
80 pci_map_single(dev, (page_address(page) + (off)), size, dir)
81 #define pci_unmap_page(dev,addr,sz,dir) pci_unmap_single(dev,addr,sz,dir)
83 /* pci_unmap_{single,page} is not a nop, thus... */
84 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
86 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
88 #define pci_unmap_addr(PTR, ADDR_NAME) \
90 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
91 (((PTR)->ADDR_NAME) = (VAL))
92 #define pci_unmap_len(PTR, LEN_NAME) \
94 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
95 (((PTR)->LEN_NAME) = (VAL))
97 /* Map a set of buffers described by scatterlist in streaming
98 * mode for DMA. This is the scatter-gather version of the
99 * above pci_map_single interface. Here the scatter gather list
100 * elements are each tagged with the appropriate dma address
101 * and length. They are obtained via sg_dma_{address,length}(SG).
103 * NOTE: An implementation may be able to use a smaller number of
104 * DMA address/length pairs than there are SG table elements.
105 * (for example via virtual mapping capabilities)
106 * The routine returns the number of addr/length pairs actually
107 * used, at most nents.
109 * Device ownership issues as mentioned above for pci_map_single are
112 extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
113 int nents, int direction);
115 /* Unmap a set of streaming mode DMA translations.
116 * Again, cpu read rules concerning calls here are the same as for
117 * pci_unmap_single() above.
119 extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
120 int nhwents, int direction);
122 /* Make physical memory consistent for a single
123 * streaming mode DMA translation after a transfer.
125 * If you perform a pci_map_single() but wish to interrogate the
126 * buffer using the cpu, yet do not wish to teardown the PCI dma
127 * mapping, you must call this function before doing so. At the
128 * next point you give the PCI dma address back to the card, you
129 * must first perform a pci_dma_sync_for_device, and then the
130 * device again owns the buffer.
132 extern void pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t dma_handle,
133 size_t size, int direction);
136 pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t dma_handle,
137 size_t size, int direction)
139 /* No flushing needed to sync cpu writes to the device. */
140 BUG_ON(direction == PCI_DMA_NONE);
143 /* Make physical memory consistent for a set of streaming
144 * mode DMA translations after a transfer.
146 * The same as pci_dma_sync_single_* but for a scatter-gather list,
147 * same rules and usage.
149 extern void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction);
152 pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sg,
153 int nelems, int direction)
155 /* No flushing needed to sync cpu writes to the device. */
156 BUG_ON(direction == PCI_DMA_NONE);
159 /* Return whether the given PCI device DMA address mask can
160 * be supported properly. For example, if your device can
161 * only drive the low 24-bits during PCI bus mastering, then
162 * you would pass 0x00ffffff as the mask to this function.
164 extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask);
166 /* PCI IOMMU mapping bypass support. */
168 /* PCI 64-bit addressing works for all slots on all controller
169 * types on sparc64. However, it requires that the device
170 * can drive enough of the 64 bits.
172 #define PCI64_REQUIRED_MASK (~(dma64_addr_t)0)
173 #define PCI64_ADDR_BASE 0xfffc000000000000UL
175 /* Usage of the pci_dac_foo interfaces is only valid if this
178 #define pci_dac_dma_supported(pci_dev, mask) \
179 ((((mask) & PCI64_REQUIRED_MASK) == PCI64_REQUIRED_MASK) ? 1 : 0)
181 static inline dma64_addr_t
182 pci_dac_page_to_dma(struct pci_dev *pdev, struct page *page, unsigned long offset, int direction)
184 return (PCI64_ADDR_BASE +
185 __pa(page_address(page)) + offset);
188 static inline struct page *
189 pci_dac_dma_to_page(struct pci_dev *pdev, dma64_addr_t dma_addr)
191 unsigned long paddr = (dma_addr & PAGE_MASK) - PCI64_ADDR_BASE;
193 return virt_to_page(__va(paddr));
196 static inline unsigned long
197 pci_dac_dma_to_offset(struct pci_dev *pdev, dma64_addr_t dma_addr)
199 return (dma_addr & ~PAGE_MASK);
203 pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction)
205 /* DAC cycle addressing does not make use of the
206 * PCI controller's streaming cache, so nothing to do.
211 pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction)
213 /* DAC cycle addressing does not make use of the
214 * PCI controller's streaming cache, so nothing to do.
218 #define PCI_DMA_ERROR_CODE (~(dma_addr_t)0x0)
220 static inline int pci_dma_mapping_error(dma_addr_t dma_addr)
222 return (dma_addr == PCI_DMA_ERROR_CODE);
226 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
227 enum pci_dma_burst_strategy *strat,
228 unsigned long *strategy_parameter)
230 unsigned long cacheline_size;
233 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
235 cacheline_size = 1024;
237 cacheline_size = (int) byte * 4;
239 *strat = PCI_DMA_BURST_BOUNDARY;
240 *strategy_parameter = cacheline_size;
244 /* Return the index of the PCI controller for device PDEV. */
246 extern int pci_domain_nr(struct pci_bus *bus);
247 static inline int pci_proc_domain(struct pci_bus *bus)
252 /* Platform support for /proc/bus/pci/X/Y mmap()s. */
254 #define HAVE_PCI_MMAP
255 #define HAVE_ARCH_PCI_GET_UNMAPPED_AREA
256 #define get_pci_unmapped_area get_fb_unmapped_area
258 extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
259 enum pci_mmap_state mmap_state,
262 /* Platform specific MWI support. */
263 #define HAVE_ARCH_PCI_MWI
264 extern int pcibios_prep_mwi(struct pci_dev *dev);
267 pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
268 struct resource *res);
271 pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
272 struct pci_bus_region *region);
274 extern struct resource *pcibios_select_root(struct pci_dev *, struct resource *);
276 static inline void pcibios_add_platform_entries(struct pci_dev *dev)
280 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
285 #endif /* __KERNEL__ */
287 #endif /* __SPARC64_PCI_H */