5 * We need the APIC definitions automatically as part of 'smp.h'
8 #include <linux/threads.h>
9 #include <linux/cpumask.h>
10 #include <linux/bitops.h>
11 extern int disable_apic;
14 #ifdef CONFIG_X86_LOCAL_APIC
16 #include <asm/fixmap.h>
17 #include <asm/mpspec.h>
18 #ifdef CONFIG_X86_IO_APIC
19 #include <asm/io_apic.h>
22 #include <asm/thread_info.h>
33 extern cpumask_t cpu_present_mask;
34 extern cpumask_t cpu_possible_map;
35 extern cpumask_t cpu_online_map;
36 extern cpumask_t cpu_initialized;
39 * Private routines/data
42 extern void smp_alloc_memory(void);
43 extern volatile unsigned long smp_invalidate_needed;
45 extern void lock_ipi_call_lock(void);
46 extern void unlock_ipi_call_lock(void);
47 extern int smp_num_siblings;
48 extern void smp_send_reschedule(int cpu);
49 void smp_stop_cpu(void);
50 extern int smp_call_function_single(int cpuid, void (*func) (void *info),
51 void *info, int retry, int wait);
53 extern cpumask_t cpu_sibling_map[NR_CPUS];
54 extern cpumask_t cpu_core_map[NR_CPUS];
55 extern u8 cpu_llc_id[NR_CPUS];
57 #define SMP_TRAMPOLINE_BASE 0x6000
60 * On x86 all CPUs are mapped 1:1 to the APIC space.
61 * This simplifies scheduling and IPI sending and
62 * compresses data structures.
65 static inline int num_booting_cpus(void)
67 return cpus_weight(cpu_possible_map);
70 #define raw_smp_processor_id() read_pda(cpunumber)
72 #ifdef CONFIG_X86_LOCAL_APIC
73 static inline int hard_smp_processor_id(void)
75 /* we don't want to mark this access volatile - bad code generation */
76 return GET_APIC_ID(*(unsigned int *)(APIC_BASE+APIC_ID));
80 extern int safe_smp_processor_id(void);
81 extern int __cpu_disable(void);
82 extern void __cpu_die(unsigned int cpu);
83 extern void prefill_possible_map(void);
84 extern unsigned num_processors;
85 extern unsigned disabled_cpus;
87 #endif /* !ASSEMBLY */
89 #define NO_PROC_ID 0xFF /* No processor magic marker */
95 * Some lowlevel functions might want to know about
96 * the real APIC ID <-> CPU # mapping.
98 extern u8 x86_cpu_to_apicid[NR_CPUS]; /* physical ID */
99 extern u8 x86_cpu_to_log_apicid[NR_CPUS];
100 extern u8 bios_cpu_apicid[];
102 #ifdef CONFIG_X86_LOCAL_APIC
103 static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
105 return cpus_addr(cpumask)[0];
108 static inline int cpu_present_to_apicid(int mps_cpu)
110 if (mps_cpu < NR_CPUS)
111 return (int)bios_cpu_apicid[mps_cpu];
117 #endif /* !ASSEMBLY */
120 #define stack_smp_processor_id() 0
121 #define safe_smp_processor_id() 0
122 #define cpu_logical_map(x) (x)
124 #include <asm/thread_info.h>
125 #define stack_smp_processor_id() \
127 struct thread_info *ti; \
128 __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
134 #ifdef CONFIG_X86_LOCAL_APIC
135 static __inline int logical_smp_processor_id(void)
137 /* we don't want to mark this access volatile - bad code generation */
138 return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE+APIC_LDR));
144 #define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu]
146 #define cpu_physical_id(cpu) boot_cpu_id