5 * We need the APIC definitions automatically as part of 'smp.h'
8 #include <linux/config.h>
9 #include <linux/threads.h>
10 #include <linux/cpumask.h>
11 #include <linux/bitops.h>
12 extern int disable_apic;
15 #ifdef CONFIG_X86_LOCAL_APIC
17 #include <asm/fixmap.h>
18 #include <asm/mpspec.h>
19 #ifdef CONFIG_X86_IO_APIC
20 #include <asm/io_apic.h>
23 #include <asm/thread_info.h>
34 extern cpumask_t cpu_present_mask;
35 extern cpumask_t cpu_possible_map;
36 extern cpumask_t cpu_online_map;
37 extern cpumask_t cpu_initialized;
40 * Private routines/data
43 extern void smp_alloc_memory(void);
44 extern volatile unsigned long smp_invalidate_needed;
46 extern void lock_ipi_call_lock(void);
47 extern void unlock_ipi_call_lock(void);
48 extern int smp_num_siblings;
49 extern void smp_send_reschedule(int cpu);
50 void smp_stop_cpu(void);
51 extern int smp_call_function_single(int cpuid, void (*func) (void *info),
52 void *info, int retry, int wait);
54 extern cpumask_t cpu_sibling_map[NR_CPUS];
55 extern cpumask_t cpu_core_map[NR_CPUS];
56 extern int phys_proc_id[NR_CPUS];
57 extern int cpu_core_id[NR_CPUS];
58 extern u8 cpu_llc_id[NR_CPUS];
60 #define SMP_TRAMPOLINE_BASE 0x6000
63 * On x86 all CPUs are mapped 1:1 to the APIC space.
64 * This simplifies scheduling and IPI sending and
65 * compresses data structures.
68 static inline int num_booting_cpus(void)
70 return cpus_weight(cpu_possible_map);
73 #define raw_smp_processor_id() read_pda(cpunumber)
75 #ifdef CONFIG_X86_LOCAL_APIC
76 static inline int hard_smp_processor_id(void)
78 /* we don't want to mark this access volatile - bad code generation */
79 return GET_APIC_ID(*(unsigned int *)(APIC_BASE+APIC_ID));
83 extern int safe_smp_processor_id(void);
84 extern int __cpu_disable(void);
85 extern void __cpu_die(unsigned int cpu);
86 extern void prefill_possible_map(void);
87 extern unsigned num_processors;
88 extern unsigned disabled_cpus;
90 #endif /* !ASSEMBLY */
92 #define NO_PROC_ID 0xFF /* No processor magic marker */
98 * Some lowlevel functions might want to know about
99 * the real APIC ID <-> CPU # mapping.
101 extern u8 x86_cpu_to_apicid[NR_CPUS]; /* physical ID */
102 extern u8 x86_cpu_to_log_apicid[NR_CPUS];
103 extern u8 bios_cpu_apicid[];
105 #ifdef CONFIG_X86_LOCAL_APIC
106 static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
108 return cpus_addr(cpumask)[0];
111 static inline int cpu_present_to_apicid(int mps_cpu)
113 if (mps_cpu < NR_CPUS)
114 return (int)bios_cpu_apicid[mps_cpu];
120 #endif /* !ASSEMBLY */
123 #define stack_smp_processor_id() 0
124 #define safe_smp_processor_id() 0
125 #define cpu_logical_map(x) (x)
127 #include <asm/thread_info.h>
128 #define stack_smp_processor_id() \
130 struct thread_info *ti; \
131 __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
137 #ifdef CONFIG_X86_LOCAL_APIC
138 static __inline int logical_smp_processor_id(void)
140 /* we don't want to mark this access volatile - bad code generation */
141 return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE+APIC_LDR));
147 #define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu]
149 #define cpu_physical_id(cpu) boot_cpu_id