1 #ifndef __ASM_SPINLOCK_H
2 #define __ASM_SPINLOCK_H
4 #include <asm/atomic.h>
5 #include <asm/rwlock.h>
9 * Your basic SMP spinlocks, allowing only a single CPU anywhere
11 * Simple spin lock operations. There are two variants, one clears IRQ's
12 * on the local processor, one does not.
14 * We make no fairness assumptions. They have a cost.
16 * (the type definitions are in asm/spinlock_types.h)
19 #define __raw_spin_is_locked(x) \
20 (*(volatile signed int *)(&(x)->slock) <= 0)
22 #define __raw_spin_lock_string \
24 LOCK_PREFIX " ; decl %0\n\t" \
26 LOCK_SECTION_START("") \
34 #define __raw_spin_lock_string_up \
37 #define __raw_spin_unlock_string \
39 :"=m" (lock->slock) : : "memory"
41 static inline void __raw_spin_lock(raw_spinlock_t *lock)
43 asm volatile(__raw_spin_lock_string : "=m" (lock->slock) : : "memory");
46 #define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
48 static inline int __raw_spin_trylock(raw_spinlock_t *lock)
54 :"=q" (oldval), "=m" (lock->slock)
60 static inline void __raw_spin_unlock(raw_spinlock_t *lock)
63 __raw_spin_unlock_string
67 #define __raw_spin_unlock_wait(lock) \
68 do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0)
71 * Read-write spinlocks, allowing multiple readers
72 * but only one writer.
74 * NOTE! it is quite common to have readers in interrupts
75 * but no interrupt writers. For those circumstances we
76 * can "mix" irq-safe locks - any writer needs to get a
77 * irq-safe write-lock, but readers can get non-irqsafe
80 * On x86, we implement read-write locks as a 32-bit counter
81 * with the high bit (sign) being the "contended" bit.
84 #define __raw_read_can_lock(x) ((int)(x)->lock > 0)
85 #define __raw_write_can_lock(x) ((x)->lock == RW_LOCK_BIAS)
87 static inline void __raw_read_lock(raw_rwlock_t *rw)
89 __build_read_lock(rw);
92 static inline void __raw_write_lock(raw_rwlock_t *rw)
94 __build_write_lock(rw);
97 static inline int __raw_read_trylock(raw_rwlock_t *lock)
99 atomic_t *count = (atomic_t *)lock;
101 if (atomic_read(count) >= 0)
107 static inline int __raw_write_trylock(raw_rwlock_t *lock)
109 atomic_t *count = (atomic_t *)lock;
110 if (atomic_sub_and_test(RW_LOCK_BIAS, count))
112 atomic_add(RW_LOCK_BIAS, count);
116 static inline void __raw_read_unlock(raw_rwlock_t *rw)
118 asm volatile(LOCK_PREFIX " ; incl %0" :"=m" (rw->lock) : : "memory");
121 static inline void __raw_write_unlock(raw_rwlock_t *rw)
123 asm volatile(LOCK_PREFIX " ; addl $" RW_LOCK_BIAS_STR ",%0"
124 : "=m" (rw->lock) : : "memory");
127 #endif /* __ASM_SPINLOCK_H */