1 #ifndef __ASM_SPINLOCK_H
2 #define __ASM_SPINLOCK_H
4 #include <asm/atomic.h>
5 #include <asm/rwlock.h>
7 #include <linux/config.h>
9 extern int printk(const char * fmt, ...)
10 __attribute__ ((format (printf, 1, 2)));
13 * Your basic SMP spinlocks, allowing only a single CPU anywhere
17 volatile unsigned int lock;
18 #ifdef CONFIG_DEBUG_SPINLOCK
23 #define SPINLOCK_MAGIC 0xdead4ead
25 #ifdef CONFIG_DEBUG_SPINLOCK
26 #define SPINLOCK_MAGIC_INIT , SPINLOCK_MAGIC
28 #define SPINLOCK_MAGIC_INIT /* */
31 #define SPIN_LOCK_UNLOCKED (spinlock_t) { 1 SPINLOCK_MAGIC_INIT }
33 #define spin_lock_init(x) do { *(x) = SPIN_LOCK_UNLOCKED; } while(0)
36 * Simple spin lock operations. There are two variants, one clears IRQ's
37 * on the local processor, one does not.
39 * We make no fairness assumptions. They have a cost.
42 #define spin_is_locked(x) (*(volatile signed char *)(&(x)->lock) <= 0)
43 #define spin_unlock_wait(x) do { barrier(); } while(spin_is_locked(x))
44 #define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock)
46 #define spin_lock_string \
48 "lock ; decb %0\n\t" \
50 LOCK_SECTION_START("") \
59 * This works. Despite all the confusion.
60 * (except on PPro SMP or if we are using OOSTORE)
61 * (PPro errata 66, 92)
64 #if !defined(CONFIG_X86_OOSTORE) && !defined(CONFIG_X86_PPRO_FENCE)
66 #define spin_unlock_string \
68 :"=m" (lock->lock) : : "memory"
71 static inline void _raw_spin_unlock(spinlock_t *lock)
73 #ifdef CONFIG_DEBUG_SPINLOCK
74 BUG_ON(lock->magic != SPINLOCK_MAGIC);
75 BUG_ON(!spin_is_locked(lock));
84 #define spin_unlock_string \
86 :"=q" (oldval), "=m" (lock->lock) \
87 :"0" (oldval) : "memory"
89 static inline void _raw_spin_unlock(spinlock_t *lock)
92 #ifdef CONFIG_DEBUG_SPINLOCK
93 BUG_ON(lock->magic != SPINLOCK_MAGIC);
94 BUG_ON(!spin_is_locked(lock));
103 static inline int _raw_spin_trylock(spinlock_t *lock)
106 __asm__ __volatile__(
108 :"=q" (oldval), "=m" (lock->lock)
109 :"0" (0) : "memory");
113 static inline void _raw_spin_lock(spinlock_t *lock)
115 #ifdef CONFIG_DEBUG_SPINLOCK
118 if (lock->magic != SPINLOCK_MAGIC) {
119 printk("eip: %p\n", &&here);
123 __asm__ __volatile__(
125 :"=m" (lock->lock) : : "memory");
130 * Read-write spinlocks, allowing multiple readers
131 * but only one writer.
133 * NOTE! it is quite common to have readers in interrupts
134 * but no interrupt writers. For those circumstances we
135 * can "mix" irq-safe locks - any writer needs to get a
136 * irq-safe write-lock, but readers can get non-irqsafe
140 volatile unsigned int lock;
141 #ifdef CONFIG_DEBUG_SPINLOCK
146 #define RWLOCK_MAGIC 0xdeaf1eed
148 #ifdef CONFIG_DEBUG_SPINLOCK
149 #define RWLOCK_MAGIC_INIT , RWLOCK_MAGIC
151 #define RWLOCK_MAGIC_INIT /* */
154 #define RW_LOCK_UNLOCKED (rwlock_t) { RW_LOCK_BIAS RWLOCK_MAGIC_INIT }
156 #define rwlock_init(x) do { *(x) = RW_LOCK_UNLOCKED; } while(0)
158 #define rwlock_is_locked(x) ((x)->lock != RW_LOCK_BIAS)
161 * On x86, we implement read-write locks as a 32-bit counter
162 * with the high bit (sign) being the "contended" bit.
164 * The inline assembly is non-obvious. Think about it.
166 * Changed to use the same technique as rw semaphores. See
167 * semaphore.h for details. -ben
169 /* the spinlock helpers are in arch/i386/kernel/semaphore.c */
171 static inline void _raw_read_lock(rwlock_t *rw)
173 #ifdef CONFIG_DEBUG_SPINLOCK
174 BUG_ON(rw->magic != RWLOCK_MAGIC);
176 __build_read_lock(rw, "__read_lock_failed");
179 static inline void _raw_write_lock(rwlock_t *rw)
181 #ifdef CONFIG_DEBUG_SPINLOCK
182 BUG_ON(rw->magic != RWLOCK_MAGIC);
184 __build_write_lock(rw, "__write_lock_failed");
187 #define _raw_read_unlock(rw) asm volatile("lock ; incl %0" :"=m" ((rw)->lock) : : "memory")
188 #define _raw_write_unlock(rw) asm volatile("lock ; addl $" RW_LOCK_BIAS_STR ",%0":"=m" ((rw)->lock) : : "memory")
190 static inline int _raw_write_trylock(rwlock_t *lock)
192 atomic_t *count = (atomic_t *)lock;
193 if (atomic_sub_and_test(RW_LOCK_BIAS, count))
195 atomic_add(RW_LOCK_BIAS, count);
199 #endif /* __ASM_SPINLOCK_H */