1 #ifndef _X86_64_PGTABLE_H
2 #define _X86_64_PGTABLE_H
5 * This file contains the functions and defines necessary to modify and use
6 * the x86-64 page table tree.
8 * x86-64 has a 4 level table setup. Generic linux MM only supports
9 * three levels. The fourth level is currently a single static page that
10 * is shared by everybody and just contains a pointer to the current
11 * three level page setup on the beginning and some kernel mappings at
12 * the end. For more details see Documentation/x86_64/mm.txt
14 #include <asm/processor.h>
15 #include <asm/fixmap.h>
16 #include <asm/bitops.h>
17 #include <linux/threads.h>
19 #include <asm-xen/hypervisor.h>
20 extern pud_t level3_user_pgt[512];
21 extern pud_t init_level4_pgt[];
22 extern pud_t init_level4_user_pgt[];
23 extern unsigned long __supported_pte_mask;
25 #define swapper_pg_dir NULL
27 extern int nonx_setup(char *str);
28 extern void paging_init(void);
29 extern void clear_kernel_mapping(unsigned long addr, unsigned long size);
31 extern unsigned long pgkern_mask;
33 #define arbitrary_virt_to_machine(__va) ({0;})
36 * ZERO_PAGE is a global shared page that is always zero: used
37 * for zero-mapped memory areas etc..
39 extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
40 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
42 #define PGDIR_SHIFT 39
43 #define PTRS_PER_PGD 512
46 * PUDIR_SHIFT determines what a top-level page table entry can map
49 #define PTRS_PER_PUD 512
52 * PMD_SHIFT determines the size of the area a middle-level
56 #define PTRS_PER_PMD 512
59 * entries per page directory level
61 #define PTRS_PER_PTE 512
63 #define pte_ERROR(e) \
64 printk("%s:%d: bad pte %p(%016lx).\n", __FILE__, __LINE__, &(e), pte_val(e))
65 #define pmd_ERROR(e) \
66 printk("%s:%d: bad pmd %p(%016lx).\n", __FILE__, __LINE__, &(e), pmd_val(e))
67 #define pud_ERROR(e) \
68 printk("%s:%d: bad pud %p(%016lx).\n", __FILE__, __LINE__, &(e), pud_val(e))
70 #define pgd_ERROR(e) \
71 printk("%s:%d: bad pgd %p(%016lx).\n", __FILE__, __LINE__, &(e), pgd_val(e))
73 #define pgd_none(x) (!pgd_val(x))
74 #define pud_none(x) (!pud_val(x))
76 #define set_pte_batched(pteptr, pteval) \
77 queue_l1_entry_update(pteptr, (pteval))
79 extern inline int pud_present(pud_t pud) { return !pud_none(pud); }
82 #define set_pte(pteptr, pteval) xen_l1_entry_update(pteptr, (pteval).pte)
85 #define set_pte(pteptr, pteval) xen_l1_entry_update(pteptr, (pteval.pte))
87 static inline void set_pte(pte_t *dst, pte_t val)
94 #define set_pmd(pmdptr, pmdval) xen_l2_entry_update(pmdptr, (pmdval))
95 #define set_pud(pudptr, pudval) xen_l3_entry_update(pudptr, (pudval))
96 #define set_pgd(pgdptr, pgdval) xen_l4_entry_update(pgdptr, (pgdval))
98 extern inline void pud_clear (pud_t * pud)
100 set_pud(pud, __pud(0));
103 #define __user_pgd(pgd) ((pgd) + PTRS_PER_PGD)
105 extern inline void pgd_clear (pgd_t * pgd)
107 set_pgd(pgd, __pgd(0));
108 set_pgd(__user_pgd(pgd), __pgd(0));
111 #define pud_page(pud) \
112 ((unsigned long) __va(pud_val(pud) & PHYSICAL_PAGE_MASK))
115 * A note on implementation of this atomic 'get-and-clear' operation.
116 * This is actually very simple because Xen Linux can only run on a single
117 * processor. Therefore, we cannot race other processors setting the 'accessed'
118 * or 'dirty' bits on a page-table entry.
119 * Even if pages are shared between domains, that is not a problem because
120 * each domain will have separate page tables, with their own versions of
121 * accessed & dirty state.
123 static inline pte_t ptep_get_and_clear(pte_t *xp)
127 set_pte(xp, __pte_ma(0));
131 #define pte_same(a, b) ((a).pte == (b).pte)
133 #define PMD_SIZE (1UL << PMD_SHIFT)
134 #define PMD_MASK (~(PMD_SIZE-1))
135 #define PUD_SIZE (1UL << PUD_SHIFT)
136 #define PUD_MASK (~(PUD_SIZE-1))
137 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
138 #define PGDIR_MASK (~(PGDIR_SIZE-1))
140 #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
141 #define FIRST_USER_PGD_NR 0
144 #define MAXMEM 0x3fffffffffffUL
145 #define VMALLOC_START 0xffffc20000000000UL
146 #define VMALLOC_END 0xffffe1ffffffffffUL
147 #define MODULES_VADDR 0xffffffff88000000UL
148 #define MODULES_END 0xfffffffffff00000UL
149 #define MODULES_LEN (MODULES_END - MODULES_VADDR)
151 #define _PAGE_BIT_PRESENT 0
152 #define _PAGE_BIT_RW 1
153 #define _PAGE_BIT_USER 2
154 #define _PAGE_BIT_PWT 3
155 #define _PAGE_BIT_PCD 4
156 #define _PAGE_BIT_ACCESSED 5
157 #define _PAGE_BIT_DIRTY 6
158 #define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
159 #define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
160 #define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
162 #define _PAGE_PRESENT 0x001
163 #define _PAGE_RW 0x002
164 #define _PAGE_USER 0x004
165 #define _PAGE_PWT 0x008
166 #define _PAGE_PCD 0x010
167 #define _PAGE_ACCESSED 0x020
168 #define _PAGE_DIRTY 0x040
169 #define _PAGE_PSE 0x080 /* 2MB page */
170 #define _PAGE_FILE 0x040 /* set:pagecache, unset:swap */
171 #define _PAGE_GLOBAL 0x100 /* Global TLB entry */
173 #define _PAGE_PROTNONE 0x080 /* If not present */
174 #define _PAGE_NX (1UL<<_PAGE_BIT_NX)
176 #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
177 #define _KERNPG_TABLE _PAGE_TABLE
179 #define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
181 #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
182 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
183 #define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
184 #define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
185 #define PAGE_COPY PAGE_COPY_NOEXEC
186 #define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
187 #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
188 #define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
189 #define __PAGE_KERNEL \
190 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_NX | _PAGE_USER )
191 #define __PAGE_KERNEL_EXEC \
192 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_USER )
193 #define __PAGE_KERNEL_NOCACHE \
194 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_PCD | _PAGE_ACCESSED | _PAGE_NX | _PAGE_USER )
195 #define __PAGE_KERNEL_RO \
196 (_PAGE_PRESENT | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_NX | _PAGE_USER )
197 #define __PAGE_KERNEL_VSYSCALL \
198 (_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_USER )
199 #define __PAGE_KERNEL_VSYSCALL_NOCACHE \
200 (_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_PCD | _PAGE_USER )
201 #define __PAGE_KERNEL_LARGE \
202 (__PAGE_KERNEL | _PAGE_PSE | _PAGE_USER )
206 * We don't support GLOBAL page in xenolinux64
208 #define MAKE_GLOBAL(x) __pgprot((x))
210 #define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL)
211 #define PAGE_KERNEL_EXEC MAKE_GLOBAL(__PAGE_KERNEL_EXEC)
212 #define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO)
213 #define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)
214 #define PAGE_KERNEL_VSYSCALL MAKE_GLOBAL(__PAGE_KERNEL_VSYSCALL)
215 #define PAGE_KERNEL_LARGE MAKE_GLOBAL(__PAGE_KERNEL_LARGE)
216 #define PAGE_KERNEL_VSYSCALL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_VSYSCALL_NOCACHE)
219 #define __P000 PAGE_NONE
220 #define __P001 PAGE_READONLY
221 #define __P010 PAGE_COPY
222 #define __P011 PAGE_COPY
223 #define __P100 PAGE_READONLY_EXEC
224 #define __P101 PAGE_READONLY_EXEC
225 #define __P110 PAGE_COPY_EXEC
226 #define __P111 PAGE_COPY_EXEC
228 #define __S000 PAGE_NONE
229 #define __S001 PAGE_READONLY
230 #define __S010 PAGE_SHARED
231 #define __S011 PAGE_SHARED
232 #define __S100 PAGE_READONLY_EXEC
233 #define __S101 PAGE_READONLY_EXEC
234 #define __S110 PAGE_SHARED_EXEC
235 #define __S111 PAGE_SHARED_EXEC
237 static inline unsigned long pgd_bad(pgd_t pgd)
239 unsigned long val = pgd_val(pgd);
241 val &= ~(_PAGE_USER | _PAGE_DIRTY);
242 return val & ~(_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED);
245 static inline unsigned long pud_bad(pud_t pud)
247 unsigned long val = pud_val(pud);
249 val &= ~(_PAGE_USER | _PAGE_DIRTY);
250 return val & ~(_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED);
253 #define pte_none(x) (!(x).pte)
254 #define pte_present(x) ((x).pte & (_PAGE_PRESENT | _PAGE_PROTNONE))
255 #define pte_clear(xp) do { set_pte(xp, __pte(0)); } while (0)
257 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
260 * We detect special mappings in one of two ways:
261 * 1. If the MFN is an I/O page then Xen will set the m2p entry
262 * to be outside our maximum possible pseudophys range.
263 * 2. If the MFN belongs to a different domain then we will certainly
264 * not have MFN in our p2m table. Conversely, if the page is ours,
265 * then we'll have p2m(m2p(MFN))==MFN.
266 * If we detect a special mapping then it doesn't have a 'struct page'.
267 * We force !pfn_valid() by returning an out-of-range pointer.
269 * NB. These checks require that, for any MFN that is not in our reservation,
270 * there is no PFN such that p2m(PFN) == MFN. Otherwise we can get confused if
271 * we are foreign-mapping the MFN, and the other domain as m2p(MFN) == PFN.
272 * Yikes! Various places must poke in INVALID_P2M_ENTRY for safety.
274 * NB2. When deliberately mapping foreign pages into the p2m table, you *must*
275 * use FOREIGN_FRAME(). This will cause pte_pfn() to choke on it, as we
276 * require. In all the cases we care about, the high bit gets shifted out
277 * (e.g., phys_to_machine()) so behaviour there is correct.
279 #define INVALID_P2M_ENTRY (~0UL)
280 #define FOREIGN_FRAME(_m) ((_m) | (1UL<<((sizeof(unsigned long)*8)-1)))
281 #define pte_pfn(_pte) \
283 unsigned long mfn = (_pte).pte >> PAGE_SHIFT; \
284 unsigned pfn = mfn_to_pfn(mfn); \
285 if ((pfn >= max_mapnr) || (pfn_to_mfn(pfn) != mfn)) \
286 pfn = max_mapnr; /* special: force !pfn_valid() */ \
290 #define pte_page(x) pfn_to_page(pte_pfn(x))
292 static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
296 (pte).pte = (pfn_to_mfn(page_nr) << PAGE_SHIFT);
297 (pte).pte |= pgprot_val(pgprot);
298 (pte).pte &= __supported_pte_mask;
302 #define pfn_pte_ma(pfn, prot) __pte_ma(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
304 * The following only work if pte_present() is true.
305 * Undefined behaviour if not..
307 #define __pte_val(x) ((x).pte)
309 static inline int pte_user(pte_t pte) { return __pte_val(pte) & _PAGE_USER; }
310 extern inline int pte_read(pte_t pte) { return __pte_val(pte) & _PAGE_USER; }
311 extern inline int pte_exec(pte_t pte) { return __pte_val(pte) & _PAGE_USER; }
312 extern inline int pte_dirty(pte_t pte) { return __pte_val(pte) & _PAGE_DIRTY; }
313 extern inline int pte_young(pte_t pte) { return __pte_val(pte) & _PAGE_ACCESSED; }
314 extern inline int pte_write(pte_t pte) { return __pte_val(pte) & _PAGE_RW; }
315 static inline int pte_file(pte_t pte) { return __pte_val(pte) & _PAGE_FILE; }
317 extern inline pte_t pte_rdprotect(pte_t pte) { __pte_val(pte) &= ~_PAGE_USER; return pte; }
318 extern inline pte_t pte_exprotect(pte_t pte) { __pte_val(pte) &= ~_PAGE_USER; return pte; }
319 extern inline pte_t pte_mkclean(pte_t pte) { __pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
320 extern inline pte_t pte_mkold(pte_t pte) { __pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
321 extern inline pte_t pte_wrprotect(pte_t pte) { __pte_val(pte) &= ~_PAGE_RW; return pte; }
322 extern inline pte_t pte_mkread(pte_t pte) { __pte_val(pte) |= _PAGE_USER; return pte; }
323 extern inline pte_t pte_mkexec(pte_t pte) { __pte_val(pte) |= _PAGE_USER; return pte; }
324 extern inline pte_t pte_mkdirty(pte_t pte) { __pte_val(pte) |= _PAGE_DIRTY; return pte; }
325 extern inline pte_t pte_mkyoung(pte_t pte) { __pte_val(pte) |= _PAGE_ACCESSED; return pte; }
326 extern inline pte_t pte_mkwrite(pte_t pte) { __pte_val(pte) |= _PAGE_RW; return pte; }
328 static inline int ptep_test_and_clear_dirty(pte_t *ptep)
331 int ret = pte_dirty(pte);
333 xen_l1_entry_update(ptep, pte_mkclean(pte).pte);
337 static inline int ptep_test_and_clear_young(pte_t *ptep)
340 int ret = pte_young(pte);
342 xen_l1_entry_update(ptep, pte_mkold(pte).pte);
346 static inline void ptep_set_wrprotect(pte_t *ptep)
350 set_pte(ptep, pte_wrprotect(pte));
352 static inline void ptep_mkdirty(pte_t *ptep)
356 xen_l1_entry_update(ptep, pte_mkdirty(pte).pte);
360 * Macro to mark a page protection value as "uncacheable".
362 #define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT))
364 #define __LARGE_PTE (_PAGE_PSE|_PAGE_PRESENT)
365 static inline int pmd_large(pmd_t pte) {
366 return (pmd_val(pte) & __LARGE_PTE) == __LARGE_PTE;
371 * Conversion functions: convert a page and protection to a page entry,
372 * and a page entry and page directory to the page they refer to.
375 #define page_pte(page) page_pte_prot(page, __pgprot(0))
379 * Never use these in the common code.
381 #define pgd_page(pgd) ((unsigned long) __va(pgd_val(pgd) & PTE_MASK))
382 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
383 #define pgd_offset(mm, addr) ((mm)->pgd + pgd_index(addr))
384 #define pgd_offset_k(address) (pgd_t *)(init_level4_pgt + pgd_index(address))
385 #define pgd_present(pgd) (pgd_val(pgd) & _PAGE_PRESENT)
386 #define mk_kernel_pgd(address) __pgd((address) | _KERNPG_TABLE)
388 /* PUD - Level3 access */
389 /* to find an entry in a page-table-directory. */
390 #define pud_index(address) ((address >> PUD_SHIFT) & (PTRS_PER_PUD-1))
391 #define pud_offset(pgd, address) ((pud_t *) pgd_page(*(pgd)) + pud_index(address))
392 static inline pud_t *__pud_offset_k(pud_t *pud, unsigned long address)
394 return pud + pud_index(address);
397 /* Find correct pud via the hidden fourth level page level: */
399 /* This accesses the reference page table of the boot cpu.
400 Other CPUs get synced lazily via the page fault handler. */
401 static inline pud_t *pud_offset_k(unsigned long address)
405 addr = pud_val(init_level4_pgt[pud_index(address)]);
406 addr &= PHYSICAL_PAGE_MASK; /* machine physical */
407 addr = machine_to_phys(addr);
408 return __pud_offset_k((pud_t *)__va(addr), address);
411 /* PMD - Level 2 access */
412 #define pmd_page_kernel(pmd) ((unsigned long) __va(pmd_val(pmd) & PTE_MASK))
413 #define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
415 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
416 #define pmd_offset(dir, address) ((pmd_t *) pud_page(*(dir)) + \
418 #define pmd_none(x) (!pmd_val(x))
419 #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
420 #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
421 #define pmd_bad(x) ((pmd_val(x) & ~PTE_MASK) != _KERNPG_TABLE )
422 #define pfn_pmd(nr,prot) (__pmd(((nr) << PAGE_SHIFT) | pgprot_val(prot)))
423 #define pmd_pfn(x) ((pmd_val(x) >> PAGE_SHIFT) & __PHYSICAL_MASK)
425 #define pte_to_pgoff(pte) ((pte_val(pte) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT)
426 #define pgoff_to_pte(off) ((pte_t) { ((off) << PAGE_SHIFT) | _PAGE_FILE })
427 #define PTE_FILE_MAX_BITS __PHYSICAL_MASK_SHIFT
429 /* PTE - Level 1 access. */
431 /* page, protection -> pte */
432 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
433 #define mk_pte_huge(entry) (pte_val(entry) |= _PAGE_PRESENT | _PAGE_PSE)
435 /* physical address -> PTE */
436 static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
439 (pte).pte = physpage | pgprot_val(pgprot);
443 /* Change flags of a PTE */
444 extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
446 (pte).pte &= _PAGE_CHG_MASK;
447 (pte).pte |= pgprot_val(newprot);
448 (pte).pte &= __supported_pte_mask;
452 #define pte_index(address) \
453 ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
454 #define pte_offset_kernel(dir, address) ((pte_t *) pmd_page_kernel(*(dir)) + \
457 /* x86-64 always has all page tables mapped. */
458 #define pte_offset_map(dir,address) pte_offset_kernel(dir,address)
459 #define pte_offset_map_nested(dir,address) pte_offset_kernel(dir,address)
460 #define pte_unmap(pte) /* NOP */
461 #define pte_unmap_nested(pte) /* NOP */
463 #define update_mmu_cache(vma,address,pte) do { } while (0)
465 /* We only update the dirty/accessed state if we set
466 * the dirty bit by hand in the kernel, since the hardware
467 * will do the accessed bit for us, and we don't want to
468 * race with other CPU's that might be updating the dirty
469 * bit at the same time. */
470 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
471 #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
474 set_pte(__ptep, __entry); \
475 flush_tlb_page(__vma, __address); \
479 /* Encode and de-code a swap entry */
480 #define __swp_type(x) (((x).val >> 1) & 0x3f)
481 #define __swp_offset(x) ((x).val >> 8)
482 #define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
483 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
484 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
486 #endif /* !__ASSEMBLY__ */
488 extern int kern_addr_valid(unsigned long addr);
490 #define DOMID_LOCAL (0xFFFFU)
492 int direct_remap_area_pages(struct mm_struct *mm,
493 unsigned long address,
494 unsigned long machine_addr,
498 int __direct_remap_area_pages(struct mm_struct *mm,
499 unsigned long address,
503 #define io_remap_page_range(vma, vaddr, paddr, size, prot) \
504 remap_pfn_range(vma, vaddr, (paddr) >> PAGE_SHIFT, size, prot)
506 #define HAVE_ARCH_UNMAPPED_AREA
508 #define pgtable_cache_init() do { } while (0)
509 #define check_pgt_cache() do { } while (0)
511 #define PAGE_AGP PAGE_KERNEL_NOCACHE
512 #define HAVE_PAGE_AGP 1
514 /* fs/proc/kcore.c */
515 #define kc_vaddr_to_offset(v) ((v) & __VIRTUAL_MASK)
516 #define kc_offset_to_vaddr(o) \
517 (((o) & (1UL << (__VIRTUAL_MASK_SHIFT-1))) ? ((o) | (~__VIRTUAL_MASK)) : (o))
519 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
520 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
521 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
522 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
523 #define __HAVE_ARCH_PTEP_MKDIRTY
524 #define __HAVE_ARCH_PTE_SAME
525 #include <asm-generic/pgtable.h>
527 #endif /* _X86_64_PGTABLE_H */