2 * Driver for Digigram VX soundcards
6 * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #ifndef __SOUND_VX_COMMON_H
24 #define __SOUND_VX_COMMON_H
26 #include <sound/pcm.h>
27 #include <sound/hwdep.h>
28 #include <linux/interrupt.h>
30 typedef struct snd_vx_core vx_core_t;
31 typedef struct vx_pipe vx_pipe_t;
33 #define VX_DRIVER_VERSION 0x010000 /* 1.0.0 */
37 #define SIZE_MAX_CMD 0x10
38 #define SIZE_MAX_STATUS 0x10
41 u16 LgCmd; /* length of the command to send (WORDs) */
42 u16 LgStat; /* length of the status received (WORDs) */
43 u32 Cmd[SIZE_MAX_CMD];
44 u32 Stat[SIZE_MAX_STATUS];
45 u16 DspStat; /* status type, RMP_SSIZE_XXX */
48 typedef u64 pcx_time_t;
50 #define VX_MAX_PIPES 16
51 #define VX_MAX_PERIODS 32
52 #define VX_MAX_CODECS 2
55 int size; /* the current IBL size (0 = query) in bytes */
56 int max_size; /* max. IBL size in bytes */
57 int min_size; /* min. IBL size in bytes */
58 int granularity; /* granularity */
63 unsigned int is_capture: 1;
64 unsigned int data_mode: 1;
65 unsigned int running: 1;
66 unsigned int prepared: 1;
68 unsigned int differed_type;
70 snd_pcm_substream_t *substream;
72 int hbuf_size; /* H-buffer size in bytes */
73 int buffer_bytes; /* the ALSA pcm buffer size in bytes */
74 int period_bytes; /* the ALSA pcm period size in bytes */
75 int hw_ptr; /* the current hardware pointer in bytes */
76 int position; /* the current position in frames (playback only) */
77 int transferred; /* the transferred size (per period) in frames */
78 int align; /* size of alignment */
79 u64 cur_count; /* current sample position (for playback) */
81 unsigned int references; /* an output pipe may be used for monitoring and/or playback */
82 vx_pipe_t *monitoring_pipe; /* pointer to the monitoring pipe (capture pipe only)*/
84 struct tasklet_struct start_tq;
89 unsigned char (*in8)(vx_core_t *chip, int reg);
90 unsigned int (*in32)(vx_core_t *chip, int reg);
91 void (*out8)(vx_core_t *chip, int reg, unsigned char val);
92 void (*out32)(vx_core_t *chip, int reg, unsigned int val);
94 int (*test_and_ack)(vx_core_t *chip);
95 void (*validate_irq)(vx_core_t *chip, int enable);
97 void (*write_codec)(vx_core_t *chip, int codec, unsigned int data);
98 void (*akm_write)(vx_core_t *chip, int reg, unsigned int data);
99 void (*reset_codec)(vx_core_t *chip);
100 void (*change_audio_source)(vx_core_t *chip, int src);
101 void (*set_clock_source)(vx_core_t *chp, int src);
103 int (*load_dsp)(vx_core_t *chip, const snd_hwdep_dsp_image_t *dsp);
104 void (*reset_dsp)(vx_core_t *chip);
105 void (*reset_board)(vx_core_t *chip, int cold_reset);
106 int (*add_controls)(vx_core_t *chip);
108 void (*dma_write)(vx_core_t *chip, snd_pcm_runtime_t *runtime,
109 vx_pipe_t *pipe, int count);
110 void (*dma_read)(vx_core_t *chip, snd_pcm_runtime_t *runtime,
111 vx_pipe_t *pipe, int count);
114 struct snd_vx_hardware {
116 int type; /* VX_TYPE_XXX */
119 unsigned int num_codecs;
120 unsigned int num_ins;
121 unsigned int num_outs;
122 unsigned int output_level_max;
125 /* hwdep id string */
126 #define SND_VX_HWDEP_ID "VX Loader"
131 VX_TYPE_BOARD, /* old VX222 PCI */
132 VX_TYPE_V2, /* VX222 V2 PCI */
133 VX_TYPE_MIC, /* VX222 Mic PCI */
135 VX_TYPE_VXPOCKET, /* VXpocket V2 */
136 VX_TYPE_VXP440, /* VXpocket 440 */
142 VX_STAT_XILINX_LOADED = (1 << 0), /* devices are registered */
143 VX_STAT_DEVICE_INIT = (1 << 1), /* devices are registered */
144 VX_STAT_CHIP_INIT = (1 << 2), /* all operational */
145 VX_STAT_IN_SUSPEND = (1 << 10), /* in suspend phase */
146 VX_STAT_IS_STALE = (1 << 15) /* device is stale */
149 /* min/max values for analog output for old codecs */
150 #define VX_ANALOG_OUT_LEVEL_MAX 0xe3
155 snd_pcm_t *pcm[VX_MAX_CODECS];
156 int type; /* VX_TYPE_XXX */
159 /* ports are defined externally */
161 /* low-level functions */
162 struct snd_vx_hardware *hw;
163 struct snd_vx_ops *ops;
167 struct tasklet_struct tq;
169 unsigned int chip_status;
170 unsigned int pcm_running;
174 struct vx_rmh irq_rmh; /* RMH used in interrupts */
176 unsigned int audio_info; /* see VX_AUDIO_INFO */
177 unsigned int audio_ins;
178 unsigned int audio_outs;
179 struct vx_pipe **playback_pipes;
180 struct vx_pipe **capture_pipes;
182 /* clock and audio sources */
183 unsigned int audio_source; /* current audio input source */
184 unsigned int audio_source_target;
185 unsigned int clock_mode; /* clock mode (VX_CLOCK_MODE_XXX) */
186 unsigned int clock_source; /* current clock source (INTERNAL_QUARTZ or UER_SYNC) */
187 unsigned int freq; /* current frequency */
188 unsigned int freq_detected; /* detected frequency from digital in */
189 unsigned int uer_detected; /* VX_UER_MODE_XXX */
190 unsigned int uer_bits; /* IEC958 status bits */
191 struct vx_ibl_info ibl; /* IBL information */
194 int output_level[VX_MAX_CODECS][2]; /* analog output level */
195 int audio_gain[2][4]; /* digital audio level (playback/capture) */
196 unsigned char audio_active[4]; /* mute/unmute on digital playback */
197 int audio_monitor[4]; /* playback hw-monitor level */
198 unsigned char audio_monitor_active[4]; /* playback hw-monitor mute/unmute */
200 struct semaphore mixer_mutex;
207 vx_core_t *snd_vx_create(snd_card_t *card, struct snd_vx_hardware *hw,
208 struct snd_vx_ops *ops, int extra_size);
209 int snd_vx_hwdep_new(vx_core_t *chip);
210 int snd_vx_load_boot_image(vx_core_t *chip, const snd_hwdep_dsp_image_t *boot);
211 int snd_vx_dsp_boot(vx_core_t *chip, const snd_hwdep_dsp_image_t *boot);
212 int snd_vx_dsp_load(vx_core_t *chip, const snd_hwdep_dsp_image_t *dsp);
215 * interrupt handler; exported for pcmcia
217 irqreturn_t snd_vx_irq_handler(int irq, void *dev, struct pt_regs *regs);
220 * power-management routines
223 void snd_vx_suspend(vx_core_t *chip);
224 void snd_vx_resume(vx_core_t *chip);
231 inline static int vx_test_and_ack(vx_core_t *chip)
233 snd_assert(chip->ops->test_and_ack, return -ENXIO);
234 return chip->ops->test_and_ack(chip);
237 inline static void vx_validate_irq(vx_core_t *chip, int enable)
239 snd_assert(chip->ops->validate_irq, return);
240 chip->ops->validate_irq(chip, enable);
243 inline static unsigned char snd_vx_inb(vx_core_t *chip, int reg)
245 snd_assert(chip->ops->in8, return 0);
246 return chip->ops->in8(chip, reg);
249 inline static unsigned int snd_vx_inl(vx_core_t *chip, int reg)
251 snd_assert(chip->ops->in32, return 0);
252 return chip->ops->in32(chip, reg);
255 inline static void snd_vx_outb(vx_core_t *chip, int reg, unsigned char val)
257 snd_assert(chip->ops->out8, return);
258 chip->ops->out8(chip, reg, val);
261 inline static void snd_vx_outl(vx_core_t *chip, int reg, unsigned int val)
263 snd_assert(chip->ops->out32, return);
264 chip->ops->out32(chip, reg, val);
267 #define vx_inb(chip,reg) snd_vx_inb(chip, VX_##reg)
268 #define vx_outb(chip,reg,val) snd_vx_outb(chip, VX_##reg,val)
269 #define vx_inl(chip,reg) snd_vx_inl(chip, VX_##reg)
270 #define vx_outl(chip,reg,val) snd_vx_outl(chip, VX_##reg,val)
272 void snd_vx_delay(vx_core_t *chip, int msec);
274 static inline void vx_reset_dsp(vx_core_t *chip)
276 snd_assert(chip->ops->reset_dsp, return);
277 chip->ops->reset_dsp(chip);
280 int vx_send_msg(vx_core_t *chip, struct vx_rmh *rmh);
281 int vx_send_msg_nolock(vx_core_t *chip, struct vx_rmh *rmh);
282 int vx_send_rih(vx_core_t *chip, int cmd);
283 int vx_send_rih_nolock(vx_core_t *chip, int cmd);
285 void vx_reset_codec(vx_core_t *chip, int cold_reset);
288 * check the bit on the specified register
289 * returns zero if a bit matches, or a negative error code.
290 * exported for vxpocket driver
292 int snd_vx_check_reg_bit(vx_core_t *chip, int reg, int mask, int bit, int time);
293 #define vx_check_isr(chip,mask,bit,time) snd_vx_check_reg_bit(chip, VX_ISR, mask, bit, time)
294 #define vx_wait_isr_bit(chip,bit) vx_check_isr(chip, bit, bit, 200)
295 #define vx_wait_for_rx_full(chip) vx_wait_isr_bit(chip, ISR_RX_FULL)
299 * pseudo-DMA transfer
301 inline static void vx_pseudo_dma_write(vx_core_t *chip, snd_pcm_runtime_t *runtime,
302 vx_pipe_t *pipe, int count)
304 snd_assert(chip->ops->dma_write, return);
305 chip->ops->dma_write(chip, runtime, pipe, count);
308 inline static void vx_pseudo_dma_read(vx_core_t *chip, snd_pcm_runtime_t *runtime,
309 vx_pipe_t *pipe, int count)
311 snd_assert(chip->ops->dma_read, return);
312 chip->ops->dma_read(chip, runtime, pipe, count);
317 /* error with hardware code,
318 * the return value is -(VX_ERR_MASK | actual-hw-error-code)
320 #define VX_ERR_MASK 0x1000000
321 #define vx_get_error(err) (-(err) & ~VX_ERR_MASK)
327 int snd_vx_pcm_new(vx_core_t *chip);
328 void vx_pcm_update_intr(vx_core_t *chip, unsigned int events);
333 int snd_vx_mixer_new(vx_core_t *chip);
334 void vx_toggle_dac_mute(vx_core_t *chip, int mute);
335 int vx_sync_audio_source(vx_core_t *chip);
336 int vx_set_monitor_level(vx_core_t *chip, int audio, int level, int active);
339 * IEC958 & clock stuff
341 void vx_set_iec958_status(vx_core_t *chip, unsigned int bits);
342 int vx_set_clock(vx_core_t *chip, unsigned int freq);
343 void vx_change_clock_source(vx_core_t *chip, int source);
344 void vx_set_internal_clock(vx_core_t *chip, unsigned int freq);
345 int vx_change_frequency(vx_core_t *chip);
352 #define vx_has_new_dsp(chip) ((chip)->type != VX_TYPE_BOARD)
353 #define vx_is_pcmcia(chip) ((chip)->type >= VX_TYPE_VXPOCKET)
355 /* audio input source */
357 VX_AUDIO_SRC_DIGITAL,
370 VX_CLOCK_MODE_AUTO, /* depending on the current audio source */
371 VX_CLOCK_MODE_INTERNAL, /* fixed to internal quartz */
372 VX_CLOCK_MODE_EXTERNAL /* fixed to UER sync */
377 VX_UER_MODE_CONSUMER,
378 VX_UER_MODE_PROFESSIONAL,
379 VX_UER_MODE_NOT_PRESENT,
382 /* register indices */
412 VX_LOFREQ, // V2: ACQ, VP: RFREQ
413 VX_HIFREQ, // V2: BIT0, VP: RUER_V2
414 VX_CSUER, // V2: BIT1, VP: BIT0
415 VX_RUER, // V2: RUER_V2, VP: BIT1
419 /* aliases for VX board */
420 VX_RESET_DMA = VX_ISR,
422 VX_STATUS = VX_MEMIRQ,
431 /* aliases for VXPOCKET board */
432 VX_MICRO = VX_MEMIRQ,
433 VX_CODEC2 = VX_MEMIRQ,
438 /* RMH status type */
440 RMH_SSIZE_FIXED = 0, /* status size given by the driver (in LgStat) */
441 RMH_SSIZE_ARG = 1, /* status size given in the LSB byte */
442 RMH_SSIZE_MASK = 2, /* status size given in bitmask */
446 /* bits for ICR register */
449 #define ICR_TREQ 0x02 /* Interrupt mode + HREQ set on for transfer (->DSP) request */
450 #define ICR_RREQ 0x01 /* Interrupt mode + RREQ set on for transfer (->PC) request */
452 /* bits for CVR register */
455 /* bits for ISR register */
460 #define ISR_TX_READY 0x04
461 #define ISR_TX_EMPTY 0x02
462 #define ISR_RX_FULL 0x01
464 /* Constants used to access the DATA register */
465 #define VX_DATA_CODEC_MASK 0x80
466 #define VX_DATA_XICOR_MASK 0x80
468 /* Constants used to access the CSUER register (both for VX2 and VXP) */
469 #define VX_SUER_FREQ_MASK 0x0c
470 #define VX_SUER_FREQ_32KHz_MASK 0x0c
471 #define VX_SUER_FREQ_44KHz_MASK 0x00
472 #define VX_SUER_FREQ_48KHz_MASK 0x04
473 #define VX_SUER_DATA_PRESENT_MASK 0x02
474 #define VX_SUER_CLOCK_PRESENT_MASK 0x01
476 #define VX_CUER_HH_BITC_SEL_MASK 0x08
477 #define VX_CUER_MH_BITC_SEL_MASK 0x04
478 #define VX_CUER_ML_BITC_SEL_MASK 0x02
479 #define VX_CUER_LL_BITC_SEL_MASK 0x01
481 #define XX_UER_CBITS_OFFSET_MASK 0x1f
484 /* bits for audio_info */
485 #define VX_AUDIO_INFO_REAL_TIME (1<<0) /* real-time processing available */
486 #define VX_AUDIO_INFO_OFFLINE (1<<1) /* offline processing available */
487 #define VX_AUDIO_INFO_MPEG1 (1<<5)
488 #define VX_AUDIO_INFO_MPEG2 (1<<6)
489 #define VX_AUDIO_INFO_LINEAR_8 (1<<7)
490 #define VX_AUDIO_INFO_LINEAR_16 (1<<8)
491 #define VX_AUDIO_INFO_LINEAR_24 (1<<9)
493 /* DSP Interrupt Request values */
494 #define VXP_IRQ_OFFSET 0x40 /* add 0x40 offset for vxpocket and vx222/v2 */
495 /* call with vx_send_irq_dsp() */
496 #define IRQ_MESS_WRITE_END 0x30
497 #define IRQ_MESS_WRITE_NEXT 0x32
498 #define IRQ_MESS_READ_NEXT 0x34
499 #define IRQ_MESS_READ_END 0x36
500 #define IRQ_MESSAGE 0x38
501 #define IRQ_RESET_CHK 0x3A
502 #define IRQ_CONNECT_STREAM_NEXT 0x26
503 #define IRQ_CONNECT_STREAM_END 0x28
504 #define IRQ_PAUSE_START_CONNECT 0x2A
505 #define IRQ_END_CONNECTION 0x2C
507 /* Is there async. events pending ( IT Source Test ) */
508 #define ASYNC_EVENTS_PENDING 0x008000
509 #define HBUFFER_EVENTS_PENDING 0x004000 // Not always accurate
510 #define NOTIF_EVENTS_PENDING 0x002000
511 #define TIME_CODE_EVENT_PENDING 0x001000
512 #define FREQUENCY_CHANGE_EVENT_PENDING 0x000800
513 #define END_OF_BUFFER_EVENTS_PENDING 0x000400
514 #define FATAL_DSP_ERROR 0xff0000
516 /* Stream Format Header Defines */
517 #define HEADER_FMT_BASE 0xFED00000
518 #define HEADER_FMT_MONO 0x000000C0
519 #define HEADER_FMT_INTEL 0x00008000
520 #define HEADER_FMT_16BITS 0x00002000
521 #define HEADER_FMT_24BITS 0x00004000
522 #define HEADER_FMT_UPTO11 0x00000200 /* frequency is less or equ. to 11k.*/
523 #define HEADER_FMT_UPTO32 0x00000100 /* frequency is over 11k and less then 32k.*/
525 /* Constants used to access the Codec */
526 #define XX_CODEC_SELECTOR 0x20
528 #define XX_CODEC_ADC_CONTROL_REGISTER 0x01
529 #define XX_CODEC_DAC_CONTROL_REGISTER 0x02
530 #define XX_CODEC_LEVEL_LEFT_REGISTER 0x03
531 #define XX_CODEC_LEVEL_RIGHT_REGISTER 0x04
532 #define XX_CODEC_PORT_MODE_REGISTER 0x05
533 #define XX_CODEC_STATUS_REPORT_REGISTER 0x06
534 #define XX_CODEC_CLOCK_CONTROL_REGISTER 0x07
537 * Audio-level control values
539 #define CVAL_M110DB 0x000 /* -110dB */
540 #define CVAL_M99DB 0x02C
541 #define CVAL_M21DB 0x163
542 #define CVAL_M18DB 0x16F
543 #define CVAL_M10DB 0x18F
544 #define CVAL_0DB 0x1B7
545 #define CVAL_18DB 0x1FF /* +18dB */
546 #define CVAL_MAX 0x1FF
548 #define AUDIO_IO_HAS_MUTE_LEVEL 0x400000
549 #define AUDIO_IO_HAS_MUTE_MONITORING_1 0x200000
550 #define AUDIO_IO_HAS_MUTE_MONITORING_2 0x100000
551 #define VALID_AUDIO_IO_DIGITAL_LEVEL 0x01
552 #define VALID_AUDIO_IO_MONITORING_LEVEL 0x02
553 #define VALID_AUDIO_IO_MUTE_LEVEL 0x04
554 #define VALID_AUDIO_IO_MUTE_MONITORING_1 0x08
555 #define VALID_AUDIO_IO_MUTE_MONITORING_2 0x10
558 #endif /* __SOUND_VX_COMMON_H */