2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>,
3 * Hannu Savolainen 1993-1996,
6 * Routines for control of AdLib FM cards (OPL2/OPL3/OPL4 chips)
8 * Most if code is ported from OSS/Lite.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <sound/opl3.h>
28 #include <linux/delay.h>
29 #include <linux/init.h>
30 #include <linux/slab.h>
31 #include <linux/ioport.h>
32 #include <sound/minors.h>
34 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>, Hannu Savolainen 1993-1996, Rob Hooft");
35 MODULE_DESCRIPTION("Routines for control of AdLib FM cards (OPL2/OPL3/OPL4 chips)");
36 MODULE_LICENSE("GPL");
38 extern char snd_opl3_regmap[MAX_OPL2_VOICES][4];
40 void snd_opl2_command(opl3_t * opl3, unsigned short cmd, unsigned char val)
46 * The original 2-OP synth requires a quite long delay
47 * after writing to a register.
50 port = (cmd & OPL3_RIGHT) ? opl3->r_port : opl3->l_port;
52 spin_lock_irqsave(&opl3->reg_lock, flags);
54 outb((unsigned char) cmd, port);
57 outb((unsigned char) val, port + 1);
60 spin_unlock_irqrestore(&opl3->reg_lock, flags);
63 void snd_opl3_command(opl3_t * opl3, unsigned short cmd, unsigned char val)
69 * The OPL-3 survives with just two INBs
70 * after writing to a register.
73 port = (cmd & OPL3_RIGHT) ? opl3->r_port : opl3->l_port;
75 spin_lock_irqsave(&opl3->reg_lock, flags);
77 outb((unsigned char) cmd, port);
81 outb((unsigned char) val, port + 1);
85 spin_unlock_irqrestore(&opl3->reg_lock, flags);
88 void snd_opl3_cs4281_command(opl3_t * opl3, unsigned short cmd, unsigned char val)
94 * CS4281 requires a special access to I/O registers
97 port = (cmd & OPL3_RIGHT) ? opl3->r_port : opl3->l_port;
99 spin_lock_irqsave(&opl3->reg_lock, flags);
101 writel((unsigned int)cmd, port << 2);
104 writel((unsigned int)val, (port + 1) << 2);
107 spin_unlock_irqrestore(&opl3->reg_lock, flags);
110 static int snd_opl3_detect(opl3_t * opl3)
113 * This function returns 1 if the FM chip is present at the given I/O port
114 * The detection algorithm plays with the timer built in the FM chip and
115 * looks for a change in the status register.
117 * Note! The timers of the FM chip are not connected to AdLib (and compatible)
120 * Note2! The chip is initialized if detected.
123 unsigned char stat1, stat2, signature;
125 /* Reset timers 1 and 2 */
126 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER1_MASK | OPL3_TIMER2_MASK);
127 /* Reset the IRQ of the FM chip */
128 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_IRQ_RESET);
129 signature = stat1 = inb(opl3->l_port); /* Status register */
130 if ((stat1 & 0xe0) != 0x00) { /* Should be 0x00 */
131 snd_printd("OPL3: stat1 = 0x%x\n", stat1);
134 /* Set timer1 to 0xff */
135 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER1, 0xff);
136 /* Unmask and start timer 1 */
137 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER2_MASK | OPL3_TIMER1_START);
138 /* Now we have to delay at least 80us */
140 /* Read status after timers have expired */
141 stat2 = inb(opl3->l_port);
142 /* Stop the timers */
143 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER1_MASK | OPL3_TIMER2_MASK);
144 /* Reset the IRQ of the FM chip */
145 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_IRQ_RESET);
146 if ((stat2 & 0xe0) != 0xc0) { /* There is no YM3812 */
147 snd_printd("OPL3: stat2 = 0x%x\n", stat2);
151 /* If the toplevel code knows exactly the type of chip, don't try
153 if (opl3->hardware != OPL3_HW_AUTO)
156 /* There is a FM chip on this address. Detect the type (OPL2 to OPL4) */
157 if (signature == 0x06) { /* OPL2 */
158 opl3->hardware = OPL3_HW_OPL2;
161 * If we had an OPL4 chip, opl3->hardware would have been set
162 * by the OPL4 driver; so we can assume OPL3 here.
164 snd_assert(opl3->r_port != 0, return -ENODEV);
165 opl3->hardware = OPL3_HW_OPL3;
178 static int snd_opl3_timer1_start(snd_timer_t * timer)
185 opl3 = snd_timer_chip(timer);
186 spin_lock_irqsave(&opl3->timer_lock, flags);
187 ticks = timer->sticks;
188 tmp = (opl3->timer_enable | OPL3_TIMER1_START) & ~OPL3_TIMER1_MASK;
189 opl3->timer_enable = tmp;
190 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER1, 256 - ticks); /* timer 1 count */
191 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* enable timer 1 IRQ */
192 spin_unlock_irqrestore(&opl3->timer_lock, flags);
196 static int snd_opl3_timer1_stop(snd_timer_t * timer)
202 opl3 = snd_timer_chip(timer);
203 spin_lock_irqsave(&opl3->timer_lock, flags);
204 tmp = (opl3->timer_enable | OPL3_TIMER1_MASK) & ~OPL3_TIMER1_START;
205 opl3->timer_enable = tmp;
206 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* disable timer #1 */
207 spin_unlock_irqrestore(&opl3->timer_lock, flags);
215 static int snd_opl3_timer2_start(snd_timer_t * timer)
222 opl3 = snd_timer_chip(timer);
223 spin_lock_irqsave(&opl3->timer_lock, flags);
224 ticks = timer->sticks;
225 tmp = (opl3->timer_enable | OPL3_TIMER2_START) & ~OPL3_TIMER2_MASK;
226 opl3->timer_enable = tmp;
227 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER2, 256 - ticks); /* timer 1 count */
228 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* enable timer 1 IRQ */
229 spin_unlock_irqrestore(&opl3->timer_lock, flags);
233 static int snd_opl3_timer2_stop(snd_timer_t * timer)
239 opl3 = snd_timer_chip(timer);
240 spin_lock_irqsave(&opl3->timer_lock, flags);
241 tmp = (opl3->timer_enable | OPL3_TIMER2_MASK) & ~OPL3_TIMER2_START;
242 opl3->timer_enable = tmp;
243 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* disable timer #1 */
244 spin_unlock_irqrestore(&opl3->timer_lock, flags);
252 static struct _snd_timer_hardware snd_opl3_timer1 =
254 .flags = SNDRV_TIMER_HW_STOP,
257 .start = snd_opl3_timer1_start,
258 .stop = snd_opl3_timer1_stop,
261 static struct _snd_timer_hardware snd_opl3_timer2 =
263 .flags = SNDRV_TIMER_HW_STOP,
264 .resolution = 320000,
266 .start = snd_opl3_timer2_start,
267 .stop = snd_opl3_timer2_stop,
270 static int snd_opl3_timer1_init(opl3_t * opl3, int timer_no)
272 snd_timer_t *timer = NULL;
276 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
277 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
278 tid.card = opl3->card->number;
279 tid.device = timer_no;
281 if ((err = snd_timer_new(opl3->card, "AdLib timer #1", &tid, &timer)) >= 0) {
282 strcpy(timer->name, "AdLib timer #1");
283 timer->private_data = opl3;
284 timer->hw = snd_opl3_timer1;
286 opl3->timer1 = timer;
290 static int snd_opl3_timer2_init(opl3_t * opl3, int timer_no)
292 snd_timer_t *timer = NULL;
296 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
297 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
298 tid.card = opl3->card->number;
299 tid.device = timer_no;
301 if ((err = snd_timer_new(opl3->card, "AdLib timer #2", &tid, &timer)) >= 0) {
302 strcpy(timer->name, "AdLib timer #2");
303 timer->private_data = opl3;
304 timer->hw = snd_opl3_timer2;
306 opl3->timer2 = timer;
314 void snd_opl3_interrupt(snd_hwdep_t * hw)
316 unsigned char status;
323 opl3 = hw->private_data;
324 status = inb(opl3->l_port);
326 snd_printk("AdLib IRQ status = 0x%x\n", status);
328 if (!(status & 0x80))
332 timer = opl3->timer1;
333 snd_timer_interrupt(timer, timer->sticks);
336 timer = opl3->timer2;
337 snd_timer_interrupt(timer, timer->sticks);
345 static int snd_opl3_free(opl3_t *opl3)
347 if (opl3->res_l_port) {
348 release_resource(opl3->res_l_port);
349 kfree_nocheck(opl3->res_l_port);
351 if (opl3->res_r_port) {
352 release_resource(opl3->res_r_port);
353 kfree_nocheck(opl3->res_r_port);
359 static int snd_opl3_dev_free(snd_device_t *device)
361 opl3_t *opl3 = device->device_data;
362 return snd_opl3_free(opl3);
365 int snd_opl3_create(snd_card_t * card,
366 unsigned long l_port,
367 unsigned long r_port,
368 unsigned short hardware,
374 static snd_device_ops_t ops = {
375 .dev_free = snd_opl3_dev_free,
380 opl3 = kcalloc(1, sizeof(*opl3), GFP_KERNEL);
385 goto __step1; /* ports are already reserved */
387 if ((opl3->res_l_port = request_region(l_port, 2, "OPL2/3 (left)")) == NULL) {
388 snd_printk(KERN_ERR "opl3: can't grab left port 0x%lx\n", l_port);
393 (opl3->res_r_port = request_region(r_port, 2, "OPL2/3 (right)")) == NULL) {
394 snd_printk(KERN_ERR "opl3: can't grab right port 0x%lx\n", r_port);
402 opl3->hardware = hardware;
403 opl3->l_port = l_port;
404 opl3->r_port = r_port;
406 spin_lock_init(&opl3->reg_lock);
407 spin_lock_init(&opl3->timer_lock);
408 init_MUTEX(&opl3->access_mutex);
410 switch (opl3->hardware) {
411 /* some hardware doesn't support timers */
412 case OPL3_HW_OPL3_SV:
413 case OPL3_HW_OPL3_CS:
414 case OPL3_HW_OPL3_FM801:
415 opl3->command = &snd_opl3_command;
417 case OPL3_HW_OPL3_CS4281:
418 opl3->command = &snd_opl3_cs4281_command;
421 opl3->command = &snd_opl2_command;
422 if ((err = snd_opl3_detect(opl3)) < 0) {
423 snd_printd("OPL2/3 chip not detected at 0x%lx/0x%lx\n",
424 opl3->l_port, opl3->r_port);
428 /* detect routine returns correct hardware type */
429 switch (opl3->hardware & OPL3_HW_MASK) {
432 opl3->command = &snd_opl3_command;
436 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TEST, OPL3_ENABLE_WAVE_SELECT);
437 opl3->command(opl3, OPL3_LEFT | OPL3_REG_PERCUSSION, 0x00); /* Melodic mode */
439 switch (opl3->hardware & OPL3_HW_MASK) {
441 opl3->max_voices = MAX_OPL2_VOICES;
445 opl3->max_voices = MAX_OPL3_VOICES;
446 snd_assert(opl3->r_port != 0, snd_opl3_free(opl3); return -ENODEV);
447 opl3->command(opl3, OPL3_RIGHT | OPL3_REG_MODE, OPL3_OPL3_ENABLE); /* Enter OPL3 mode */
449 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, opl3, &ops)) < 0) {
458 int snd_opl3_timer_new(opl3_t * opl3, int timer1_dev, int timer2_dev)
463 if ((err = snd_opl3_timer1_init(opl3, timer1_dev)) < 0)
465 if (timer2_dev >= 0) {
466 if ((err = snd_opl3_timer2_init(opl3, timer2_dev)) < 0) {
467 snd_device_free(opl3->card, opl3->timer1);
475 int snd_opl3_hwdep_new(opl3_t * opl3,
476 int device, int seq_device,
477 snd_hwdep_t ** rhwdep)
480 snd_card_t *card = opl3->card;
486 /* create hardware dependent device (direct FM) */
488 if ((err = snd_hwdep_new(card, "OPL2/OPL3", device, &hw)) < 0) {
489 snd_device_free(card, opl3);
492 hw->private_data = opl3;
493 #ifdef CONFIG_SND_OSSEMUL
495 hw->oss_type = SNDRV_OSS_DEVICE_TYPE_DMFM;
496 sprintf(hw->oss_dev, "dmfm%i", card->number);
499 strcpy(hw->name, hw->id);
500 switch (opl3->hardware & OPL3_HW_MASK) {
502 strcpy(hw->name, "OPL2 FM");
503 hw->iface = SNDRV_HWDEP_IFACE_OPL2;
506 strcpy(hw->name, "OPL3 FM");
507 hw->iface = SNDRV_HWDEP_IFACE_OPL3;
510 strcpy(hw->name, "OPL4 FM");
511 hw->iface = SNDRV_HWDEP_IFACE_OPL4;
515 /* operators - only ioctl */
516 hw->ops.open = snd_opl3_open;
517 hw->ops.ioctl = snd_opl3_ioctl;
518 hw->ops.release = snd_opl3_release;
520 opl3->seq_dev_num = seq_device;
521 #if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
522 if (snd_seq_device_new(card, seq_device, SNDRV_SEQ_DEV_ID_OPL3,
523 sizeof(opl3_t*), &opl3->seq_dev) >= 0) {
524 strcpy(opl3->seq_dev->name, hw->name);
525 *(opl3_t**)SNDRV_SEQ_DEVICE_ARGPTR(opl3->seq_dev) = opl3;
533 EXPORT_SYMBOL(snd_opl3_interrupt);
534 EXPORT_SYMBOL(snd_opl3_create);
535 EXPORT_SYMBOL(snd_opl3_timer_new);
536 EXPORT_SYMBOL(snd_opl3_hwdep_new);
539 EXPORT_SYMBOL(snd_opl3_regmap);
540 EXPORT_SYMBOL(snd_opl3_reset);
546 static int __init alsa_opl3_init(void)
551 static void __exit alsa_opl3_exit(void)
555 module_init(alsa_opl3_init)
556 module_exit(alsa_opl3_exit)