4 * The low level driver for the AD1848/CS4248 codec chip which
5 * is used for example in the MS Sound System.
7 * The CS4231 which is used in the GUS MAX and some other cards is
8 * upwards compatible with AD1848 and this driver is able to drive it.
10 * CS4231A and AD1845 are upward compatible with CS4231. However
11 * the new features of these chips are different.
13 * CS4232 is a PnP audio chip which contains a CS4231A (and SB, MPU).
14 * CS4232A is an improved version of CS4232.
18 * Copyright (C) by Hannu Savolainen 1993-1997
20 * OSS/Free for Linux is distributed under the GNU GENERAL PUBLIC LICENSE (GPL)
21 * Version 2 (June 1991). See the "COPYING" file distributed with this software
25 * Thomas Sailer : ioctl code reworked (vmalloc/vfree removed)
26 * general sleep/wakeup clean up.
27 * Alan Cox : reformatted. Fixed SMP bugs. Moved to kernel alloc/free
28 * of irqs. Use dev_id.
29 * Christoph Hellwig : adapted to module_init/module_exit
30 * Aki Laukkanen : added power management support
31 * Arnaldo C. de Melo : added missing restore_flags in ad1848_resume
32 * Miguel Freitas : added ISA PnP support
33 * Alan Cox : Added CS4236->4239 identification
34 * Daniel T. Cobra : Alernate config/mixer for later chips
35 * Alan Cox : Merged chip idents and config code
38 * APM save restore assist code on IBM thinkpad
41 * Tested. Believed fully functional.
44 #include <linux/config.h>
45 #include <linux/init.h>
46 #include <linux/interrupt.h>
47 #include <linux/module.h>
48 #include <linux/stddef.h>
50 #include <linux/isapnp.h>
51 #include <linux/pnp.h>
52 #include <linux/spinlock.h>
56 #include "sound_config.h"
59 #include "ad1848_mixer.h"
67 int dual_dma; /* 1, when two DMA channels allocated */
69 unsigned char MCE_bit;
70 unsigned char saved_regs[64]; /* Includes extended register space */
74 int record_dev, playback_dev;
80 char *chip_name, *name;
89 #define MD_4235 8 /* Crystal Audio CS4235 */
90 #define MD_1845_SSCAPE 9 /* Ensoniq Soundscape PNP*/
91 #define MD_4236 10 /* 4236 and higher */
92 #define MD_42xB 11 /* CS 42xB */
93 #define MD_4239 12 /* CS4239 */
95 /* Mixer parameters */
97 int supported_devices, orig_devices;
98 int supported_rec_devices, orig_rec_devices;
100 short mixer_reroute[32];
102 volatile unsigned long timer_ticks;
105 mixer_ents *mix_devices;
106 int mixer_output_port;
108 /* Power management */
109 struct pm_dev *pmdev;
112 typedef struct ad1848_port_info
116 unsigned char speed_bits;
119 unsigned char format_bits;
123 static struct address_info cfg;
124 static int nr_ad1848_devs;
130 static volatile signed char irq2dev[17] = {
131 -1, -1, -1, -1, -1, -1, -1, -1,
132 -1, -1, -1, -1, -1, -1, -1, -1, -1
135 #ifndef EXCLUDE_TIMERS
136 static int timer_installed = -1;
141 static int ad_format_mask[13 /*devc->model */ ] =
144 AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW,
145 AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM,
146 AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM,
147 AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW, /* AD1845 */
148 AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM,
149 AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM,
150 AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM,
151 AFMT_U8 | AFMT_S16_LE /* CS4235 */,
152 AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW /* Ensoniq Soundscape*/,
153 AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM,
154 AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM,
155 AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM
158 static ad1848_info adev_info[MAX_AUDIO_DEV];
160 #define io_Index_Addr(d) ((d)->base)
161 #define io_Indexed_Data(d) ((d)->base+1)
162 #define io_Status(d) ((d)->base+2)
163 #define io_Polled_IO(d) ((d)->base+3)
167 #define CAP_F_TIMER 0x01
168 } capabilities [10 /*devc->model */ ] = {
171 ,{CAP_F_TIMER} /* MD_4231 */
172 ,{CAP_F_TIMER} /* MD_4231A */
173 ,{CAP_F_TIMER} /* MD_1845 */
174 ,{CAP_F_TIMER} /* MD_4232 */
176 ,{CAP_F_TIMER} /* MD_IWAVE */
178 ,{CAP_F_TIMER} /* MD_1845_SSCAPE */
182 static int isapnp = 1;
183 static int isapnpjump;
186 static int audio_activated;
193 static int ad1848_open(int dev, int mode);
194 static void ad1848_close(int dev);
195 static void ad1848_output_block(int dev, unsigned long buf, int count, int intrflag);
196 static void ad1848_start_input(int dev, unsigned long buf, int count, int intrflag);
197 static int ad1848_prepare_for_output(int dev, int bsize, int bcount);
198 static int ad1848_prepare_for_input(int dev, int bsize, int bcount);
199 static void ad1848_halt(int dev);
200 static void ad1848_halt_input(int dev);
201 static void ad1848_halt_output(int dev);
202 static void ad1848_trigger(int dev, int bits);
203 static int ad1848_pm_callback(struct pm_dev *dev, pm_request_t rqst, void *data);
205 #ifndef EXCLUDE_TIMERS
206 static int ad1848_tmr_install(int dev);
207 static void ad1848_tmr_reprogram(int dev);
210 static int ad_read(ad1848_info * devc, int reg)
213 int timeout = 900000;
215 while (timeout > 0 && inb(devc->base) == 0x80) /*Are we initializing */
220 outb(((unsigned char) (reg & 0xff) | devc->MCE_bit), io_Index_Addr(devc));
221 x = inb(io_Indexed_Data(devc));
227 xreg = (reg & 0xff) - 32;
228 xra = (((xreg & 0x0f) << 4) & 0xf0) | 0x08 | ((xreg & 0x10) >> 2);
229 outb(((unsigned char) (23 & 0xff) | devc->MCE_bit), io_Index_Addr(devc));
230 outb(((unsigned char) (xra & 0xff)), io_Indexed_Data(devc));
231 x = inb(io_Indexed_Data(devc));
237 static void ad_write(ad1848_info * devc, int reg, int data)
239 int timeout = 900000;
241 while (timeout > 0 && inb(devc->base) == 0x80) /* Are we initializing */
246 outb(((unsigned char) (reg & 0xff) | devc->MCE_bit), io_Index_Addr(devc));
247 outb(((unsigned char) (data & 0xff)), io_Indexed_Data(devc));
253 xreg = (reg & 0xff) - 32;
254 xra = (((xreg & 0x0f) << 4) & 0xf0) | 0x08 | ((xreg & 0x10) >> 2);
255 outb(((unsigned char) (23 & 0xff) | devc->MCE_bit), io_Index_Addr(devc));
256 outb(((unsigned char) (xra & 0xff)), io_Indexed_Data(devc));
257 outb((unsigned char) (data & 0xff), io_Indexed_Data(devc));
261 static void wait_for_calibration(ad1848_info * devc)
266 * Wait until the auto calibration process has finished.
268 * 1) Wait until the chip becomes ready (reads don't return 0x80).
269 * 2) Wait until the ACI bit of I11 gets on and then off.
273 while (timeout > 0 && inb(devc->base) == 0x80)
275 if (inb(devc->base) & 0x80)
276 printk(KERN_WARNING "ad1848: Auto calibration timed out(1).\n");
279 while (timeout > 0 && !(ad_read(devc, 11) & 0x20))
281 if (!(ad_read(devc, 11) & 0x20))
285 while (timeout > 0 && (ad_read(devc, 11) & 0x20))
287 if (ad_read(devc, 11) & 0x20)
288 if ( (devc->model != MD_1845) || (devc->model != MD_1845_SSCAPE))
289 printk(KERN_WARNING "ad1848: Auto calibration timed out(3).\n");
292 static void ad_mute(ad1848_info * devc)
298 * Save old register settings and mute output channels
301 for (i = 6; i < 8; i++)
303 prev = devc->saved_regs[i] = ad_read(devc, i);
308 static void ad_unmute(ad1848_info * devc)
312 static void ad_enter_MCE(ad1848_info * devc)
317 while (timeout > 0 && inb(devc->base) == 0x80) /*Are we initializing */
320 devc->MCE_bit = 0x40;
321 prev = inb(io_Index_Addr(devc));
326 outb((devc->MCE_bit), io_Index_Addr(devc));
329 static void ad_leave_MCE(ad1848_info * devc)
331 unsigned char prev, acal;
334 while (timeout > 0 && inb(devc->base) == 0x80) /*Are we initializing */
337 acal = ad_read(devc, 9);
339 devc->MCE_bit = 0x00;
340 prev = inb(io_Index_Addr(devc));
341 outb((0x00), io_Index_Addr(devc)); /* Clear the MCE bit */
343 if ((prev & 0x40) == 0) /* Not in MCE mode */
347 outb((0x00), io_Index_Addr(devc)); /* Clear the MCE bit */
348 if (acal & 0x08) /* Auto calibration is enabled */
349 wait_for_calibration(devc);
352 static int ad1848_set_recmask(ad1848_info * devc, int mask)
354 unsigned char recdev;
358 mask &= devc->supported_rec_devices;
360 /* Rename the mixer bits if necessary */
361 for (i = 0; i < 32; i++)
363 if (devc->mixer_reroute[i] != i)
368 mask |= (1 << devc->mixer_reroute[i]);
374 for (i = 0; i < 32; i++) /* Count selected device bits */
378 spin_lock_irqsave(&devc->lock,flags);
381 mask = SOUND_MASK_MIC;
382 else if (n != 1) { /* Too many devices selected */
383 mask &= ~devc->recmask; /* Filter out active settings */
386 for (i = 0; i < 32; i++) /* Count selected device bits */
391 mask = SOUND_MASK_MIC;
398 case SOUND_MASK_LINE:
399 case SOUND_MASK_LINE3:
404 case SOUND_MASK_LINE1:
408 case SOUND_MASK_IMIX:
413 mask = SOUND_MASK_MIC;
418 ad_write(devc, 0, (ad_read(devc, 0) & 0x3f) | recdev);
419 ad_write(devc, 1, (ad_read(devc, 1) & 0x3f) | recdev);
420 } else { /* soundpro */
425 for (i = 0; i < 32; i++) { /* For each bit */
426 if ((devc->supported_rec_devices & (1 << i)) == 0)
427 continue; /* Device not supported */
429 for (j = LEFT_CHN; j <= RIGHT_CHN; j++) {
430 if (devc->mix_devices[i][j].nbits == 0) /* Inexistent channel */
435 * set_rec_bit becomes 1 if the corresponding bit in mask is set
436 * then it gets flipped if the polarity is inverse
438 set_rec_bit = ((mask & (1 << i)) != 0) ^ devc->mix_devices[i][j].recpol;
440 val = ad_read(devc, devc->mix_devices[i][j].recreg);
441 val &= ~(1 << devc->mix_devices[i][j].recpos);
442 val |= (set_rec_bit << devc->mix_devices[i][j].recpos);
443 ad_write(devc, devc->mix_devices[i][j].recreg, val);
447 spin_unlock_irqrestore(&devc->lock,flags);
449 /* Rename the mixer bits back if necessary */
450 for (i = 0; i < 32; i++)
452 if (devc->mixer_reroute[i] != i)
454 if (mask & (1 << devc->mixer_reroute[i]))
456 mask &= ~(1 << devc->mixer_reroute[i]);
461 devc->recmask = mask;
465 static void change_bits(ad1848_info * devc, unsigned char *regval,
466 unsigned char *muteval, int dev, int chn, int newval)
474 set_mute_bit = (newval == 0) ^ devc->mix_devices[dev][chn].mutepol;
476 if (devc->mix_devices[dev][chn].polarity == 1) /* Reverse */
477 newval = 100 - newval;
479 mask = (1 << devc->mix_devices[dev][chn].nbits) - 1;
480 shift = devc->mix_devices[dev][chn].bitpos;
482 if (devc->mix_devices[dev][chn].mutepos == 8)
483 { /* if there is no mute bit */
484 mute = 0; /* No mute bit; do nothing special */
485 mutemask = ~0; /* No mute bit; do nothing special */
489 mute = (set_mute_bit << devc->mix_devices[dev][chn].mutepos);
490 mutemask = ~(1 << devc->mix_devices[dev][chn].mutepos);
493 newval = (int) ((newval * mask) + 50) / 100; /* Scale it */
494 *regval &= ~(mask << shift); /* Clear bits */
495 *regval |= (newval & mask) << shift; /* Set new value */
497 *muteval &= mutemask;
501 static int ad1848_mixer_get(ad1848_info * devc, int dev)
503 if (!((1 << dev) & devc->supported_devices))
506 dev = devc->mixer_reroute[dev];
508 return devc->levels[dev];
511 static void ad1848_mixer_set_channel(ad1848_info *devc, int dev, int value, int channel)
513 int regoffs, muteregoffs;
514 unsigned char val, muteval;
517 regoffs = devc->mix_devices[dev][channel].regno;
518 muteregoffs = devc->mix_devices[dev][channel].mutereg;
519 val = ad_read(devc, regoffs);
521 if (muteregoffs != regoffs) {
522 muteval = ad_read(devc, muteregoffs);
523 change_bits(devc, &val, &muteval, dev, channel, value);
526 change_bits(devc, &val, &val, dev, channel, value);
528 spin_lock_irqsave(&devc->lock,flags);
529 ad_write(devc, regoffs, val);
530 devc->saved_regs[regoffs] = val;
531 if (muteregoffs != regoffs) {
532 ad_write(devc, muteregoffs, muteval);
533 devc->saved_regs[muteregoffs] = muteval;
535 spin_unlock_irqrestore(&devc->lock,flags);
538 static int ad1848_mixer_set(ad1848_info * devc, int dev, int value)
540 int left = value & 0x000000ff;
541 int right = (value & 0x0000ff00) >> 8;
547 if (!(devc->supported_devices & (1 << dev)))
550 dev = devc->mixer_reroute[dev];
552 if (devc->mix_devices[dev][LEFT_CHN].nbits == 0)
560 if (devc->mix_devices[dev][RIGHT_CHN].nbits == 0) /* Mono control */
563 retvol = left | (right << 8);
566 left = mix_cvt[left];
567 right = mix_cvt[right];
569 devc->levels[dev] = retvol;
572 * Set the left channel
574 ad1848_mixer_set_channel(devc, dev, left, LEFT_CHN);
577 * Set the right channel
579 if (devc->mix_devices[dev][RIGHT_CHN].nbits == 0)
581 ad1848_mixer_set_channel(devc, dev, right, RIGHT_CHN);
587 static void ad1848_mixer_reset(ad1848_info * devc)
593 devc->mix_devices = &(ad1848_mix_devices[0]);
595 sprintf(name, "%s_%d", devc->chip_name, nr_ad1848_devs);
597 for (i = 0; i < 32; i++)
598 devc->mixer_reroute[i] = i;
600 devc->supported_rec_devices = MODE1_REC_DEVICES;
608 devc->supported_devices = MODE2_MIXER_DEVICES;
612 devc->supported_devices = C930_MIXER_DEVICES;
613 devc->mix_devices = &(c930_mix_devices[0]);
617 devc->supported_devices = MODE3_MIXER_DEVICES;
618 devc->mix_devices = &(iwave_mix_devices[0]);
623 devc->mix_devices = &(cs42xb_mix_devices[0]);
624 devc->supported_devices = MODE3_MIXER_DEVICES;
628 devc->supported_devices = MODE3_MIXER_DEVICES;
633 devc->supported_devices = SPRO_MIXER_DEVICES;
634 devc->supported_rec_devices = SPRO_REC_DEVICES;
635 devc->mix_devices = &(spro_mix_devices[0]);
640 devc->supported_devices = MODE1_MIXER_DEVICES;
643 devc->orig_devices = devc->supported_devices;
644 devc->orig_rec_devices = devc->supported_rec_devices;
646 devc->levels = load_mixer_volumes(name, default_mixer_levels, 1);
648 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
650 if (devc->supported_devices & (1 << i))
651 ad1848_mixer_set(devc, i, devc->levels[i]);
654 ad1848_set_recmask(devc, SOUND_MASK_MIC);
656 devc->mixer_output_port = devc->levels[31] | AUDIO_HEADPHONE | AUDIO_LINE_OUT;
658 spin_lock_irqsave(&devc->lock,flags);
660 if (devc->mixer_output_port & AUDIO_SPEAKER)
661 ad_write(devc, 26, ad_read(devc, 26) & ~0x40); /* Unmute mono out */
663 ad_write(devc, 26, ad_read(devc, 26) | 0x40); /* Mute mono out */
666 * From the "wouldn't it be nice if the mixer API had (better)
667 * support for custom stuff" category
669 /* Enable surround mode and SB16 mixer */
670 ad_write(devc, 16, 0x60);
672 spin_unlock_irqrestore(&devc->lock,flags);
675 static int ad1848_mixer_ioctl(int dev, unsigned int cmd, caddr_t arg)
677 ad1848_info *devc = mixer_devs[dev]->devc;
680 if (cmd == SOUND_MIXER_PRIVATE1)
682 if (get_user(val, (int *)arg))
688 val &= (AUDIO_SPEAKER | AUDIO_HEADPHONE | AUDIO_LINE_OUT);
689 devc->mixer_output_port = val;
690 val |= AUDIO_HEADPHONE | AUDIO_LINE_OUT; /* Always on */
691 devc->mixer_output_port = val;
692 spin_lock_irqsave(&devc->lock,flags);
693 if (val & AUDIO_SPEAKER)
694 ad_write(devc, 26, ad_read(devc, 26) & ~0x40); /* Unmute mono out */
696 ad_write(devc, 26, ad_read(devc, 26) | 0x40); /* Mute mono out */
697 spin_unlock_irqrestore(&devc->lock,flags);
699 val = devc->mixer_output_port;
700 return put_user(val, (int *)arg);
702 if (cmd == SOUND_MIXER_PRIVATE2)
704 if (get_user(val, (int *)arg))
706 return(ad1848_control(AD1848_MIXER_REROUTE, val));
708 if (((cmd >> 8) & 0xff) == 'M')
710 if (_SIOC_DIR(cmd) & _SIOC_WRITE)
714 case SOUND_MIXER_RECSRC:
715 if (get_user(val, (int *)arg))
717 val = ad1848_set_recmask(devc, val);
721 if (get_user(val, (int *)arg))
723 val = ad1848_mixer_set(devc, cmd & 0xff, val);
726 return put_user(val, (int *)arg);
736 case SOUND_MIXER_RECSRC:
740 case SOUND_MIXER_DEVMASK:
741 val = devc->supported_devices;
744 case SOUND_MIXER_STEREODEVS:
745 val = devc->supported_devices;
746 if (devc->model != MD_C930)
747 val &= ~(SOUND_MASK_SPEAKER | SOUND_MASK_IMIX);
750 case SOUND_MIXER_RECMASK:
751 val = devc->supported_rec_devices;
754 case SOUND_MIXER_CAPS:
755 val=SOUND_CAP_EXCL_INPUT;
759 val = ad1848_mixer_get(devc, cmd & 0xff);
762 return put_user(val, (int *)arg);
769 static int ad1848_set_speed(int dev, int arg)
771 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
772 ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
775 * The sampling speed is encoded in the least significant nibble of I8. The
776 * LSB selects the clock source (0=24.576 MHz, 1=16.9344 MHz) and other
777 * three bits select the divisor (indirectly):
779 * The available speeds are in the following table. Keep the speeds in
780 * the increasing order.
789 static speed_struct speed_table[] =
791 {5510, (0 << 1) | 1},
792 {5510, (0 << 1) | 1},
793 {6620, (7 << 1) | 1},
794 {8000, (0 << 1) | 0},
795 {9600, (7 << 1) | 0},
796 {11025, (1 << 1) | 1},
797 {16000, (1 << 1) | 0},
798 {18900, (2 << 1) | 1},
799 {22050, (3 << 1) | 1},
800 {27420, (2 << 1) | 0},
801 {32000, (3 << 1) | 0},
802 {33075, (6 << 1) | 1},
803 {37800, (4 << 1) | 1},
804 {44100, (5 << 1) | 1},
805 {48000, (6 << 1) | 0}
808 int i, n, selected = -1;
810 n = sizeof(speed_table) / sizeof(speed_struct);
815 if (devc->model == MD_1845 || devc->model == MD_1845_SSCAPE) /* AD1845 has different timer than others */
823 portc->speed_bits = speed_table[3].bits;
826 if (arg < speed_table[0].speed)
828 if (arg > speed_table[n - 1].speed)
831 for (i = 1 /*really */ ; selected == -1 && i < n; i++)
833 if (speed_table[i].speed == arg)
835 else if (speed_table[i].speed > arg)
839 diff1 = arg - speed_table[i - 1].speed;
840 diff2 = speed_table[i].speed - arg;
850 printk(KERN_WARNING "ad1848: Can't find speed???\n");
853 portc->speed = speed_table[selected].speed;
854 portc->speed_bits = speed_table[selected].bits;
858 static short ad1848_set_channels(int dev, short arg)
860 ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
862 if (arg != 1 && arg != 2)
863 return portc->channels;
865 portc->channels = arg;
869 static unsigned int ad1848_set_bits(int dev, unsigned int arg)
871 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
872 ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
874 static struct format_tbl
921 int i, n = sizeof(format2bits) / sizeof(struct format_tbl);
924 return portc->audio_format;
926 if (!(arg & ad_format_mask[devc->model]))
929 portc->audio_format = arg;
931 for (i = 0; i < n; i++)
932 if (format2bits[i].format == arg)
934 if ((portc->format_bits = format2bits[i].bits) == 0)
935 return portc->audio_format = AFMT_U8; /* Was not supported */
939 /* Still hanging here. Something must be terribly wrong */
940 portc->format_bits = 0;
941 return portc->audio_format = AFMT_U8;
944 static struct audio_driver ad1848_audio_driver =
946 .owner = THIS_MODULE,
948 .close = ad1848_close,
949 .output_block = ad1848_output_block,
950 .start_input = ad1848_start_input,
951 .prepare_for_input = ad1848_prepare_for_input,
952 .prepare_for_output = ad1848_prepare_for_output,
953 .halt_io = ad1848_halt,
954 .halt_input = ad1848_halt_input,
955 .halt_output = ad1848_halt_output,
956 .trigger = ad1848_trigger,
957 .set_speed = ad1848_set_speed,
958 .set_bits = ad1848_set_bits,
959 .set_channels = ad1848_set_channels
962 static struct mixer_operations ad1848_mixer_operations =
964 .owner = THIS_MODULE,
966 .name = "AD1848/CS4248/CS4231",
967 .ioctl = ad1848_mixer_ioctl
970 static int ad1848_open(int dev, int mode)
973 ad1848_port_info *portc;
976 if (dev < 0 || dev >= num_audiodevs)
979 devc = (ad1848_info *) audio_devs[dev]->devc;
980 portc = (ad1848_port_info *) audio_devs[dev]->portc;
982 /* here we don't have to protect against intr */
983 spin_lock(&devc->lock);
984 if (portc->open_mode || (devc->open_mode & mode))
986 spin_unlock(&devc->lock);
991 if (audio_devs[dev]->flags & DMA_DUPLEX)
995 devc->intr_active = 0;
996 devc->audio_mode = 0;
997 devc->open_mode |= mode;
998 portc->open_mode = mode;
999 spin_unlock(&devc->lock);
1000 ad1848_trigger(dev, 0);
1002 if (mode & OPEN_READ)
1003 devc->record_dev = dev;
1004 if (mode & OPEN_WRITE)
1005 devc->playback_dev = dev;
1007 * Mute output until the playback really starts. This decreases clicking (hope so).
1009 spin_lock_irqsave(&devc->lock,flags);
1011 spin_unlock_irqrestore(&devc->lock,flags);
1016 static void ad1848_close(int dev)
1018 unsigned long flags;
1019 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1020 ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
1022 DEB(printk("ad1848_close(void)\n"));
1024 devc->intr_active = 0;
1027 spin_lock_irqsave(&devc->lock,flags);
1029 devc->audio_mode = 0;
1030 devc->open_mode &= ~portc->open_mode;
1031 portc->open_mode = 0;
1034 spin_unlock_irqrestore(&devc->lock,flags);
1037 static void ad1848_output_block(int dev, unsigned long buf, int count, int intrflag)
1039 unsigned long flags, cnt;
1040 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1041 ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
1045 if (portc->audio_format == AFMT_IMA_ADPCM)
1051 if (portc->audio_format & (AFMT_S16_LE | AFMT_S16_BE)) /* 16 bit data */
1054 if (portc->channels > 1)
1058 if ((devc->audio_mode & PCM_ENABLE_OUTPUT) && (audio_devs[dev]->flags & DMA_AUTOMODE) &&
1060 cnt == devc->xfer_count)
1062 devc->audio_mode |= PCM_ENABLE_OUTPUT;
1063 devc->intr_active = 1;
1065 * Auto DMA mode on. No need to react
1068 spin_lock_irqsave(&devc->lock,flags);
1070 ad_write(devc, 15, (unsigned char) (cnt & 0xff));
1071 ad_write(devc, 14, (unsigned char) ((cnt >> 8) & 0xff));
1073 devc->xfer_count = cnt;
1074 devc->audio_mode |= PCM_ENABLE_OUTPUT;
1075 devc->intr_active = 1;
1076 spin_unlock_irqrestore(&devc->lock,flags);
1079 static void ad1848_start_input(int dev, unsigned long buf, int count, int intrflag)
1081 unsigned long flags, cnt;
1082 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1083 ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
1086 if (portc->audio_format == AFMT_IMA_ADPCM)
1092 if (portc->audio_format & (AFMT_S16_LE | AFMT_S16_BE)) /* 16 bit data */
1095 if (portc->channels > 1)
1099 if ((devc->audio_mode & PCM_ENABLE_INPUT) && (audio_devs[dev]->flags & DMA_AUTOMODE) &&
1101 cnt == devc->xfer_count)
1103 devc->audio_mode |= PCM_ENABLE_INPUT;
1104 devc->intr_active = 1;
1106 * Auto DMA mode on. No need to react
1109 spin_lock_irqsave(&devc->lock,flags);
1111 if (devc->model == MD_1848)
1113 ad_write(devc, 15, (unsigned char) (cnt & 0xff));
1114 ad_write(devc, 14, (unsigned char) ((cnt >> 8) & 0xff));
1118 ad_write(devc, 31, (unsigned char) (cnt & 0xff));
1119 ad_write(devc, 30, (unsigned char) ((cnt >> 8) & 0xff));
1124 devc->xfer_count = cnt;
1125 devc->audio_mode |= PCM_ENABLE_INPUT;
1126 devc->intr_active = 1;
1127 spin_unlock_irqrestore(&devc->lock,flags);
1130 static int ad1848_prepare_for_output(int dev, int bsize, int bcount)
1133 unsigned char fs, old_fs, tmp = 0;
1134 unsigned long flags;
1135 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1136 ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
1140 spin_lock_irqsave(&devc->lock,flags);
1141 fs = portc->speed_bits | (portc->format_bits << 5);
1143 if (portc->channels > 1)
1146 ad_enter_MCE(devc); /* Enables changes to the format select reg */
1148 if (devc->model == MD_1845 || devc->model == MD_1845_SSCAPE) /* Use alternate speed select registers */
1150 fs &= 0xf0; /* Mask off the rate select bits */
1152 ad_write(devc, 22, (portc->speed >> 8) & 0xff); /* Speed MSB */
1153 ad_write(devc, 23, portc->speed & 0xff); /* Speed LSB */
1155 old_fs = ad_read(devc, 8);
1157 if (devc->model == MD_4232 || devc->model >= MD_4236)
1159 tmp = ad_read(devc, 16);
1160 ad_write(devc, 16, tmp | 0x30);
1162 if (devc->model == MD_IWAVE)
1163 ad_write(devc, 17, 0xc2); /* Disable variable frequency select */
1165 ad_write(devc, 8, fs);
1168 * Write to I8 starts resynchronization. Wait until it completes.
1172 while (timeout < 100 && inb(devc->base) != 0x80)
1175 while (timeout < 10000 && inb(devc->base) == 0x80)
1178 if (devc->model >= MD_4232)
1179 ad_write(devc, 16, tmp & ~0x30);
1181 ad_leave_MCE(devc); /*
1182 * Starts the calibration process.
1184 spin_unlock_irqrestore(&devc->lock,flags);
1185 devc->xfer_count = 0;
1187 #ifndef EXCLUDE_TIMERS
1188 if (dev == timer_installed && devc->timer_running)
1189 if ((fs & 0x01) != (old_fs & 0x01))
1191 ad1848_tmr_reprogram(dev);
1194 ad1848_halt_output(dev);
1198 static int ad1848_prepare_for_input(int dev, int bsize, int bcount)
1201 unsigned char fs, old_fs, tmp = 0;
1202 unsigned long flags;
1203 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1204 ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
1206 if (devc->audio_mode)
1209 spin_lock_irqsave(&devc->lock,flags);
1210 fs = portc->speed_bits | (portc->format_bits << 5);
1212 if (portc->channels > 1)
1215 ad_enter_MCE(devc); /* Enables changes to the format select reg */
1217 if ((devc->model == MD_1845) || (devc->model == MD_1845_SSCAPE)) /* Use alternate speed select registers */
1219 fs &= 0xf0; /* Mask off the rate select bits */
1221 ad_write(devc, 22, (portc->speed >> 8) & 0xff); /* Speed MSB */
1222 ad_write(devc, 23, portc->speed & 0xff); /* Speed LSB */
1224 if (devc->model == MD_4232)
1226 tmp = ad_read(devc, 16);
1227 ad_write(devc, 16, tmp | 0x30);
1229 if (devc->model == MD_IWAVE)
1230 ad_write(devc, 17, 0xc2); /* Disable variable frequency select */
1233 * If mode >= 2 (CS4231), set I28. It's the capture format register.
1236 if (devc->model != MD_1848)
1238 old_fs = ad_read(devc, 28);
1239 ad_write(devc, 28, fs);
1242 * Write to I28 starts resynchronization. Wait until it completes.
1246 while (timeout < 100 && inb(devc->base) != 0x80)
1250 while (timeout < 10000 && inb(devc->base) == 0x80)
1253 if (devc->model != MD_1848 && devc->model != MD_1845 && devc->model != MD_1845_SSCAPE)
1256 * CS4231 compatible devices don't have separate sampling rate selection
1257 * register for recording an playback. The I8 register is shared so we have to
1258 * set the speed encoding bits of it too.
1260 unsigned char tmp = portc->speed_bits | (ad_read(devc, 8) & 0xf0);
1262 ad_write(devc, 8, tmp);
1264 * Write to I8 starts resynchronization. Wait until it completes.
1267 while (timeout < 100 && inb(devc->base) != 0x80)
1271 while (timeout < 10000 && inb(devc->base) == 0x80)
1276 { /* For AD1848 set I8. */
1278 old_fs = ad_read(devc, 8);
1279 ad_write(devc, 8, fs);
1281 * Write to I8 starts resynchronization. Wait until it completes.
1284 while (timeout < 100 && inb(devc->base) != 0x80)
1287 while (timeout < 10000 && inb(devc->base) == 0x80)
1291 if (devc->model == MD_4232)
1292 ad_write(devc, 16, tmp & ~0x30);
1294 ad_leave_MCE(devc); /*
1295 * Starts the calibration process.
1297 spin_unlock_irqrestore(&devc->lock,flags);
1298 devc->xfer_count = 0;
1300 #ifndef EXCLUDE_TIMERS
1301 if (dev == timer_installed && devc->timer_running)
1303 if ((fs & 0x01) != (old_fs & 0x01))
1305 ad1848_tmr_reprogram(dev);
1309 ad1848_halt_input(dev);
1313 static void ad1848_halt(int dev)
1315 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1316 ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
1318 unsigned char bits = ad_read(devc, 9);
1320 if (bits & 0x01 && (portc->open_mode & OPEN_WRITE))
1321 ad1848_halt_output(dev);
1323 if (bits & 0x02 && (portc->open_mode & OPEN_READ))
1324 ad1848_halt_input(dev);
1325 devc->audio_mode = 0;
1328 static void ad1848_halt_input(int dev)
1330 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1331 unsigned long flags;
1333 if (!(ad_read(devc, 9) & 0x02))
1334 return; /* Capture not enabled */
1336 spin_lock_irqsave(&devc->lock,flags);
1343 if(!isa_dma_bridge_buggy)
1344 disable_dma(audio_devs[dev]->dmap_in->dma);
1346 for (tmout = 0; tmout < 100000; tmout++)
1347 if (ad_read(devc, 11) & 0x10)
1349 ad_write(devc, 9, ad_read(devc, 9) & ~0x02); /* Stop capture */
1351 if(!isa_dma_bridge_buggy)
1352 enable_dma(audio_devs[dev]->dmap_in->dma);
1353 devc->audio_mode &= ~PCM_ENABLE_INPUT;
1356 outb(0, io_Status(devc)); /* Clear interrupt status */
1357 outb(0, io_Status(devc)); /* Clear interrupt status */
1359 devc->audio_mode &= ~PCM_ENABLE_INPUT;
1361 spin_unlock_irqrestore(&devc->lock,flags);
1364 static void ad1848_halt_output(int dev)
1366 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1367 unsigned long flags;
1369 if (!(ad_read(devc, 9) & 0x01))
1370 return; /* Playback not enabled */
1372 spin_lock_irqsave(&devc->lock,flags);
1378 if(!isa_dma_bridge_buggy)
1379 disable_dma(audio_devs[dev]->dmap_out->dma);
1381 for (tmout = 0; tmout < 100000; tmout++)
1382 if (ad_read(devc, 11) & 0x10)
1384 ad_write(devc, 9, ad_read(devc, 9) & ~0x01); /* Stop playback */
1386 if(!isa_dma_bridge_buggy)
1387 enable_dma(audio_devs[dev]->dmap_out->dma);
1389 devc->audio_mode &= ~PCM_ENABLE_OUTPUT;
1392 outb((0), io_Status(devc)); /* Clear interrupt status */
1393 outb((0), io_Status(devc)); /* Clear interrupt status */
1395 devc->audio_mode &= ~PCM_ENABLE_OUTPUT;
1397 spin_unlock_irqrestore(&devc->lock,flags);
1400 static void ad1848_trigger(int dev, int state)
1402 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1403 ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
1404 unsigned long flags;
1405 unsigned char tmp, old;
1407 spin_lock_irqsave(&devc->lock,flags);
1408 state &= devc->audio_mode;
1410 tmp = old = ad_read(devc, 9);
1412 if (portc->open_mode & OPEN_READ)
1414 if (state & PCM_ENABLE_INPUT)
1419 if (portc->open_mode & OPEN_WRITE)
1421 if (state & PCM_ENABLE_OUTPUT)
1426 /* ad_mute(devc); */
1429 ad_write(devc, 9, tmp);
1432 spin_unlock_irqrestore(&devc->lock,flags);
1435 static void ad1848_init_hw(ad1848_info * devc)
1441 * Initial values for the indirect registers of CS4248/AD1848.
1443 static int init_values_a[] =
1445 0xa8, 0xa8, 0x08, 0x08, 0x08, 0x08, 0x00, 0x00,
1446 0x00, 0x0c, 0x02, 0x00, 0x8a, 0x01, 0x00, 0x00,
1448 /* Positions 16 to 31 just for CS4231/2 and ad1845 */
1449 0x80, 0x00, 0x10, 0x10, 0x00, 0x00, 0x1f, 0x40,
1450 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
1453 static int init_values_b[] =
1456 Values for the newer chips
1457 Some of the register initialization values were changed. In
1458 order to get rid of the click that preceded PCM playback,
1459 calibration was disabled on the 10th byte. On that same byte,
1460 dual DMA was enabled; on the 11th byte, ADC dithering was
1461 enabled, since that is theoretically desirable; on the 13th
1462 byte, Mode 3 was selected, to enable access to extended
1465 0xa8, 0xa8, 0x08, 0x08, 0x08, 0x08, 0x00, 0x00,
1466 0x00, 0x00, 0x06, 0x00, 0xe0, 0x01, 0x00, 0x00,
1467 0x80, 0x00, 0x10, 0x10, 0x00, 0x00, 0x1f, 0x40,
1468 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
1472 * Select initialisation data
1475 init_values = init_values_a;
1476 if(devc->model >= MD_4236)
1477 init_values = init_values_b;
1479 for (i = 0; i < 16; i++)
1480 ad_write(devc, i, init_values[i]);
1483 ad_mute(devc); /* Initialize some variables */
1484 ad_unmute(devc); /* Leave it unmuted now */
1486 if (devc->model > MD_1848)
1488 if (devc->model == MD_1845_SSCAPE)
1489 ad_write(devc, 12, ad_read(devc, 12) | 0x50);
1491 ad_write(devc, 12, ad_read(devc, 12) | 0x40); /* Mode2 = enabled */
1493 if (devc->model == MD_IWAVE)
1494 ad_write(devc, 12, 0x6c); /* Select codec mode 3 */
1496 if (devc->model != MD_1845_SSCAPE)
1497 for (i = 16; i < 32; i++)
1498 ad_write(devc, i, init_values[i]);
1500 if (devc->model == MD_IWAVE)
1501 ad_write(devc, 16, 0x30); /* Playback and capture counters enabled */
1503 if (devc->model > MD_1848)
1505 if (devc->audio_flags & DMA_DUPLEX)
1506 ad_write(devc, 9, ad_read(devc, 9) & ~0x04); /* Dual DMA mode */
1508 ad_write(devc, 9, ad_read(devc, 9) | 0x04); /* Single DMA mode */
1510 if (devc->model == MD_1845 || devc->model == MD_1845_SSCAPE)
1511 ad_write(devc, 27, ad_read(devc, 27) | 0x08); /* Alternate freq select enabled */
1513 if (devc->model == MD_IWAVE)
1514 { /* Some magic Interwave specific initialization */
1515 ad_write(devc, 12, 0x6c); /* Select codec mode 3 */
1516 ad_write(devc, 16, 0x30); /* Playback and capture counters enabled */
1517 ad_write(devc, 17, 0xc2); /* Alternate feature enable */
1522 devc->audio_flags &= ~DMA_DUPLEX;
1523 ad_write(devc, 9, ad_read(devc, 9) | 0x04); /* Single DMA mode */
1525 ad_write(devc, 12, ad_read(devc, 12) | 0x40); /* Mode2 = enabled */
1528 outb((0), io_Status(devc)); /* Clear pending interrupts */
1531 * Toggle the MCE bit. It completes the initialization phase.
1534 ad_enter_MCE(devc); /* In case the bit was off */
1537 ad1848_mixer_reset(devc);
1540 int ad1848_detect(int io_base, int *ad_flags, int *osp)
1543 ad1848_info *devc = &adev_info[nr_ad1848_devs];
1544 unsigned char tmp1 = 0xff, tmp2 = 0xff;
1545 int optiC930 = 0; /* OPTi 82C930 flag */
1547 int ad1847_flag = 0;
1548 int cs4248_flag = 0;
1549 int sscape_flag = 0;
1553 DDB(printk("ad1848_detect(%x)\n", io_base));
1557 if (*ad_flags == 0x12345678)
1563 if (*ad_flags == 0x87654321)
1569 if (*ad_flags == 0x12345677)
1575 if (nr_ad1848_devs >= MAX_AUDIO_DEV)
1577 printk(KERN_ERR "ad1848 - Too many audio devices\n");
1580 if (check_region(io_base, 4))
1582 printk(KERN_ERR "ad1848.c: Port %x not free.\n", io_base);
1585 spin_lock_init(&devc->lock);
1586 devc->base = io_base;
1588 devc->timer_running = 0;
1589 devc->MCE_bit = 0x40;
1591 devc->open_mode = 0;
1592 devc->chip_name = devc->name = "AD1848";
1593 devc->model = MD_1848; /* AD1848 or CS4248 */
1594 devc->levels = NULL;
1595 devc->debug_flag = 0;
1598 * Check that the I/O address is in use.
1600 * The bit 0x80 of the base I/O port is known to be 0 after the
1601 * chip has performed its power on initialization. Just assume
1602 * this has happened before the OS is starting.
1604 * If the I/O address is unused, it typically returns 0xff.
1607 if (inb(devc->base) == 0xff)
1609 DDB(printk("ad1848_detect: The base I/O address appears to be dead\n"));
1613 * Wait for the device to stop initialization
1616 DDB(printk("ad1848_detect() - step 0\n"));
1618 for (i = 0; i < 10000000; i++)
1620 unsigned char x = inb(devc->base);
1622 if (x == 0xff || !(x & 0x80))
1626 DDB(printk("ad1848_detect() - step A\n"));
1628 if (inb(devc->base) == 0x80) /* Not ready. Let's wait */
1631 if ((inb(devc->base) & 0x80) != 0x00) /* Not a AD1848 */
1633 DDB(printk("ad1848 detect error - step A (%02x)\n", (int) inb(devc->base)));
1638 * Test if it's possible to change contents of the indirect registers.
1639 * Registers 0 and 1 are ADC volume registers. The bit 0x10 is read only
1640 * so try to avoid using it.
1643 DDB(printk("ad1848_detect() - step B\n"));
1644 ad_write(devc, 0, 0xaa);
1645 ad_write(devc, 1, 0x45); /* 0x55 with bit 0x10 clear */
1647 if ((tmp1 = ad_read(devc, 0)) != 0xaa || (tmp2 = ad_read(devc, 1)) != 0x45)
1649 if (tmp2 == 0x65) /* AD1847 has couple of bits hardcoded to 1 */
1653 DDB(printk("ad1848 detect error - step B (%x/%x)\n", tmp1, tmp2));
1657 DDB(printk("ad1848_detect() - step C\n"));
1658 ad_write(devc, 0, 0x45);
1659 ad_write(devc, 1, 0xaa);
1661 if ((tmp1 = ad_read(devc, 0)) != 0x45 || (tmp2 = ad_read(devc, 1)) != 0xaa)
1663 if (tmp2 == 0x8a) /* AD1847 has few bits hardcoded to 1 */
1667 DDB(printk("ad1848 detect error - step C (%x/%x)\n", tmp1, tmp2));
1673 * The indirect register I12 has some read only bits. Let's
1674 * try to change them.
1677 DDB(printk("ad1848_detect() - step D\n"));
1678 tmp = ad_read(devc, 12);
1679 ad_write(devc, 12, (~tmp) & 0x0f);
1681 if ((tmp & 0x0f) != ((tmp1 = ad_read(devc, 12)) & 0x0f))
1683 DDB(printk("ad1848 detect error - step D (%x)\n", tmp1));
1688 * NOTE! Last 4 bits of the reg I12 tell the chip revision.
1689 * 0x01=RevB and 0x0A=RevC.
1693 * The original AD1848/CS4248 has just 15 indirect registers. This means
1694 * that I0 and I16 should return the same value (etc.).
1695 * However this doesn't work with CS4248. Actually it seems to be impossible
1696 * to detect if the chip is a CS4231 or CS4248.
1697 * Ensure that the Mode2 enable bit of I12 is 0. Otherwise this test fails
1702 * OPTi 82C930 has mode2 control bit in another place. This test will fail
1703 * with it. Accept this situation as a possible indication of this chip.
1706 DDB(printk("ad1848_detect() - step F\n"));
1707 ad_write(devc, 12, 0); /* Mode2=disabled */
1709 for (i = 0; i < 16; i++)
1711 if ((tmp1 = ad_read(devc, i)) != (tmp2 = ad_read(devc, i + 16)))
1713 DDB(printk("ad1848 detect step F(%d/%x/%x) - OPTi chip???\n", i, tmp1, tmp2));
1721 * Try to switch the chip to mode2 (CS4231) by setting the MODE2 bit (0x40).
1722 * The bit 0x80 is always 1 in CS4248 and CS4231.
1725 DDB(printk("ad1848_detect() - step G\n"));
1727 if (ad_flags && *ad_flags == 400)
1730 ad_write(devc, 12, 0x40); /* Set mode2, clear 0x80 */
1736 tmp1 = ad_read(devc, 12);
1740 *ad_flags |= AD_F_CS4248;
1742 devc->chip_name = "CS4248"; /* Our best knowledge just now */
1744 if (optiC930 || (tmp1 & 0xc0) == (0x80 | 0x40))
1747 * CS4231 detected - is it?
1749 * Verify that setting I0 doesn't change I16.
1752 DDB(printk("ad1848_detect() - step H\n"));
1753 ad_write(devc, 16, 0); /* Set I16 to known value */
1755 ad_write(devc, 0, 0x45);
1756 if ((tmp1 = ad_read(devc, 16)) != 0x45) /* No change -> CS4231? */
1758 ad_write(devc, 0, 0xaa);
1759 if ((tmp1 = ad_read(devc, 16)) == 0xaa) /* Rotten bits? */
1761 DDB(printk("ad1848 detect error - step H(%x)\n", tmp1));
1766 * Verify that some bits of I25 are read only.
1769 DDB(printk("ad1848_detect() - step I\n"));
1770 tmp1 = ad_read(devc, 25); /* Original bits */
1771 ad_write(devc, 25, ~tmp1); /* Invert all bits */
1772 if ((ad_read(devc, 25) & 0xe7) == (tmp1 & 0xe7))
1777 * It's at least CS4231
1780 devc->chip_name = "CS4231";
1781 devc->model = MD_4231;
1784 * It could be an AD1845 or CS4231A as well.
1785 * CS4231 and AD1845 report the same revision info in I25
1786 * while the CS4231A reports different.
1789 id = ad_read(devc, 25);
1790 if ((id & 0xe7) == 0x80) /* Device busy??? */
1791 id = ad_read(devc, 25);
1792 if ((id & 0xe7) == 0x80) /* Device still busy??? */
1793 id = ad_read(devc, 25);
1794 DDB(printk("ad1848_detect() - step J (%02x/%02x)\n", id, ad_read(devc, 25)));
1796 if ((id & 0xe7) == 0x80) {
1798 * It must be a CS4231 or AD1845. The register I23 of
1799 * CS4231 is undefined and it appears to be read only.
1800 * AD1845 uses I23 for setting sample rate. Assume
1801 * the chip is AD1845 if I23 is changeable.
1804 unsigned char tmp = ad_read(devc, 23);
1805 ad_write(devc, 23, ~tmp);
1809 devc->model = MD_IWAVE;
1810 devc->chip_name = "IWave";
1812 else if (ad_read(devc, 23) != tmp) /* AD1845 ? */
1814 devc->chip_name = "AD1845";
1815 devc->model = MD_1845;
1817 else if (cs4248_flag)
1820 *ad_flags |= AD_F_CS4248;
1821 devc->chip_name = "CS4248";
1822 devc->model = MD_1848;
1823 ad_write(devc, 12, ad_read(devc, 12) & ~0x40); /* Mode2 off */
1825 ad_write(devc, 23, tmp); /* Restore */
1829 switch (id & 0x1f) {
1830 case 3: /* CS4236/CS4235/CS42xB/CS4239 */
1833 ad_write(devc, 12, ad_read(devc, 12) | 0x60); /* switch to mode 3 */
1834 ad_write(devc, 23, 0x9c); /* select extended register 25 */
1835 xid = inb(io_Indexed_Data(devc));
1836 ad_write(devc, 12, ad_read(devc, 12) & ~0x60); /* back to mode 0 */
1840 devc->chip_name = "CS4237B(B)";
1841 devc->model = MD_42xB;
1844 /* Seems to be a 4238 ?? */
1845 devc->chip_name = "CS4238";
1846 devc->model = MD_42xB;
1849 devc->chip_name = "CS4238B";
1850 devc->model = MD_42xB;
1853 devc->chip_name = "CS4236B";
1854 devc->model = MD_4236;
1857 devc->chip_name = "CS4237B";
1858 devc->model = MD_42xB;
1861 devc->chip_name = "CS4235";
1862 devc->model = MD_4235;
1865 devc->chip_name = "CS4239";
1866 devc->model = MD_4239;
1869 printk("Chip ident is %X.\n", xid&0x1F);
1870 devc->chip_name = "CS42xx";
1871 devc->model = MD_4232;
1877 case 2: /* CS4232/CS4232A */
1878 devc->chip_name = "CS4232";
1879 devc->model = MD_4232;
1883 if ((id & 0xe0) == 0xa0)
1885 devc->chip_name = "CS4231A";
1886 devc->model = MD_4231A;
1890 devc->chip_name = "CS4321";
1891 devc->model = MD_4231;
1895 default: /* maybe */
1896 DDB(printk("ad1848: I25 = %02x/%02x\n", ad_read(devc, 25), ad_read(devc, 25) & 0xe7));
1899 devc->chip_name = "82C930";
1900 devc->model = MD_C930;
1904 devc->chip_name = "CS4231";
1905 devc->model = MD_4231;
1910 ad_write(devc, 25, tmp1); /* Restore bits */
1912 DDB(printk("ad1848_detect() - step K\n"));
1914 } else if (tmp1 == 0x0a) {
1916 * Is it perhaps a SoundPro CMI8330?
1917 * If so, then we should be able to change indirect registers
1918 * greater than I15 after activating MODE2, even though reading
1919 * back I12 does not show it.
1923 * Let's try comparing register values
1925 for (i = 0; i < 16; i++) {
1926 if ((tmp1 = ad_read(devc, i)) != (tmp2 = ad_read(devc, i + 16))) {
1927 DDB(printk("ad1848 detect step H(%d/%x/%x) - SoundPro chip?\n", i, tmp1, tmp2));
1929 devc->chip_name = "SoundPro CMI 8330";
1935 DDB(printk("ad1848_detect() - step L\n"));
1938 if (devc->model != MD_1848)
1939 *ad_flags |= AD_F_CS4231;
1941 DDB(printk("ad1848_detect() - Detected OK\n"));
1943 if (devc->model == MD_1848 && ad1847_flag)
1944 devc->chip_name = "AD1847";
1947 if (sscape_flag == 1)
1948 devc->model = MD_1845_SSCAPE;
1953 int ad1848_init (char *name, int io_base, int irq, int dma_playback,
1954 int dma_capture, int share_dma, int *osp, struct module *owner)
1957 * NOTE! If irq < 0, there is another driver which has allocated the IRQ
1958 * so that this driver doesn't need to allocate/deallocate it.
1959 * The actually used IRQ is ABS(irq).
1966 ad1848_info *devc = &adev_info[nr_ad1848_devs];
1968 ad1848_port_info *portc = NULL;
1970 devc->irq = (irq > 0) ? irq : 0;
1971 devc->open_mode = 0;
1972 devc->timer_ticks = 0;
1973 devc->dma1 = dma_playback;
1974 devc->dma2 = dma_capture;
1975 devc->subtype = cfg.card_subtype;
1976 devc->audio_flags = DMA_AUTOMODE;
1977 devc->playback_dev = devc->record_dev = 0;
1981 if (name != NULL && name[0] != 0)
1983 "%s (%s)", name, devc->chip_name);
1986 "Generic audio codec (%s)", devc->chip_name);
1988 if (!request_region(devc->base, 4, devc->name))
1991 conf_printf2(dev_name, devc->base, devc->irq, dma_playback, dma_capture);
1993 if (devc->model == MD_1848 || devc->model == MD_C930)
1994 devc->audio_flags |= DMA_HARDSTOP;
1996 if (devc->model > MD_1848)
1998 if (devc->dma1 == devc->dma2 || devc->dma2 == -1 || devc->dma1 == -1)
1999 devc->audio_flags &= ~DMA_DUPLEX;
2001 devc->audio_flags |= DMA_DUPLEX;
2004 portc = (ad1848_port_info *) kmalloc(sizeof(ad1848_port_info), GFP_KERNEL);
2006 release_region(devc->base, 4);
2010 if ((my_dev = sound_install_audiodrv(AUDIO_DRIVER_VERSION,
2012 &ad1848_audio_driver,
2013 sizeof(struct audio_driver),
2015 ad_format_mask[devc->model],
2020 release_region(devc->base, 4);
2025 audio_devs[my_dev]->portc = portc;
2026 audio_devs[my_dev]->mixer_dev = -1;
2028 audio_devs[my_dev]->d->owner = owner;
2029 memset((char *) portc, 0, sizeof(*portc));
2033 devc->pmdev = pm_register(PM_ISA_DEV, my_dev, ad1848_pm_callback);
2035 devc->pmdev->data = devc;
2037 ad1848_init_hw(devc);
2041 devc->dev_no = my_dev;
2042 if (request_irq(devc->irq, adintr, 0, devc->name, (void *)my_dev) < 0)
2044 printk(KERN_WARNING "ad1848: Unable to allocate IRQ\n");
2045 /* Don't free it either then.. */
2048 if (capabilities[devc->model].flags & CAP_F_TIMER)
2052 unsigned char tmp = ad_read(devc, 16);
2055 devc->timer_ticks = 0;
2057 ad_write(devc, 21, 0x00); /* Timer MSB */
2058 ad_write(devc, 20, 0x10); /* Timer LSB */
2060 ad_write(devc, 16, tmp | 0x40); /* Enable timer */
2061 for (x = 0; x < 100000 && devc->timer_ticks == 0; x++);
2062 ad_write(devc, 16, tmp & ~0x40); /* Disable timer */
2064 if (devc->timer_ticks == 0)
2065 printk(KERN_WARNING "ad1848: Interrupt test failed (IRQ%d)\n", irq);
2068 DDB(printk("Interrupt test OK\n"));
2076 devc->irq_ok = 1; /* Couldn't test. assume it's OK */
2078 irq2dev[-irq] = devc->dev_no = my_dev;
2080 #ifndef EXCLUDE_TIMERS
2081 if ((capabilities[devc->model].flags & CAP_F_TIMER) &&
2083 ad1848_tmr_install(my_dev);
2088 if (sound_alloc_dma(dma_playback, devc->name))
2089 printk(KERN_WARNING "ad1848.c: Can't allocate DMA%d\n", dma_playback);
2091 if (dma_capture != dma_playback)
2092 if (sound_alloc_dma(dma_capture, devc->name))
2093 printk(KERN_WARNING "ad1848.c: Can't allocate DMA%d\n", dma_capture);
2096 if ((e = sound_install_mixer(MIXER_DRIVER_VERSION,
2098 &ad1848_mixer_operations,
2099 sizeof(struct mixer_operations),
2102 audio_devs[my_dev]->mixer_dev = e;
2104 mixer_devs[e]->owner = owner;
2109 int ad1848_control(int cmd, int arg)
2112 unsigned long flags;
2114 if (nr_ad1848_devs < 1)
2117 devc = &adev_info[nr_ad1848_devs - 1];
2121 case AD1848_SET_XTAL: /* Change clock frequency of AD1845 (only ) */
2122 if (devc->model != MD_1845 || devc->model != MD_1845_SSCAPE)
2124 spin_lock_irqsave(&devc->lock,flags);
2126 ad_write(devc, 29, (ad_read(devc, 29) & 0x1f) | (arg << 5));
2128 spin_unlock_irqrestore(&devc->lock,flags);
2131 case AD1848_MIXER_REROUTE:
2133 int o = (arg >> 8) & 0xff;
2136 if (o < 0 || o >= SOUND_MIXER_NRDEVICES)
2139 if (!(devc->supported_devices & (1 << o)) &&
2140 !(devc->supported_rec_devices & (1 << o)))
2143 if (n == SOUND_MIXER_NONE)
2144 { /* Just hide this control */
2145 ad1848_mixer_set(devc, o, 0); /* Shut up it */
2146 devc->supported_devices &= ~(1 << o);
2147 devc->supported_rec_devices &= ~(1 << o);
2151 /* Make the mixer control identified by o to appear as n */
2152 if (n < 0 || n >= SOUND_MIXER_NRDEVICES)
2155 devc->mixer_reroute[n] = o; /* Rename the control */
2156 if (devc->supported_devices & (1 << o))
2157 devc->supported_devices |= (1 << n);
2158 if (devc->supported_rec_devices & (1 << o))
2159 devc->supported_rec_devices |= (1 << n);
2161 devc->supported_devices &= ~(1 << o);
2162 devc->supported_rec_devices &= ~(1 << o);
2169 void ad1848_unload(int io_base, int irq, int dma_playback, int dma_capture, int share_dma)
2171 int i, mixer, dev = 0;
2172 ad1848_info *devc = NULL;
2174 for (i = 0; devc == NULL && i < nr_ad1848_devs; i++)
2176 if (adev_info[i].base == io_base)
2178 devc = &adev_info[i];
2185 if(audio_devs[dev]->portc!=NULL)
2186 kfree(audio_devs[dev]->portc);
2187 release_region(devc->base, 4);
2191 if (devc->irq > 0) /* There is no point in freeing irq, if it wasn't allocated */
2192 free_irq(devc->irq, (void *)devc->dev_no);
2194 sound_free_dma(dma_playback);
2196 if (dma_playback != dma_capture)
2197 sound_free_dma(dma_capture);
2200 mixer = audio_devs[devc->dev_no]->mixer_dev;
2202 sound_unload_mixerdev(mixer);
2205 pm_unregister(devc->pmdev);
2208 for ( ; i < nr_ad1848_devs ; i++)
2209 adev_info[i] = adev_info[i+1];
2212 printk(KERN_ERR "ad1848: Can't find device to be unloaded. Base=%x\n", io_base);
2215 irqreturn_t adintr(int irq, void *dev_id, struct pt_regs *dummy)
2217 unsigned char status;
2220 int alt_stat = 0xff;
2221 unsigned char c930_stat = 0;
2225 devc = (ad1848_info *) audio_devs[dev]->devc;
2227 interrupt_again: /* Jump back here if int status doesn't reset */
2229 status = inb(io_Status(devc));
2232 printk(KERN_DEBUG "adintr: Why?\n");
2233 if (devc->model == MD_1848)
2234 outb((0), io_Status(devc)); /* Clear interrupt status */
2238 if (devc->model == MD_C930)
2239 { /* 82C930 has interrupt status register in MAD16 register MC11 */
2241 spin_lock(&devc->lock);
2243 /* 0xe0e is C930 address port
2244 * 0xe0f is C930 data port
2247 c930_stat = inb(0xe0f);
2248 outb((~c930_stat), 0xe0f);
2250 spin_unlock(&devc->lock);
2252 alt_stat = (c930_stat << 2) & 0x30;
2254 else if (devc->model != MD_1848)
2256 spin_lock(&devc->lock);
2257 alt_stat = ad_read(devc, 24);
2258 ad_write(devc, 24, ad_read(devc, 24) & ~alt_stat); /* Selective ack */
2259 spin_unlock(&devc->lock);
2262 if ((devc->open_mode & OPEN_READ) && (devc->audio_mode & PCM_ENABLE_INPUT) && (alt_stat & 0x20))
2264 DMAbuf_inputintr(devc->record_dev);
2266 if ((devc->open_mode & OPEN_WRITE) && (devc->audio_mode & PCM_ENABLE_OUTPUT) &&
2269 DMAbuf_outputintr(devc->playback_dev, 1);
2271 if (devc->model != MD_1848 && (alt_stat & 0x40)) /* Timer interrupt */
2273 devc->timer_ticks++;
2274 #ifndef EXCLUDE_TIMERS
2275 if (timer_installed == dev && devc->timer_running)
2276 sound_timer_interrupt();
2281 * Sometimes playback or capture interrupts occur while a timer interrupt
2282 * is being handled. The interrupt will not be retriggered if we don't
2283 * handle it now. Check if an interrupt is still pending and restart
2284 * the handler in this case.
2286 if (inb(io_Status(devc)) & 0x01 && cnt++ < 4)
2288 goto interrupt_again;
2294 * Experimental initialization sequence for the integrated sound system
2295 * of the Compaq Deskpro M.
2298 static int init_deskpro_m(struct address_info *hw_config)
2302 if ((tmp = inb(0xc44)) == 0xff)
2304 DDB(printk("init_deskpro_m: Dead port 0xc44\n"));
2322 * Experimental initialization sequence for the integrated sound system
2323 * of Compaq Deskpro XL.
2326 static int init_deskpro(struct address_info *hw_config)
2330 if ((tmp = inb(0xc44)) == 0xff)
2332 DDB(printk("init_deskpro: Dead port 0xc44\n"));
2335 outb((tmp | 0x04), 0xc44); /* Select bank 1 */
2336 if (inb(0xc44) != 0x04)
2338 DDB(printk("init_deskpro: Invalid bank1 signature in port 0xc44\n"));
2342 * OK. It looks like a Deskpro so let's proceed.
2346 * I/O port 0xc44 Audio configuration register.
2348 * bits 0xc0: Audio revision bits
2349 * 0x00 = Compaq Business Audio
2350 * 0x40 = MS Sound System Compatible (reset default)
2353 * bit 0x20: No Wait State Enable
2354 * 0x00 = Disabled (reset default, DMA mode)
2355 * 0x20 = Enabled (programmed I/O mode)
2356 * bit 0x10: MS Sound System Decode Enable
2357 * 0x00 = Decoding disabled (reset default)
2358 * 0x10 = Decoding enabled
2359 * bit 0x08: FM Synthesis Decode Enable
2360 * 0x00 = Decoding Disabled (reset default)
2361 * 0x08 = Decoding enabled
2362 * bit 0x04 Bank select
2365 * bits 0x03 MSS Base address
2366 * 0x00 = 0x530 (reset default)
2373 /* Debug printing */
2374 printk("Port 0xc44 (before): ");
2375 outb((tmp & ~0x04), 0xc44);
2376 printk("%02x ", inb(0xc44));
2377 outb((tmp | 0x04), 0xc44);
2378 printk("%02x\n", inb(0xc44));
2381 /* Set bank 1 of the register */
2382 tmp = 0x58; /* MSS Mode, MSS&FM decode enabled */
2384 switch (hw_config->io_base)
2399 DDB(printk("init_deskpro: Invalid MSS port %x\n", hw_config->io_base));
2402 outb((tmp & ~0x04), 0xc44); /* Write to bank=0 */
2405 /* Debug printing */
2406 printk("Port 0xc44 (after): ");
2407 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */
2408 printk("%02x ", inb(0xc44));
2409 outb((tmp | 0x04), 0xc44); /* Select bank=1 */
2410 printk("%02x\n", inb(0xc44));
2414 * I/O port 0xc45 FM Address Decode/MSS ID Register.
2416 * bank=0, bits 0xfe: FM synthesis Decode Compare bits 7:1 (default=0x88)
2417 * bank=0, bit 0x01: SBIC Power Control Bit
2419 * 0x01 = Powered down
2420 * bank=1, bits 0xfc: MSS ID (default=0x40)
2424 /* Debug printing */
2425 printk("Port 0xc45 (before): ");
2426 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */
2427 printk("%02x ", inb(0xc45));
2428 outb((tmp | 0x04), 0xc44); /* Select bank=1 */
2429 printk("%02x\n", inb(0xc45));
2432 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */
2433 outb((0x88), 0xc45); /* FM base 7:0 = 0x88 */
2434 outb((tmp | 0x04), 0xc44); /* Select bank=1 */
2435 outb((0x10), 0xc45); /* MSS ID = 0x10 (MSS port returns 0x04) */
2438 /* Debug printing */
2439 printk("Port 0xc45 (after): ");
2440 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */
2441 printk("%02x ", inb(0xc45));
2442 outb((tmp | 0x04), 0xc44); /* Select bank=1 */
2443 printk("%02x\n", inb(0xc45));
2448 * I/O port 0xc46 FM Address Decode/Address ASIC Revision Register.
2450 * bank=0, bits 0xff: FM synthesis Decode Compare bits 15:8 (default=0x03)
2451 * bank=1, bits 0xff: Audio addressing ASIC id
2455 /* Debug printing */
2456 printk("Port 0xc46 (before): ");
2457 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */
2458 printk("%02x ", inb(0xc46));
2459 outb((tmp | 0x04), 0xc44); /* Select bank=1 */
2460 printk("%02x\n", inb(0xc46));
2463 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */
2464 outb((0x03), 0xc46); /* FM base 15:8 = 0x03 */
2465 outb((tmp | 0x04), 0xc44); /* Select bank=1 */
2466 outb((0x11), 0xc46); /* ASIC ID = 0x11 */
2469 /* Debug printing */
2470 printk("Port 0xc46 (after): ");
2471 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */
2472 printk("%02x ", inb(0xc46));
2473 outb((tmp | 0x04), 0xc44); /* Select bank=1 */
2474 printk("%02x\n", inb(0xc46));
2478 * I/O port 0xc47 FM Address Decode Register.
2480 * bank=0, bits 0xff: Decode enable selection for various FM address bits
2481 * bank=1, bits 0xff: Reserved
2485 /* Debug printing */
2486 printk("Port 0xc47 (before): ");
2487 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */
2488 printk("%02x ", inb(0xc47));
2489 outb((tmp | 0x04), 0xc44); /* Select bank=1 */
2490 printk("%02x\n", inb(0xc47));
2493 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */
2494 outb((0x7c), 0xc47); /* FM decode enable bits = 0x7c */
2495 outb((tmp | 0x04), 0xc44); /* Select bank=1 */
2496 outb((0x00), 0xc47); /* Reserved bank1 = 0x00 */
2499 /* Debug printing */
2500 printk("Port 0xc47 (after): ");
2501 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */
2502 printk("%02x ", inb(0xc47));
2503 outb((tmp | 0x04), 0xc44); /* Select bank=1 */
2504 printk("%02x\n", inb(0xc47));
2508 * I/O port 0xc6f = Audio Disable Function Register
2512 printk("Port 0xc6f (before) = %02x\n", inb(0xc6f));
2515 outb((0x80), 0xc6f);
2518 printk("Port 0xc6f (after) = %02x\n", inb(0xc6f));
2524 int probe_ms_sound(struct address_info *hw_config)
2528 DDB(printk("Entered probe_ms_sound(%x, %d)\n", hw_config->io_base, hw_config->card_subtype));
2530 if (check_region(hw_config->io_base, 8))
2532 printk(KERN_ERR "MSS: I/O port conflict\n");
2535 if (hw_config->card_subtype == 1) /* Has no IRQ/DMA registers */
2537 /* check_opl3(0x388, hw_config); */
2538 return ad1848_detect(hw_config->io_base + 4, NULL, hw_config->osp);
2541 if (deskpro_xl && hw_config->card_subtype == 2) /* Compaq Deskpro XL */
2543 if (!init_deskpro(hw_config))
2547 if (deskpro_m) /* Compaq Deskpro M */
2549 if (!init_deskpro_m(hw_config))
2554 * Check if the IO port returns valid signature. The original MS Sound
2555 * system returns 0x04 while some cards (AudioTrix Pro for example)
2556 * return 0x00 or 0x0f.
2559 if ((tmp = inb(hw_config->io_base + 3)) == 0xff) /* Bus float */
2563 DDB(printk("I/O address is inactive (%x)\n", tmp));
2564 if (!(ret = ad1848_detect(hw_config->io_base + 4, NULL, hw_config->osp)))
2568 DDB(printk("MSS signature = %x\n", tmp & 0x3f));
2569 if ((tmp & 0x3f) != 0x04 &&
2570 (tmp & 0x3f) != 0x0f &&
2571 (tmp & 0x3f) != 0x00)
2575 MDB(printk(KERN_ERR "No MSS signature detected on port 0x%x (0x%x)\n", hw_config->io_base, (int) inb(hw_config->io_base + 3)));
2576 DDB(printk("Trying to detect codec anyway but IRQ/DMA may not work\n"));
2577 if (!(ret = ad1848_detect(hw_config->io_base + 4, NULL, hw_config->osp)))
2580 hw_config->card_subtype = 1;
2583 if ((hw_config->irq != 5) &&
2584 (hw_config->irq != 7) &&
2585 (hw_config->irq != 9) &&
2586 (hw_config->irq != 10) &&
2587 (hw_config->irq != 11) &&
2588 (hw_config->irq != 12))
2590 printk(KERN_ERR "MSS: Bad IRQ %d\n", hw_config->irq);
2593 if (hw_config->dma != 0 && hw_config->dma != 1 && hw_config->dma != 3)
2595 printk(KERN_ERR "MSS: Bad DMA %d\n", hw_config->dma);
2599 * Check that DMA0 is not in use with a 8 bit board.
2602 if (hw_config->dma == 0 && inb(hw_config->io_base + 3) & 0x80)
2604 printk(KERN_ERR "MSS: Can't use DMA0 with a 8 bit card/slot\n");
2607 if (hw_config->irq > 7 && hw_config->irq != 9 && inb(hw_config->io_base + 3) & 0x80)
2609 printk(KERN_ERR "MSS: Can't use IRQ%d with a 8 bit card/slot\n", hw_config->irq);
2612 return ad1848_detect(hw_config->io_base + 4, NULL, hw_config->osp);
2615 void attach_ms_sound(struct address_info *hw_config, struct module *owner)
2617 static signed char interrupt_bits[12] =
2619 -1, -1, -1, -1, -1, 0x00, -1, 0x08, -1, 0x10, 0x18, 0x20
2624 static char dma_bits[4] =
2629 int config_port = hw_config->io_base + 0;
2630 int version_port = hw_config->io_base + 3;
2631 int dma = hw_config->dma;
2632 int dma2 = hw_config->dma2;
2634 if (hw_config->card_subtype == 1) /* Has no IRQ/DMA registers */
2636 hw_config->slots[0] = ad1848_init("MS Sound System", hw_config->io_base + 4,
2642 request_region(hw_config->io_base, 4, "WSS config");
2646 * Set the IRQ and DMA addresses.
2649 bits = interrupt_bits[hw_config->irq];
2652 printk(KERN_ERR "MSS: Bad IRQ %d\n", hw_config->irq);
2655 outb((bits | 0x40), config_port);
2656 if ((inb(version_port) & 0x40) == 0)
2657 printk(KERN_ERR "[MSS: IRQ Conflict?]\n");
2660 * Handle the capture DMA channel
2663 if (dma2 != -1 && dma2 != dma)
2665 if (!((dma == 0 && dma2 == 1) ||
2666 (dma == 1 && dma2 == 0) ||
2667 (dma == 3 && dma2 == 0)))
2668 { /* Unsupported combination. Try to swap channels */
2674 if ((dma == 0 && dma2 == 1) ||
2675 (dma == 1 && dma2 == 0) ||
2676 (dma == 3 && dma2 == 0))
2678 dma2_bit = 0x04; /* Enable capture DMA */
2682 printk(KERN_WARNING "MSS: Invalid capture DMA\n");
2691 hw_config->dma = dma;
2692 hw_config->dma2 = dma2;
2694 outb((bits | dma_bits[dma] | dma2_bit), config_port); /* Write IRQ+DMA setup */
2696 hw_config->slots[0] = ad1848_init("MS Sound System", hw_config->io_base + 4,
2701 request_region(hw_config->io_base, 4, "WSS config");
2704 void unload_ms_sound(struct address_info *hw_config)
2706 ad1848_unload(hw_config->io_base + 4,
2709 hw_config->dma2, 0);
2710 sound_unload_audiodev(hw_config->slots[0]);
2711 release_region(hw_config->io_base, 4);
2714 #ifndef EXCLUDE_TIMERS
2717 * Timer stuff (for /dev/music).
2720 static unsigned int current_interval;
2722 static unsigned int ad1848_tmr_start(int dev, unsigned int usecs)
2724 unsigned long flags;
2725 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
2726 unsigned long xtal_nsecs; /* nanoseconds per xtal oscillator tick */
2727 unsigned long divider;
2729 spin_lock_irqsave(&devc->lock,flags);
2732 * Length of the timer interval (in nanoseconds) depends on the
2733 * selected crystal oscillator. Check this from bit 0x01 of I8.
2735 * AD1845 has just one oscillator which has cycle time of 10.050 us
2736 * (when a 24.576 MHz xtal oscillator is used).
2738 * Convert requested interval to nanoseconds before computing
2739 * the timer divider.
2742 if (devc->model == MD_1845 || devc->model == MD_1845_SSCAPE)
2744 else if (ad_read(devc, 8) & 0x01)
2749 divider = (usecs * 1000 + xtal_nsecs / 2) / xtal_nsecs;
2751 if (divider < 100) /* Don't allow shorter intervals than about 1ms */
2754 if (divider > 65535) /* Overflow check */
2757 ad_write(devc, 21, (divider >> 8) & 0xff); /* Set upper bits */
2758 ad_write(devc, 20, divider & 0xff); /* Set lower bits */
2759 ad_write(devc, 16, ad_read(devc, 16) | 0x40); /* Start the timer */
2760 devc->timer_running = 1;
2761 spin_unlock_irqrestore(&devc->lock,flags);
2763 return current_interval = (divider * xtal_nsecs + 500) / 1000;
2766 static void ad1848_tmr_reprogram(int dev)
2769 * Audio driver has changed sampling rate so that a different xtal
2770 * oscillator was selected. We have to reprogram the timer rate.
2773 ad1848_tmr_start(dev, current_interval);
2774 sound_timer_syncinterval(current_interval);
2777 static void ad1848_tmr_disable(int dev)
2779 unsigned long flags;
2780 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
2782 spin_lock_irqsave(&devc->lock,flags);
2783 ad_write(devc, 16, ad_read(devc, 16) & ~0x40);
2784 devc->timer_running = 0;
2785 spin_unlock_irqrestore(&devc->lock,flags);
2788 static void ad1848_tmr_restart(int dev)
2790 unsigned long flags;
2791 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
2793 if (current_interval == 0)
2796 spin_lock_irqsave(&devc->lock,flags);
2797 ad_write(devc, 16, ad_read(devc, 16) | 0x40);
2798 devc->timer_running = 1;
2799 spin_unlock_irqrestore(&devc->lock,flags);
2802 static struct sound_lowlev_timer ad1848_tmr =
2811 static int ad1848_tmr_install(int dev)
2813 if (timer_installed != -1)
2814 return 0; /* Don't install another timer */
2816 timer_installed = ad1848_tmr.dev = dev;
2817 sound_timer_init(&ad1848_tmr, audio_devs[dev]->name);
2821 #endif /* EXCLUDE_TIMERS */
2823 static int ad1848_suspend(ad1848_info *devc)
2825 unsigned long flags;
2827 spin_lock_irqsave(&devc->lock,flags);
2831 spin_unlock_irqrestore(&devc->lock,flags);
2835 static int ad1848_resume(ad1848_info *devc)
2837 int mixer_levels[32], i;
2839 /* Thinkpad is a bit more of PITA than normal. The BIOS tends to
2840 restore it in a different config to the one we use. Need to
2843 /* store old mixer levels */
2844 memcpy(mixer_levels, devc->levels, sizeof (mixer_levels));
2845 ad1848_init_hw(devc);
2847 /* restore mixer levels */
2848 for (i = 0; i < 32; i++)
2849 ad1848_mixer_set(devc, devc->dev_no, mixer_levels[i]);
2851 if (!devc->subtype) {
2852 static signed char interrupt_bits[12] = { -1, -1, -1, -1, -1, 0x00, -1, 0x08, -1, 0x10, 0x18, 0x20 };
2853 static char dma_bits[4] = { 1, 2, 0, 3 };
2854 unsigned long flags;
2858 int config_port = devc->base + 0;
2860 bits = interrupt_bits[devc->irq];
2862 printk(KERN_ERR "MSS: Bad IRQ %d\n", devc->irq);
2866 spin_lock_irqsave(&devc->lock,flags);
2868 outb((bits | 0x40), config_port);
2870 if (devc->dma2 != -1 && devc->dma2 != devc->dma1)
2871 if ( (devc->dma1 == 0 && devc->dma2 == 1) ||
2872 (devc->dma1 == 1 && devc->dma2 == 0) ||
2873 (devc->dma1 == 3 && devc->dma2 == 0))
2876 outb((bits | dma_bits[devc->dma1] | dma2_bit), config_port);
2877 spin_unlock_irqrestore(&devc->lock,flags);
2883 static int ad1848_pm_callback(struct pm_dev *dev, pm_request_t rqst, void *data)
2885 ad1848_info *devc = dev->data;
2887 DEB(printk("ad1848: pm event received: 0x%x\n", rqst));
2891 ad1848_suspend(devc);
2894 ad1848_resume(devc);
2902 EXPORT_SYMBOL(ad1848_detect);
2903 EXPORT_SYMBOL(ad1848_init);
2904 EXPORT_SYMBOL(ad1848_unload);
2905 EXPORT_SYMBOL(ad1848_control);
2906 EXPORT_SYMBOL(adintr);
2907 EXPORT_SYMBOL(probe_ms_sound);
2908 EXPORT_SYMBOL(attach_ms_sound);
2909 EXPORT_SYMBOL(unload_ms_sound);
2911 static int __initdata io = -1;
2912 static int __initdata irq = -1;
2913 static int __initdata dma = -1;
2914 static int __initdata dma2 = -1;
2915 static int __initdata type = 0;
2917 MODULE_PARM(io, "i"); /* I/O for a raw AD1848 card */
2918 MODULE_PARM(irq, "i"); /* IRQ to use */
2919 MODULE_PARM(dma, "i"); /* First DMA channel */
2920 MODULE_PARM(dma2, "i"); /* Second DMA channel */
2921 MODULE_PARM(type, "i"); /* Card type */
2922 MODULE_PARM(deskpro_xl, "i"); /* Special magic for Deskpro XL boxen */
2923 MODULE_PARM(deskpro_m, "i"); /* Special magic for Deskpro M box */
2924 MODULE_PARM(soundpro, "i"); /* More special magic for SoundPro chips */
2927 MODULE_PARM(isapnp, "i");
2928 MODULE_PARM(isapnpjump, "i");
2929 MODULE_PARM(reverse, "i");
2930 MODULE_PARM_DESC(isapnp, "When set to 0, Plug & Play support will be disabled");
2931 MODULE_PARM_DESC(isapnpjump, "Jumps to a specific slot in the driver's PnP table. Use the source, Luke.");
2932 MODULE_PARM_DESC(reverse, "When set to 1, will reverse ISAPnP search order");
2934 struct pnp_dev *ad1848_dev = NULL;
2936 /* Please add new entries at the end of the table */
2939 unsigned short card_vendor, card_device,
2941 short mss_io, irq, dma, dma2; /* index into isapnp table */
2943 } ad1848_isapnp_list[] __initdata = {
2944 {"CMI 8330 SoundPRO",
2945 ISAPNP_VENDOR('C','M','I'), ISAPNP_DEVICE(0x0001),
2946 ISAPNP_VENDOR('@','@','@'), ISAPNP_FUNCTION(0x0001),
2948 {"CS4232 based card",
2949 ISAPNP_ANY_ID, ISAPNP_ANY_ID,
2950 ISAPNP_VENDOR('C','S','C'), ISAPNP_FUNCTION(0x0000),
2952 {"CS4232 based card",
2953 ISAPNP_ANY_ID, ISAPNP_ANY_ID,
2954 ISAPNP_VENDOR('C','S','C'), ISAPNP_FUNCTION(0x0100),
2956 {"OPL3-SA2 WSS mode",
2957 ISAPNP_ANY_ID, ISAPNP_ANY_ID,
2958 ISAPNP_VENDOR('Y','M','H'), ISAPNP_FUNCTION(0x0021),
2960 {"Advanced Gravis InterWave Audio",
2961 ISAPNP_VENDOR('G','R','V'), ISAPNP_DEVICE(0x0001),
2962 ISAPNP_VENDOR('G','R','V'), ISAPNP_FUNCTION(0x0000),
2967 static struct isapnp_device_id id_table[] __devinitdata = {
2968 { ISAPNP_VENDOR('C','M','I'), ISAPNP_DEVICE(0x0001),
2969 ISAPNP_VENDOR('@','@','@'), ISAPNP_FUNCTION(0x0001), 0 },
2970 { ISAPNP_ANY_ID, ISAPNP_ANY_ID,
2971 ISAPNP_VENDOR('C','S','C'), ISAPNP_FUNCTION(0x0000), 0 },
2972 { ISAPNP_ANY_ID, ISAPNP_ANY_ID,
2973 ISAPNP_VENDOR('C','S','C'), ISAPNP_FUNCTION(0x0100), 0 },
2974 /* The main driver for this card is opl3sa2
2975 { ISAPNP_ANY_ID, ISAPNP_ANY_ID,
2976 ISAPNP_VENDOR('Y','M','H'), ISAPNP_FUNCTION(0x0021), 0 },
2978 { ISAPNP_VENDOR('G','R','V'), ISAPNP_DEVICE(0x0001),
2979 ISAPNP_VENDOR('G','R','V'), ISAPNP_FUNCTION(0x0000), 0 },
2983 MODULE_DEVICE_TABLE(isapnp, id_table);
2985 static struct pnp_dev *activate_dev(char *devname, char *resname, struct pnp_dev *dev)
2989 err = pnp_device_attach(dev);
2993 if((err = pnp_activate_dev(dev)) < 0) {
2994 printk(KERN_ERR "ad1848: %s %s config failed (out of resources?)[%d]\n", devname, resname, err);
2996 pnp_device_detach(dev);
3000 audio_activated = 1;
3004 static struct pnp_dev *ad1848_init_generic(struct pnp_card *bus, struct address_info *hw_config, int slot)
3007 /* Configure Audio device */
3008 if((ad1848_dev = pnp_find_dev(bus, ad1848_isapnp_list[slot].vendor, ad1848_isapnp_list[slot].function, NULL)))
3010 if((ad1848_dev = activate_dev(ad1848_isapnp_list[slot].name, "ad1848", ad1848_dev)))
3012 hw_config->io_base = pnp_port_start(ad1848_dev, ad1848_isapnp_list[slot].mss_io);
3013 hw_config->irq = pnp_irq(ad1848_dev, ad1848_isapnp_list[slot].irq);
3014 hw_config->dma = pnp_dma(ad1848_dev, ad1848_isapnp_list[slot].dma);
3015 if(ad1848_isapnp_list[slot].dma2 != -1)
3016 hw_config->dma2 = pnp_dma(ad1848_dev, ad1848_isapnp_list[slot].dma2);
3018 hw_config->dma2 = -1;
3019 hw_config->card_subtype = ad1848_isapnp_list[slot].type;
3028 static int __init ad1848_isapnp_init(struct address_info *hw_config, struct pnp_card *bus, int slot)
3030 char *busname = bus->name[0] ? bus->name : ad1848_isapnp_list[slot].name;
3032 /* Initialize this baby. */
3034 if(ad1848_init_generic(bus, hw_config, slot)) {
3037 printk(KERN_NOTICE "ad1848: PnP reports '%s' at i/o %#x, irq %d, dma %d, %d\n",
3039 hw_config->io_base, hw_config->irq, hw_config->dma,
3046 static int __init ad1848_isapnp_probe(struct address_info *hw_config)
3048 static int first = 1;
3051 /* Count entries in sb_isapnp_list */
3052 for (i = 0; ad1848_isapnp_list[i].card_vendor != 0; i++);
3055 /* Check and adjust isapnpjump */
3056 if( isapnpjump < 0 || isapnpjump > i) {
3057 isapnpjump = reverse ? i : 0;
3058 printk(KERN_ERR "ad1848: Valid range for isapnpjump is 0-%d. Adjusted to %d.\n", i, isapnpjump);
3061 if(!first || !reverse)
3064 while(ad1848_isapnp_list[i].card_vendor != 0) {
3065 static struct pnp_card *bus = NULL;
3067 while ((bus = pnp_find_card(
3068 ad1848_isapnp_list[i].card_vendor,
3069 ad1848_isapnp_list[i].card_device,
3072 if(ad1848_isapnp_init(hw_config, bus, i)) {
3073 isapnpjump = i; /* start next search from here */
3077 i += reverse ? -1 : 1;
3085 static int __init init_ad1848(void)
3087 printk(KERN_INFO "ad1848/cs4248 codec driver Copyright (C) by Hannu Savolainen 1993-1996\n");
3090 if(isapnp && (ad1848_isapnp_probe(&cfg) < 0) ) {
3091 printk(KERN_NOTICE "ad1848: No ISAPnP cards found, trying standard ones...\n");
3099 if(irq == -1 || dma == -1) {
3100 printk(KERN_WARNING "ad1848: must give I/O , IRQ and DMA.\n");
3108 cfg.card_subtype = type;
3111 if(!probe_ms_sound(&cfg))
3113 attach_ms_sound(&cfg, THIS_MODULE);
3119 static void __exit cleanup_ad1848(void)
3122 unload_ms_sound(&cfg);
3127 pnp_device_detach(ad1848_dev);
3132 module_init(init_ad1848);
3133 module_exit(cleanup_ad1848);
3136 static int __init setup_ad1848(char *str)
3138 /* io, irq, dma, dma2, type */
3141 str = get_options(str, ARRAY_SIZE(ints), ints);
3152 __setup("ad1848=", setup_ad1848);
3154 MODULE_LICENSE("GPL");