2 * au1000.c -- Sound driver for Alchemy Au1000 MIPS Internet Edge
5 * Copyright 2001 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc.
7 * stevel@mvista.com or source@mvista.com
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
30 * Module command line parameters:
33 * /dev/dsp standard OSS /dev/dsp device
34 * /dev/mixer standard OSS /dev/mixer device
38 * 1. Much of the OSS buffer allocation, ioctl's, and mmap'ing are
39 * taken, slightly modified or not at all, from the ES1371 driver,
40 * so refer to the credits in es1371.c for those. The rest of the
41 * code (probe, open, read, write, the ISR, etc.) is new.
44 * 06.27.2001 Initial version
45 * 03.20.2002 Added mutex locks around read/write methods, to prevent
46 * simultaneous access on SMP or preemptible kernels. Also
47 * removed the counter/pointer fragment aligning at the end
48 * of read/write methods [stevel].
49 * 03.21.2002 Add support for coherent DMA on the audio read/write DMA
53 #include <linux/module.h>
54 #include <linux/string.h>
55 #include <linux/ioport.h>
56 #include <linux/sched.h>
57 #include <linux/delay.h>
58 #include <linux/sound.h>
59 #include <linux/slab.h>
60 #include <linux/soundcard.h>
61 #include <linux/init.h>
62 #include <linux/poll.h>
63 #include <linux/pci.h>
64 #include <linux/bitops.h>
65 #include <linux/proc_fs.h>
66 #include <linux/spinlock.h>
67 #include <linux/smp_lock.h>
68 #include <linux/ac97_codec.h>
69 #include <linux/wrapper.h>
71 #include <asm/uaccess.h>
72 #include <asm/hardirq.h>
73 #include <asm/au1000.h>
74 #include <asm/au1000_dma.h>
76 /* --------------------------------------------------------------------- */
78 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
80 #undef AU1000_VERBOSE_DEBUG
82 #define USE_COHERENT_DMA
84 #define AU1000_MODULE_NAME "Au1000 audio"
85 #define PFX AU1000_MODULE_NAME
88 #define dbg(format, arg...) printk(KERN_DEBUG PFX ": " format "\n" , ## arg)
90 #define dbg(format, arg...) do {} while (0)
92 #define err(format, arg...) printk(KERN_ERR PFX ": " format "\n" , ## arg)
93 #define info(format, arg...) printk(KERN_INFO PFX ": " format "\n" , ## arg)
94 #define warn(format, arg...) printk(KERN_WARNING PFX ": " format "\n" , ## arg)
98 #define POLL_COUNT 0x5000
99 #define AC97_EXT_DACS (AC97_EXTID_SDAC | AC97_EXTID_CDAC | AC97_EXTID_LDAC)
102 static int vra = 0; // 0 = no VRA, 1 = use VRA if codec supports it
103 MODULE_PARM(vra, "i");
104 MODULE_PARM_DESC(vra, "if 1 use VRA if codec supports it");
107 /* --------------------------------------------------------------------- */
109 struct au1000_state {
110 /* soundcore stuff */
114 /* debug /proc entry */
115 struct proc_dir_entry *ps;
116 struct proc_dir_entry *ac97_ps;
117 #endif /* AU1000_DEBUG */
119 struct ac97_codec *codec;
120 unsigned codec_base_caps;// AC'97 reg 00h, "Reset Register"
121 unsigned codec_ext_caps; // AC'97 reg 28h, "Extended Audio ID"
122 int no_vra; // do not use VRA
125 struct semaphore open_sem;
126 struct semaphore sem;
128 wait_queue_head_t open_wait;
131 unsigned int dmanr; // DMA Channel number
132 unsigned sample_rate; // Hz
133 unsigned src_factor; // SRC interp/decimation (no vra)
134 unsigned sample_size; // 8 or 16
135 int num_channels; // 1 = mono, 2 = stereo, 4, 6
136 int dma_bytes_per_sample;// DMA bytes per audio sample frame
137 int user_bytes_per_sample;// User bytes per audio sample frame
138 int cnt_factor; // user-to-DMA bytes per audio
143 unsigned numfrag; // # of DMA fragments in DMA buffer
145 void *nextIn; // ptr to next-in to DMA buffer
146 void *nextOut;// ptr to next-out from DMA buffer
147 int count; // current byte count in DMA buffer
148 unsigned total_bytes; // total bytes written or read
149 unsigned error; // over/underrun
150 wait_queue_head_t wait;
151 /* redundant, but makes calculations easier */
152 unsigned fragsize; // user perception of fragment size
153 unsigned dma_fragsize; // DMA (real) fragment size
154 unsigned dmasize; // Total DMA buffer size
155 // (mult. of DMA fragsize)
160 unsigned ossfragshift;
162 unsigned subdivision;
166 /* --------------------------------------------------------------------- */
169 static inline unsigned ld2(unsigned int x)
195 #ifdef USE_COHERENT_DMA
196 static inline void * dma_alloc(size_t size, dma_addr_t * dma_handle)
198 void* ret = (void *)__get_free_pages(GFP_ATOMIC | GFP_DMA,
201 memset(ret, 0, size);
202 *dma_handle = virt_to_phys(ret);
207 static inline void dma_free(size_t size, void* va, dma_addr_t dma_handle)
209 free_pages((unsigned long)va, get_order(size));
212 static inline void * dma_alloc(size_t size, dma_addr_t * dma_handle)
214 return pci_alloc_consistent(NULL, size, dma_handle);
217 static inline void dma_free(size_t size, void* va, dma_addr_t dma_handle)
219 pci_free_consistent(NULL, size, va, dma_handle);
223 /* --------------------------------------------------------------------- */
225 static void au1000_delay(int msec)
233 tmo = jiffies + (msec * HZ) / 1000;
235 tmo2 = tmo - jiffies;
238 schedule_timeout(tmo2);
243 /* --------------------------------------------------------------------- */
245 static u16 rdcodec(struct ac97_codec *codec, u8 addr)
247 struct au1000_state *s = (struct au1000_state *)codec->private_data;
253 spin_lock_irqsave(&s->lock, flags);
255 for (i = 0; i < POLL_COUNT; i++)
256 if (!(au_readl(AC97C_STATUS) & AC97C_CP))
259 err("rdcodec: codec cmd pending expired!");
261 cmd = (u32) addr & AC97C_INDEX_MASK;
262 cmd |= AC97C_READ; // read command
263 au_writel(cmd, AC97C_CMD);
265 /* now wait for the data */
266 for (i = 0; i < POLL_COUNT; i++)
267 if (!(au_readl(AC97C_STATUS) & AC97C_CP))
269 if (i == POLL_COUNT) {
270 err("rdcodec: read poll expired!");
274 data = au_readl(AC97C_CMD) & 0xffff;
276 spin_unlock_irqrestore(&s->lock, flags);
282 static void wrcodec(struct ac97_codec *codec, u8 addr, u16 data)
284 struct au1000_state *s = (struct au1000_state *)codec->private_data;
289 spin_lock_irqsave(&s->lock, flags);
291 for (i = 0; i < POLL_COUNT; i++)
292 if (!(au_readl(AC97C_STATUS) & AC97C_CP))
295 err("wrcodec: codec cmd pending expired!");
297 cmd = (u32) addr & AC97C_INDEX_MASK;
298 cmd &= ~AC97C_READ; // write command
299 cmd |= ((u32) data << AC97C_WD_BIT); // OR in the data word
300 au_writel(cmd, AC97C_CMD);
302 spin_unlock_irqrestore(&s->lock, flags);
305 static void waitcodec(struct ac97_codec *codec)
310 /* codec_wait is used to wait for a ready state after
314 // first poll the CODEC_READY tag bit
315 for (i = 0; i < POLL_COUNT; i++)
316 if (au_readl(AC97C_STATUS) & AC97C_READY)
318 if (i == POLL_COUNT) {
319 err("waitcodec: CODEC_READY poll expired!");
322 // get AC'97 powerdown control/status register
323 temp = rdcodec(codec, AC97_POWER_CONTROL);
325 // If anything is powered down, power'em up
328 wrcodec(codec, AC97_POWER_CONTROL, 0);
331 temp = rdcodec(codec, AC97_POWER_CONTROL);
334 // Check if Codec REF,ANL,DAC,ADC ready
335 if ((temp & 0x7f0f) != 0x000f)
336 err("codec reg 26 status (0x%x) not ready!!", temp);
340 /* --------------------------------------------------------------------- */
342 /* stop the ADC before calling */
343 static void set_adc_rate(struct au1000_state *s, unsigned rate)
345 struct dmabuf *adc = &s->dma_adc;
346 struct dmabuf *dac = &s->dma_dac;
347 unsigned adc_rate, dac_rate;
352 adc->src_factor = ((96000 / rate) + 1) >> 1;
353 adc->sample_rate = 48000 / adc->src_factor;
359 ac97_extstat = rdcodec(s->codec, AC97_EXTENDED_STATUS);
361 rate = rate > 48000 ? 48000 : rate;
364 wrcodec(s->codec, AC97_EXTENDED_STATUS,
365 ac97_extstat | AC97_EXTSTAT_VRA);
366 // now write the sample rate
367 wrcodec(s->codec, AC97_PCM_LR_ADC_RATE, (u16) rate);
368 // read it back for actual supported rate
369 adc_rate = rdcodec(s->codec, AC97_PCM_LR_ADC_RATE);
371 #ifdef AU1000_VERBOSE_DEBUG
372 dbg("%s: set to %d Hz", __FUNCTION__, adc_rate);
375 // some codec's don't allow unequal DAC and ADC rates, in which case
376 // writing one rate reg actually changes both.
377 dac_rate = rdcodec(s->codec, AC97_PCM_FRONT_DAC_RATE);
378 if (dac->num_channels > 2)
379 wrcodec(s->codec, AC97_PCM_SURR_DAC_RATE, dac_rate);
380 if (dac->num_channels > 4)
381 wrcodec(s->codec, AC97_PCM_LFE_DAC_RATE, dac_rate);
383 adc->sample_rate = adc_rate;
384 dac->sample_rate = dac_rate;
387 /* stop the DAC before calling */
388 static void set_dac_rate(struct au1000_state *s, unsigned rate)
390 struct dmabuf *dac = &s->dma_dac;
391 struct dmabuf *adc = &s->dma_adc;
392 unsigned adc_rate, dac_rate;
397 dac->src_factor = ((96000 / rate) + 1) >> 1;
398 dac->sample_rate = 48000 / dac->src_factor;
404 ac97_extstat = rdcodec(s->codec, AC97_EXTENDED_STATUS);
406 rate = rate > 48000 ? 48000 : rate;
409 wrcodec(s->codec, AC97_EXTENDED_STATUS,
410 ac97_extstat | AC97_EXTSTAT_VRA);
411 // now write the sample rate
412 wrcodec(s->codec, AC97_PCM_FRONT_DAC_RATE, (u16) rate);
413 // I don't support different sample rates for multichannel,
414 // so make these channels the same.
415 if (dac->num_channels > 2)
416 wrcodec(s->codec, AC97_PCM_SURR_DAC_RATE, (u16) rate);
417 if (dac->num_channels > 4)
418 wrcodec(s->codec, AC97_PCM_LFE_DAC_RATE, (u16) rate);
419 // read it back for actual supported rate
420 dac_rate = rdcodec(s->codec, AC97_PCM_FRONT_DAC_RATE);
422 #ifdef AU1000_VERBOSE_DEBUG
423 dbg("%s: set to %d Hz", __FUNCTION__, dac_rate);
426 // some codec's don't allow unequal DAC and ADC rates, in which case
427 // writing one rate reg actually changes both.
428 adc_rate = rdcodec(s->codec, AC97_PCM_LR_ADC_RATE);
430 dac->sample_rate = dac_rate;
431 adc->sample_rate = adc_rate;
434 static void stop_dac(struct au1000_state *s)
436 struct dmabuf *db = &s->dma_dac;
442 spin_lock_irqsave(&s->lock, flags);
444 disable_dma(db->dmanr);
448 spin_unlock_irqrestore(&s->lock, flags);
451 static void stop_adc(struct au1000_state *s)
453 struct dmabuf *db = &s->dma_adc;
459 spin_lock_irqsave(&s->lock, flags);
461 disable_dma(db->dmanr);
465 spin_unlock_irqrestore(&s->lock, flags);
469 static void set_xmit_slots(int num_channels)
471 u32 ac97_config = au_readl(AC97C_CONFIG) & ~AC97C_XMIT_SLOTS_MASK;
473 switch (num_channels) {
475 case 2: // stereo, slots 3,4
476 ac97_config |= (0x3 << AC97C_XMIT_SLOTS_BIT);
478 case 4: // stereo with surround, slots 3,4,7,8
479 ac97_config |= (0x33 << AC97C_XMIT_SLOTS_BIT);
481 case 6: // stereo with surround and center/LFE, slots 3,4,6,7,8,9
482 ac97_config |= (0x7b << AC97C_XMIT_SLOTS_BIT);
486 au_writel(ac97_config, AC97C_CONFIG);
489 static void set_recv_slots(int num_channels)
491 u32 ac97_config = au_readl(AC97C_CONFIG) & ~AC97C_RECV_SLOTS_MASK;
494 * Always enable slots 3 and 4 (stereo). Slot 6 is
495 * optional Mic ADC, which I don't support yet.
497 ac97_config |= (0x3 << AC97C_RECV_SLOTS_BIT);
499 au_writel(ac97_config, AC97C_CONFIG);
502 static void start_dac(struct au1000_state *s)
504 struct dmabuf *db = &s->dma_dac;
506 unsigned long buf1, buf2;
511 spin_lock_irqsave(&s->lock, flags);
513 au_readl(AC97C_STATUS); // read status to clear sticky bits
515 // reset Buffer 1 and 2 pointers to nextOut and nextOut+dma_fragsize
516 buf1 = virt_to_phys(db->nextOut);
517 buf2 = buf1 + db->dma_fragsize;
518 if (buf2 >= db->dmaaddr + db->dmasize)
521 set_xmit_slots(db->num_channels);
524 if (get_dma_active_buffer(db->dmanr) == 0) {
525 clear_dma_done0(db->dmanr); // clear DMA done bit
526 set_dma_addr0(db->dmanr, buf1);
527 set_dma_addr1(db->dmanr, buf2);
529 clear_dma_done1(db->dmanr); // clear DMA done bit
530 set_dma_addr1(db->dmanr, buf1);
531 set_dma_addr0(db->dmanr, buf2);
533 set_dma_count(db->dmanr, db->dma_fragsize>>1);
534 enable_dma_buffers(db->dmanr);
536 start_dma(db->dmanr);
538 #ifdef AU1000_VERBOSE_DEBUG
539 dump_au1000_dma_channel(db->dmanr);
544 spin_unlock_irqrestore(&s->lock, flags);
547 static void start_adc(struct au1000_state *s)
549 struct dmabuf *db = &s->dma_adc;
551 unsigned long buf1, buf2;
556 spin_lock_irqsave(&s->lock, flags);
558 au_readl(AC97C_STATUS); // read status to clear sticky bits
560 // reset Buffer 1 and 2 pointers to nextIn and nextIn+dma_fragsize
561 buf1 = virt_to_phys(db->nextIn);
562 buf2 = buf1 + db->dma_fragsize;
563 if (buf2 >= db->dmaaddr + db->dmasize)
566 set_recv_slots(db->num_channels);
569 if (get_dma_active_buffer(db->dmanr) == 0) {
570 clear_dma_done0(db->dmanr); // clear DMA done bit
571 set_dma_addr0(db->dmanr, buf1);
572 set_dma_addr1(db->dmanr, buf2);
574 clear_dma_done1(db->dmanr); // clear DMA done bit
575 set_dma_addr1(db->dmanr, buf1);
576 set_dma_addr0(db->dmanr, buf2);
578 set_dma_count(db->dmanr, db->dma_fragsize>>1);
579 enable_dma_buffers(db->dmanr);
581 start_dma(db->dmanr);
583 #ifdef AU1000_VERBOSE_DEBUG
584 dump_au1000_dma_channel(db->dmanr);
589 spin_unlock_irqrestore(&s->lock, flags);
592 /* --------------------------------------------------------------------- */
594 #define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
595 #define DMABUF_MINORDER 1
597 extern inline void dealloc_dmabuf(struct au1000_state *s, struct dmabuf *db)
599 struct page *page, *pend;
602 /* undo marking the pages as reserved */
603 pend = virt_to_page(db->rawbuf +
604 (PAGE_SIZE << db->buforder) - 1);
605 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
606 mem_map_unreserve(page);
607 dma_free(PAGE_SIZE << db->buforder, db->rawbuf, db->dmaaddr);
609 db->rawbuf = db->nextIn = db->nextOut = NULL;
610 db->mapped = db->ready = 0;
613 static int prog_dmabuf(struct au1000_state *s, struct dmabuf *db)
616 unsigned user_bytes_per_sec;
618 struct page *page, *pend;
619 unsigned rate = db->sample_rate;
622 db->ready = db->mapped = 0;
623 for (order = DMABUF_DEFAULTORDER;
624 order >= DMABUF_MINORDER; order--)
625 if ((db->rawbuf = dma_alloc(PAGE_SIZE << order,
630 db->buforder = order;
631 /* now mark the pages as reserved;
632 otherwise remap_page_range doesn't do what we want */
633 pend = virt_to_page(db->rawbuf +
634 (PAGE_SIZE << db->buforder) - 1);
635 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
636 mem_map_reserve(page);
640 if (db->sample_size == 8)
642 if (db->num_channels == 1)
644 db->cnt_factor *= db->src_factor;
647 db->nextIn = db->nextOut = db->rawbuf;
649 db->user_bytes_per_sample = (db->sample_size>>3) * db->num_channels;
650 db->dma_bytes_per_sample = 2 * ((db->num_channels == 1) ?
651 2 : db->num_channels);
653 user_bytes_per_sec = rate * db->user_bytes_per_sample;
654 bufs = PAGE_SIZE << db->buforder;
655 if (db->ossfragshift) {
656 if ((1000 << db->ossfragshift) < user_bytes_per_sec)
657 db->fragshift = ld2(user_bytes_per_sec/1000);
659 db->fragshift = db->ossfragshift;
661 db->fragshift = ld2(user_bytes_per_sec / 100 /
662 (db->subdivision ? db->subdivision : 1));
663 if (db->fragshift < 3)
667 db->fragsize = 1 << db->fragshift;
668 db->dma_fragsize = db->fragsize * db->cnt_factor;
669 db->numfrag = bufs / db->dma_fragsize;
671 while (db->numfrag < 4 && db->fragshift > 3) {
673 db->fragsize = 1 << db->fragshift;
674 db->dma_fragsize = db->fragsize * db->cnt_factor;
675 db->numfrag = bufs / db->dma_fragsize;
678 if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
679 db->numfrag = db->ossmaxfrags;
681 db->dmasize = db->dma_fragsize * db->numfrag;
682 memset(db->rawbuf, 0, bufs);
684 #ifdef AU1000_VERBOSE_DEBUG
685 dbg("rate=%d, samplesize=%d, channels=%d",
686 rate, db->sample_size, db->num_channels);
687 dbg("fragsize=%d, cnt_factor=%d, dma_fragsize=%d",
688 db->fragsize, db->cnt_factor, db->dma_fragsize);
689 dbg("numfrag=%d, dmasize=%d", db->numfrag, db->dmasize);
696 extern inline int prog_dmabuf_adc(struct au1000_state *s)
699 return prog_dmabuf(s, &s->dma_adc);
703 extern inline int prog_dmabuf_dac(struct au1000_state *s)
706 return prog_dmabuf(s, &s->dma_dac);
710 /* hold spinlock for the following */
711 static void dac_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
713 struct au1000_state *s = (struct au1000_state *) dev_id;
714 struct dmabuf *dac = &s->dma_dac;
715 unsigned long newptr;
716 u32 ac97c_stat, buff_done;
718 ac97c_stat = au_readl(AC97C_STATUS);
719 #ifdef AU1000_VERBOSE_DEBUG
720 if (ac97c_stat & (AC97C_XU | AC97C_XO | AC97C_TE))
721 dbg("AC97C status = 0x%08x", ac97c_stat);
724 if ((buff_done = get_dma_buffer_done(dac->dmanr)) == 0) {
725 /* fastpath out, to ease interrupt sharing */
731 if (buff_done != (DMA_D0 | DMA_D1)) {
732 dac->nextOut += dac->dma_fragsize;
733 if (dac->nextOut >= dac->rawbuf + dac->dmasize)
734 dac->nextOut -= dac->dmasize;
736 /* update playback pointers */
737 newptr = virt_to_phys(dac->nextOut) + dac->dma_fragsize;
738 if (newptr >= dac->dmaaddr + dac->dmasize)
739 newptr -= dac->dmasize;
741 dac->count -= dac->dma_fragsize;
742 dac->total_bytes += dac->dma_fragsize;
744 if (dac->count <= 0) {
745 #ifdef AU1000_VERBOSE_DEBUG
748 spin_unlock(&s->lock);
752 dac->nextIn = dac->nextOut;
753 } else if (buff_done == DMA_D0) {
754 clear_dma_done0(dac->dmanr); // clear DMA done bit
755 set_dma_count0(dac->dmanr, dac->dma_fragsize>>1);
756 set_dma_addr0(dac->dmanr, newptr);
757 enable_dma_buffer0(dac->dmanr); // reenable
759 clear_dma_done1(dac->dmanr); // clear DMA done bit
760 set_dma_count1(dac->dmanr, dac->dma_fragsize>>1);
761 set_dma_addr1(dac->dmanr, newptr);
762 enable_dma_buffer1(dac->dmanr); // reenable
765 // both done bits set, we missed an interrupt
766 spin_unlock(&s->lock);
770 dac->nextOut += 2*dac->dma_fragsize;
771 if (dac->nextOut >= dac->rawbuf + dac->dmasize)
772 dac->nextOut -= dac->dmasize;
774 dac->count -= 2*dac->dma_fragsize;
775 dac->total_bytes += 2*dac->dma_fragsize;
777 if (dac->count > 0) {
778 spin_unlock(&s->lock);
784 /* wake up anybody listening */
785 if (waitqueue_active(&dac->wait))
788 spin_unlock(&s->lock);
792 static void adc_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
794 struct au1000_state *s = (struct au1000_state *) dev_id;
795 struct dmabuf *adc = &s->dma_adc;
796 unsigned long newptr;
797 u32 ac97c_stat, buff_done;
799 ac97c_stat = au_readl(AC97C_STATUS);
800 #ifdef AU1000_VERBOSE_DEBUG
801 if (ac97c_stat & (AC97C_RU | AC97C_RO))
802 dbg("AC97C status = 0x%08x", ac97c_stat);
805 if ((buff_done = get_dma_buffer_done(adc->dmanr)) == 0) {
806 /* fastpath out, to ease interrupt sharing */
812 if (buff_done != (DMA_D0 | DMA_D1)) {
813 if (adc->count + adc->dma_fragsize > adc->dmasize) {
814 // Overrun. Stop ADC and log the error
815 spin_unlock(&s->lock);
822 adc->nextIn += adc->dma_fragsize;
823 if (adc->nextIn >= adc->rawbuf + adc->dmasize)
824 adc->nextIn -= adc->dmasize;
826 /* update capture pointers */
827 newptr = virt_to_phys(adc->nextIn) + adc->dma_fragsize;
828 if (newptr >= adc->dmaaddr + adc->dmasize)
829 newptr -= adc->dmasize;
831 adc->count += adc->dma_fragsize;
832 adc->total_bytes += adc->dma_fragsize;
834 if (buff_done == DMA_D0) {
835 clear_dma_done0(adc->dmanr); // clear DMA done bit
836 set_dma_count0(adc->dmanr, adc->dma_fragsize>>1);
837 set_dma_addr0(adc->dmanr, newptr);
838 enable_dma_buffer0(adc->dmanr); // reenable
840 clear_dma_done1(adc->dmanr); // clear DMA done bit
841 set_dma_count1(adc->dmanr, adc->dma_fragsize>>1);
842 set_dma_addr1(adc->dmanr, newptr);
843 enable_dma_buffer1(adc->dmanr); // reenable
846 // both done bits set, we missed an interrupt
847 spin_unlock(&s->lock);
851 if (adc->count + 2*adc->dma_fragsize > adc->dmasize) {
852 // Overrun. Log the error
855 spin_unlock(&s->lock);
859 adc->nextIn += 2*adc->dma_fragsize;
860 if (adc->nextIn >= adc->rawbuf + adc->dmasize)
861 adc->nextIn -= adc->dmasize;
863 adc->count += 2*adc->dma_fragsize;
864 adc->total_bytes += 2*adc->dma_fragsize;
866 spin_unlock(&s->lock);
871 /* wake up anybody listening */
872 if (waitqueue_active(&adc->wait))
875 spin_unlock(&s->lock);
878 /* --------------------------------------------------------------------- */
880 static loff_t au1000_llseek(struct file *file, loff_t offset, int origin)
886 static int au1000_open_mixdev(struct inode *inode, struct file *file)
888 file->private_data = &au1000_state;
892 static int au1000_release_mixdev(struct inode *inode, struct file *file)
897 static int mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd,
900 return codec->mixer_ioctl(codec, cmd, arg);
903 static int au1000_ioctl_mixdev(struct inode *inode, struct file *file,
904 unsigned int cmd, unsigned long arg)
906 struct au1000_state *s = (struct au1000_state *)file->private_data;
907 struct ac97_codec *codec = s->codec;
909 return mixdev_ioctl(codec, cmd, arg);
912 static /*const */ struct file_operations au1000_mixer_fops = {
913 .owner = THIS_MODULE,
914 .llseek = au1000_llseek,
915 .ioctl = au1000_ioctl_mixdev,
916 .open = au1000_open_mixdev,
917 .release = au1000_release_mixdev,
920 /* --------------------------------------------------------------------- */
922 static int drain_dac(struct au1000_state *s, int nonblock)
927 if (s->dma_dac.mapped || !s->dma_dac.ready || s->dma_dac.stopped)
931 spin_lock_irqsave(&s->lock, flags);
932 count = s->dma_dac.count;
933 spin_unlock_irqrestore(&s->lock, flags);
936 if (signal_pending(current))
940 tmo = 1000 * count / (s->no_vra ?
941 48000 : s->dma_dac.sample_rate);
942 tmo /= s->dma_dac.dma_bytes_per_sample;
945 if (signal_pending(current))
950 /* --------------------------------------------------------------------- */
952 static inline u8 S16_TO_U8(s16 ch)
954 return (u8) (ch >> 8) + 0x80;
956 static inline s16 U8_TO_S16(u8 ch)
958 return (s16) (ch - 0x80) << 8;
962 * Translates user samples to dma buffer suitable for AC'97 DAC data:
963 * If mono, copy left channel to right channel in dma buffer.
964 * If 8 bit samples, cvt to 16-bit before writing to dma buffer.
965 * If interpolating (no VRA), duplicate every audio frame src_factor times.
967 static int translate_from_user(struct dmabuf *db,
973 int interp_bytes_per_sample;
975 int mono = (db->num_channels == 1);
977 s16 ch, dmasample[6];
979 if (db->sample_size == 16 && !mono && db->src_factor == 1) {
980 // no translation necessary, just copy
981 if (copy_from_user(dmabuf, userbuf, dmacount))
986 interp_bytes_per_sample = db->dma_bytes_per_sample * db->src_factor;
987 num_samples = dmacount / interp_bytes_per_sample;
989 for (sample = 0; sample < num_samples; sample++) {
990 if (copy_from_user(usersample, userbuf,
991 db->user_bytes_per_sample)) {
992 dbg("%s: fault", __FUNCTION__);
996 for (i = 0; i < db->num_channels; i++) {
997 if (db->sample_size == 8)
998 ch = U8_TO_S16(usersample[i]);
1000 ch = *((s16 *) (&usersample[i * 2]));
1003 dmasample[i + 1] = ch; // right channel
1006 // duplicate every audio frame src_factor times
1007 for (i = 0; i < db->src_factor; i++)
1008 memcpy(dmabuf, dmasample, db->dma_bytes_per_sample);
1010 userbuf += db->user_bytes_per_sample;
1011 dmabuf += interp_bytes_per_sample;
1014 return num_samples * interp_bytes_per_sample;
1018 * Translates AC'97 ADC samples to user buffer:
1019 * If mono, send only left channel to user buffer.
1020 * If 8 bit samples, cvt from 16 to 8 bit before writing to user buffer.
1021 * If decimating (no VRA), skip over src_factor audio frames.
1023 static int translate_to_user(struct dmabuf *db,
1029 int interp_bytes_per_sample;
1031 int mono = (db->num_channels == 1);
1032 char usersample[12];
1034 if (db->sample_size == 16 && !mono && db->src_factor == 1) {
1035 // no translation necessary, just copy
1036 if (copy_to_user(userbuf, dmabuf, dmacount))
1041 interp_bytes_per_sample = db->dma_bytes_per_sample * db->src_factor;
1042 num_samples = dmacount / interp_bytes_per_sample;
1044 for (sample = 0; sample < num_samples; sample++) {
1045 for (i = 0; i < db->num_channels; i++) {
1046 if (db->sample_size == 8)
1048 S16_TO_U8(*((s16 *) (&dmabuf[i * 2])));
1050 *((s16 *) (&usersample[i * 2])) =
1051 *((s16 *) (&dmabuf[i * 2]));
1054 if (copy_to_user(userbuf, usersample,
1055 db->user_bytes_per_sample)) {
1056 dbg("%s: fault", __FUNCTION__);
1060 userbuf += db->user_bytes_per_sample;
1061 dmabuf += interp_bytes_per_sample;
1064 return num_samples * interp_bytes_per_sample;
1068 * Copy audio data to/from user buffer from/to dma buffer, taking care
1069 * that we wrap when reading/writing the dma buffer. Returns actual byte
1070 * count written to or read from the dma buffer.
1072 static int copy_dmabuf_user(struct dmabuf *db, char* userbuf,
1073 int count, int to_user)
1075 char *bufptr = to_user ? db->nextOut : db->nextIn;
1076 char *bufend = db->rawbuf + db->dmasize;
1079 if (bufptr + count > bufend) {
1080 int partial = (int) (bufend - bufptr);
1082 if ((cnt = translate_to_user(db, userbuf,
1083 bufptr, partial)) < 0)
1086 if ((cnt = translate_to_user(db, userbuf + partial,
1088 count - partial)) < 0)
1092 if ((cnt = translate_from_user(db, bufptr, userbuf,
1096 if ((cnt = translate_from_user(db, db->rawbuf,
1098 count - partial)) < 0)
1104 ret = translate_to_user(db, userbuf, bufptr, count);
1106 ret = translate_from_user(db, bufptr, userbuf, count);
1113 static ssize_t au1000_read(struct file *file, char *buffer,
1114 size_t count, loff_t *ppos)
1116 struct au1000_state *s = (struct au1000_state *)file->private_data;
1117 struct dmabuf *db = &s->dma_adc;
1118 DECLARE_WAITQUEUE(wait, current);
1120 unsigned long flags;
1121 int cnt, usercnt, avail;
1123 if (ppos != &file->f_pos)
1127 if (!access_ok(VERIFY_WRITE, buffer, count))
1131 count *= db->cnt_factor;
1134 add_wait_queue(&db->wait, &wait);
1137 // wait for samples in ADC dma buffer
1141 spin_lock_irqsave(&s->lock, flags);
1144 __set_current_state(TASK_INTERRUPTIBLE);
1145 spin_unlock_irqrestore(&s->lock, flags);
1147 if (file->f_flags & O_NONBLOCK) {
1154 if (signal_pending(current)) {
1161 } while (avail <= 0);
1163 // copy from nextOut to user
1164 if ((cnt = copy_dmabuf_user(db, buffer,
1166 avail : count, 1)) < 0) {
1172 spin_lock_irqsave(&s->lock, flags);
1175 if (db->nextOut >= db->rawbuf + db->dmasize)
1176 db->nextOut -= db->dmasize;
1177 spin_unlock_irqrestore(&s->lock, flags);
1180 usercnt = cnt / db->cnt_factor;
1183 } // while (count > 0)
1188 remove_wait_queue(&db->wait, &wait);
1189 set_current_state(TASK_RUNNING);
1193 static ssize_t au1000_write(struct file *file, const char *buffer,
1194 size_t count, loff_t * ppos)
1196 struct au1000_state *s = (struct au1000_state *)file->private_data;
1197 struct dmabuf *db = &s->dma_dac;
1198 DECLARE_WAITQUEUE(wait, current);
1200 unsigned long flags;
1201 int cnt, usercnt, avail;
1203 #ifdef AU1000_VERBOSE_DEBUG
1204 dbg("write: count=%d", count);
1207 if (ppos != &file->f_pos)
1211 if (!access_ok(VERIFY_READ, buffer, count))
1214 count *= db->cnt_factor;
1217 add_wait_queue(&db->wait, &wait);
1220 // wait for space in playback buffer
1222 spin_lock_irqsave(&s->lock, flags);
1223 avail = (int) db->dmasize - db->count;
1225 __set_current_state(TASK_INTERRUPTIBLE);
1226 spin_unlock_irqrestore(&s->lock, flags);
1228 if (file->f_flags & O_NONBLOCK) {
1235 if (signal_pending(current)) {
1242 } while (avail <= 0);
1244 // copy from user to nextIn
1245 if ((cnt = copy_dmabuf_user(db, (char *) buffer,
1247 avail : count, 0)) < 0) {
1253 spin_lock_irqsave(&s->lock, flags);
1256 if (db->nextIn >= db->rawbuf + db->dmasize)
1257 db->nextIn -= db->dmasize;
1258 spin_unlock_irqrestore(&s->lock, flags);
1263 usercnt = cnt / db->cnt_factor;
1266 } // while (count > 0)
1271 remove_wait_queue(&db->wait, &wait);
1272 set_current_state(TASK_RUNNING);
1277 /* No kernel lock - we have our own spinlock */
1278 static unsigned int au1000_poll(struct file *file,
1279 struct poll_table_struct *wait)
1281 struct au1000_state *s = (struct au1000_state *)file->private_data;
1282 unsigned long flags;
1283 unsigned int mask = 0;
1285 if (file->f_mode & FMODE_WRITE) {
1286 if (!s->dma_dac.ready)
1288 poll_wait(file, &s->dma_dac.wait, wait);
1290 if (file->f_mode & FMODE_READ) {
1291 if (!s->dma_adc.ready)
1293 poll_wait(file, &s->dma_adc.wait, wait);
1296 spin_lock_irqsave(&s->lock, flags);
1298 if (file->f_mode & FMODE_READ) {
1299 if (s->dma_adc.count >= (signed)s->dma_adc.dma_fragsize)
1300 mask |= POLLIN | POLLRDNORM;
1302 if (file->f_mode & FMODE_WRITE) {
1303 if (s->dma_dac.mapped) {
1304 if (s->dma_dac.count >=
1305 (signed)s->dma_dac.dma_fragsize)
1306 mask |= POLLOUT | POLLWRNORM;
1308 if ((signed) s->dma_dac.dmasize >=
1309 s->dma_dac.count + (signed)s->dma_dac.dma_fragsize)
1310 mask |= POLLOUT | POLLWRNORM;
1313 spin_unlock_irqrestore(&s->lock, flags);
1317 static int au1000_mmap(struct file *file, struct vm_area_struct *vma)
1319 struct au1000_state *s = (struct au1000_state *)file->private_data;
1328 if (vma->vm_flags & VM_WRITE)
1330 else if (vma->vm_flags & VM_READ)
1336 if (vma->vm_pgoff != 0) {
1340 size = vma->vm_end - vma->vm_start;
1341 if (size > (PAGE_SIZE << db->buforder)) {
1345 if (remap_page_range(vma->vm_start, virt_to_phys(db->rawbuf),
1346 size, vma->vm_page_prot)) {
1350 vma->vm_flags &= ~VM_IO;
1359 #ifdef AU1000_VERBOSE_DEBUG
1360 static struct ioctl_str_t {
1364 {SNDCTL_DSP_RESET, "SNDCTL_DSP_RESET"},
1365 {SNDCTL_DSP_SYNC, "SNDCTL_DSP_SYNC"},
1366 {SNDCTL_DSP_SPEED, "SNDCTL_DSP_SPEED"},
1367 {SNDCTL_DSP_STEREO, "SNDCTL_DSP_STEREO"},
1368 {SNDCTL_DSP_GETBLKSIZE, "SNDCTL_DSP_GETBLKSIZE"},
1369 {SNDCTL_DSP_SAMPLESIZE, "SNDCTL_DSP_SAMPLESIZE"},
1370 {SNDCTL_DSP_CHANNELS, "SNDCTL_DSP_CHANNELS"},
1371 {SOUND_PCM_WRITE_CHANNELS, "SOUND_PCM_WRITE_CHANNELS"},
1372 {SOUND_PCM_WRITE_FILTER, "SOUND_PCM_WRITE_FILTER"},
1373 {SNDCTL_DSP_POST, "SNDCTL_DSP_POST"},
1374 {SNDCTL_DSP_SUBDIVIDE, "SNDCTL_DSP_SUBDIVIDE"},
1375 {SNDCTL_DSP_SETFRAGMENT, "SNDCTL_DSP_SETFRAGMENT"},
1376 {SNDCTL_DSP_GETFMTS, "SNDCTL_DSP_GETFMTS"},
1377 {SNDCTL_DSP_SETFMT, "SNDCTL_DSP_SETFMT"},
1378 {SNDCTL_DSP_GETOSPACE, "SNDCTL_DSP_GETOSPACE"},
1379 {SNDCTL_DSP_GETISPACE, "SNDCTL_DSP_GETISPACE"},
1380 {SNDCTL_DSP_NONBLOCK, "SNDCTL_DSP_NONBLOCK"},
1381 {SNDCTL_DSP_GETCAPS, "SNDCTL_DSP_GETCAPS"},
1382 {SNDCTL_DSP_GETTRIGGER, "SNDCTL_DSP_GETTRIGGER"},
1383 {SNDCTL_DSP_SETTRIGGER, "SNDCTL_DSP_SETTRIGGER"},
1384 {SNDCTL_DSP_GETIPTR, "SNDCTL_DSP_GETIPTR"},
1385 {SNDCTL_DSP_GETOPTR, "SNDCTL_DSP_GETOPTR"},
1386 {SNDCTL_DSP_MAPINBUF, "SNDCTL_DSP_MAPINBUF"},
1387 {SNDCTL_DSP_MAPOUTBUF, "SNDCTL_DSP_MAPOUTBUF"},
1388 {SNDCTL_DSP_SETSYNCRO, "SNDCTL_DSP_SETSYNCRO"},
1389 {SNDCTL_DSP_SETDUPLEX, "SNDCTL_DSP_SETDUPLEX"},
1390 {SNDCTL_DSP_GETODELAY, "SNDCTL_DSP_GETODELAY"},
1391 {SNDCTL_DSP_GETCHANNELMASK, "SNDCTL_DSP_GETCHANNELMASK"},
1392 {SNDCTL_DSP_BIND_CHANNEL, "SNDCTL_DSP_BIND_CHANNEL"},
1393 {OSS_GETVERSION, "OSS_GETVERSION"},
1394 {SOUND_PCM_READ_RATE, "SOUND_PCM_READ_RATE"},
1395 {SOUND_PCM_READ_CHANNELS, "SOUND_PCM_READ_CHANNELS"},
1396 {SOUND_PCM_READ_BITS, "SOUND_PCM_READ_BITS"},
1397 {SOUND_PCM_READ_FILTER, "SOUND_PCM_READ_FILTER"}
1401 // Need to hold a spin-lock before calling this!
1402 static int dma_count_done(struct dmabuf *db)
1407 return db->dma_fragsize - get_dma_residue(db->dmanr);
1411 static int au1000_ioctl(struct inode *inode, struct file *file,
1412 unsigned int cmd, unsigned long arg)
1414 struct au1000_state *s = (struct au1000_state *)file->private_data;
1415 unsigned long flags;
1416 audio_buf_info abinfo;
1419 int val, mapped, ret, diff;
1421 mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1422 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1424 #ifdef AU1000_VERBOSE_DEBUG
1425 for (count=0; count<sizeof(ioctl_str)/sizeof(ioctl_str[0]); count++) {
1426 if (ioctl_str[count].cmd == cmd)
1429 if (count < sizeof(ioctl_str) / sizeof(ioctl_str[0]))
1430 dbg("ioctl %s, arg=0x%lx", ioctl_str[count].str, arg);
1432 dbg("ioctl 0x%x unknown, arg=0x%lx", cmd, arg);
1436 case OSS_GETVERSION:
1437 return put_user(SOUND_VERSION, (int *) arg);
1439 case SNDCTL_DSP_SYNC:
1440 if (file->f_mode & FMODE_WRITE)
1441 return drain_dac(s, file->f_flags & O_NONBLOCK);
1444 case SNDCTL_DSP_SETDUPLEX:
1447 case SNDCTL_DSP_GETCAPS:
1448 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME |
1449 DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
1451 case SNDCTL_DSP_RESET:
1452 if (file->f_mode & FMODE_WRITE) {
1455 s->dma_dac.count = s->dma_dac.total_bytes = 0;
1456 s->dma_dac.nextIn = s->dma_dac.nextOut =
1459 if (file->f_mode & FMODE_READ) {
1462 s->dma_adc.count = s->dma_adc.total_bytes = 0;
1463 s->dma_adc.nextIn = s->dma_adc.nextOut =
1468 case SNDCTL_DSP_SPEED:
1469 if (get_user(val, (int *) arg))
1472 if (file->f_mode & FMODE_READ) {
1474 set_adc_rate(s, val);
1476 if (file->f_mode & FMODE_WRITE) {
1478 set_dac_rate(s, val);
1480 if (s->open_mode & FMODE_READ)
1481 if ((ret = prog_dmabuf_adc(s)))
1483 if (s->open_mode & FMODE_WRITE)
1484 if ((ret = prog_dmabuf_dac(s)))
1487 return put_user((file->f_mode & FMODE_READ) ?
1488 s->dma_adc.sample_rate :
1489 s->dma_dac.sample_rate,
1492 case SNDCTL_DSP_STEREO:
1493 if (get_user(val, (int *) arg))
1495 if (file->f_mode & FMODE_READ) {
1497 s->dma_adc.num_channels = val ? 2 : 1;
1498 if ((ret = prog_dmabuf_adc(s)))
1501 if (file->f_mode & FMODE_WRITE) {
1503 s->dma_dac.num_channels = val ? 2 : 1;
1504 if (s->codec_ext_caps & AC97_EXT_DACS) {
1505 // disable surround and center/lfe in AC'97
1506 u16 ext_stat = rdcodec(s->codec,
1507 AC97_EXTENDED_STATUS);
1508 wrcodec(s->codec, AC97_EXTENDED_STATUS,
1509 ext_stat | (AC97_EXTSTAT_PRI |
1513 if ((ret = prog_dmabuf_dac(s)))
1518 case SNDCTL_DSP_CHANNELS:
1519 if (get_user(val, (int *) arg))
1522 if (file->f_mode & FMODE_READ) {
1523 if (val < 0 || val > 2)
1526 s->dma_adc.num_channels = val;
1527 if ((ret = prog_dmabuf_adc(s)))
1530 if (file->f_mode & FMODE_WRITE) {
1539 if (!(s->codec_ext_caps &
1544 if ((s->codec_ext_caps &
1545 AC97_EXT_DACS) != AC97_EXT_DACS)
1554 (s->codec_ext_caps & AC97_EXT_DACS)) {
1555 // disable surround and center/lfe
1556 // channels in AC'97
1559 AC97_EXTENDED_STATUS);
1561 AC97_EXTENDED_STATUS,
1562 ext_stat | (AC97_EXTSTAT_PRI |
1565 } else if (val >= 4) {
1566 // enable surround, center/lfe
1567 // channels in AC'97
1570 AC97_EXTENDED_STATUS);
1571 ext_stat &= ~AC97_EXTSTAT_PRJ;
1574 ~(AC97_EXTSTAT_PRI |
1577 AC97_EXTENDED_STATUS,
1581 s->dma_dac.num_channels = val;
1582 if ((ret = prog_dmabuf_dac(s)))
1586 return put_user(val, (int *) arg);
1588 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1589 return put_user(AFMT_S16_LE | AFMT_U8, (int *) arg);
1591 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt */
1592 if (get_user(val, (int *) arg))
1594 if (val != AFMT_QUERY) {
1595 if (file->f_mode & FMODE_READ) {
1597 if (val == AFMT_S16_LE)
1598 s->dma_adc.sample_size = 16;
1601 s->dma_adc.sample_size = 8;
1603 if ((ret = prog_dmabuf_adc(s)))
1606 if (file->f_mode & FMODE_WRITE) {
1608 if (val == AFMT_S16_LE)
1609 s->dma_dac.sample_size = 16;
1612 s->dma_dac.sample_size = 8;
1614 if ((ret = prog_dmabuf_dac(s)))
1618 if (file->f_mode & FMODE_READ)
1619 val = (s->dma_adc.sample_size == 16) ?
1620 AFMT_S16_LE : AFMT_U8;
1622 val = (s->dma_dac.sample_size == 16) ?
1623 AFMT_S16_LE : AFMT_U8;
1625 return put_user(val, (int *) arg);
1627 case SNDCTL_DSP_POST:
1630 case SNDCTL_DSP_GETTRIGGER:
1632 spin_lock_irqsave(&s->lock, flags);
1633 if (file->f_mode & FMODE_READ && !s->dma_adc.stopped)
1634 val |= PCM_ENABLE_INPUT;
1635 if (file->f_mode & FMODE_WRITE && !s->dma_dac.stopped)
1636 val |= PCM_ENABLE_OUTPUT;
1637 spin_unlock_irqrestore(&s->lock, flags);
1638 return put_user(val, (int *) arg);
1640 case SNDCTL_DSP_SETTRIGGER:
1641 if (get_user(val, (int *) arg))
1643 if (file->f_mode & FMODE_READ) {
1644 if (val & PCM_ENABLE_INPUT)
1649 if (file->f_mode & FMODE_WRITE) {
1650 if (val & PCM_ENABLE_OUTPUT)
1657 case SNDCTL_DSP_GETOSPACE:
1658 if (!(file->f_mode & FMODE_WRITE))
1660 abinfo.fragsize = s->dma_dac.fragsize;
1661 spin_lock_irqsave(&s->lock, flags);
1662 count = s->dma_dac.count;
1663 count -= dma_count_done(&s->dma_dac);
1664 spin_unlock_irqrestore(&s->lock, flags);
1667 abinfo.bytes = (s->dma_dac.dmasize - count) /
1668 s->dma_dac.cnt_factor;
1669 abinfo.fragstotal = s->dma_dac.numfrag;
1670 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1671 #ifdef AU1000_VERBOSE_DEBUG
1672 dbg("bytes=%d, fragments=%d", abinfo.bytes, abinfo.fragments);
1674 return copy_to_user((void *) arg, &abinfo,
1675 sizeof(abinfo)) ? -EFAULT : 0;
1677 case SNDCTL_DSP_GETISPACE:
1678 if (!(file->f_mode & FMODE_READ))
1680 abinfo.fragsize = s->dma_adc.fragsize;
1681 spin_lock_irqsave(&s->lock, flags);
1682 count = s->dma_adc.count;
1683 count += dma_count_done(&s->dma_adc);
1684 spin_unlock_irqrestore(&s->lock, flags);
1687 abinfo.bytes = count / s->dma_adc.cnt_factor;
1688 abinfo.fragstotal = s->dma_adc.numfrag;
1689 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1690 return copy_to_user((void *) arg, &abinfo,
1691 sizeof(abinfo)) ? -EFAULT : 0;
1693 case SNDCTL_DSP_NONBLOCK:
1694 file->f_flags |= O_NONBLOCK;
1697 case SNDCTL_DSP_GETODELAY:
1698 if (!(file->f_mode & FMODE_WRITE))
1700 spin_lock_irqsave(&s->lock, flags);
1701 count = s->dma_dac.count;
1702 count -= dma_count_done(&s->dma_dac);
1703 spin_unlock_irqrestore(&s->lock, flags);
1706 count /= s->dma_dac.cnt_factor;
1707 return put_user(count, (int *) arg);
1709 case SNDCTL_DSP_GETIPTR:
1710 if (!(file->f_mode & FMODE_READ))
1712 spin_lock_irqsave(&s->lock, flags);
1713 cinfo.bytes = s->dma_adc.total_bytes;
1714 count = s->dma_adc.count;
1715 if (!s->dma_adc.stopped) {
1716 diff = dma_count_done(&s->dma_adc);
1718 cinfo.bytes += diff;
1719 cinfo.ptr = virt_to_phys(s->dma_adc.nextIn) + diff -
1722 cinfo.ptr = virt_to_phys(s->dma_adc.nextIn) -
1724 if (s->dma_adc.mapped)
1725 s->dma_adc.count &= (s->dma_adc.dma_fragsize-1);
1726 spin_unlock_irqrestore(&s->lock, flags);
1729 cinfo.blocks = count >> s->dma_adc.fragshift;
1730 return copy_to_user((void *) arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
1732 case SNDCTL_DSP_GETOPTR:
1733 if (!(file->f_mode & FMODE_READ))
1735 spin_lock_irqsave(&s->lock, flags);
1736 cinfo.bytes = s->dma_dac.total_bytes;
1737 count = s->dma_dac.count;
1738 if (!s->dma_dac.stopped) {
1739 diff = dma_count_done(&s->dma_dac);
1741 cinfo.bytes += diff;
1742 cinfo.ptr = virt_to_phys(s->dma_dac.nextOut) + diff -
1745 cinfo.ptr = virt_to_phys(s->dma_dac.nextOut) -
1747 if (s->dma_dac.mapped)
1748 s->dma_dac.count &= (s->dma_dac.dma_fragsize-1);
1749 spin_unlock_irqrestore(&s->lock, flags);
1752 cinfo.blocks = count >> s->dma_dac.fragshift;
1753 return copy_to_user((void *) arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
1755 case SNDCTL_DSP_GETBLKSIZE:
1756 if (file->f_mode & FMODE_WRITE)
1757 return put_user(s->dma_dac.fragsize, (int *) arg);
1759 return put_user(s->dma_adc.fragsize, (int *) arg);
1761 case SNDCTL_DSP_SETFRAGMENT:
1762 if (get_user(val, (int *) arg))
1764 if (file->f_mode & FMODE_READ) {
1766 s->dma_adc.ossfragshift = val & 0xffff;
1767 s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1768 if (s->dma_adc.ossfragshift < 4)
1769 s->dma_adc.ossfragshift = 4;
1770 if (s->dma_adc.ossfragshift > 15)
1771 s->dma_adc.ossfragshift = 15;
1772 if (s->dma_adc.ossmaxfrags < 4)
1773 s->dma_adc.ossmaxfrags = 4;
1774 if ((ret = prog_dmabuf_adc(s)))
1777 if (file->f_mode & FMODE_WRITE) {
1779 s->dma_dac.ossfragshift = val & 0xffff;
1780 s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
1781 if (s->dma_dac.ossfragshift < 4)
1782 s->dma_dac.ossfragshift = 4;
1783 if (s->dma_dac.ossfragshift > 15)
1784 s->dma_dac.ossfragshift = 15;
1785 if (s->dma_dac.ossmaxfrags < 4)
1786 s->dma_dac.ossmaxfrags = 4;
1787 if ((ret = prog_dmabuf_dac(s)))
1792 case SNDCTL_DSP_SUBDIVIDE:
1793 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1794 (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1796 if (get_user(val, (int *) arg))
1798 if (val != 1 && val != 2 && val != 4)
1800 if (file->f_mode & FMODE_READ) {
1802 s->dma_adc.subdivision = val;
1803 if ((ret = prog_dmabuf_adc(s)))
1806 if (file->f_mode & FMODE_WRITE) {
1808 s->dma_dac.subdivision = val;
1809 if ((ret = prog_dmabuf_dac(s)))
1814 case SOUND_PCM_READ_RATE:
1815 return put_user((file->f_mode & FMODE_READ) ?
1816 s->dma_adc.sample_rate :
1817 s->dma_dac.sample_rate,
1820 case SOUND_PCM_READ_CHANNELS:
1821 if (file->f_mode & FMODE_READ)
1822 return put_user(s->dma_adc.num_channels, (int *)arg);
1824 return put_user(s->dma_dac.num_channels, (int *)arg);
1826 case SOUND_PCM_READ_BITS:
1827 if (file->f_mode & FMODE_READ)
1828 return put_user(s->dma_adc.sample_size, (int *)arg);
1830 return put_user(s->dma_dac.sample_size, (int *)arg);
1832 case SOUND_PCM_WRITE_FILTER:
1833 case SNDCTL_DSP_SETSYNCRO:
1834 case SOUND_PCM_READ_FILTER:
1838 return mixdev_ioctl(s->codec, cmd, arg);
1842 static int au1000_open(struct inode *inode, struct file *file)
1844 int minor = iminor(inode);
1845 DECLARE_WAITQUEUE(wait, current);
1846 struct au1000_state *s = &au1000_state;
1849 #ifdef AU1000_VERBOSE_DEBUG
1850 if (file->f_flags & O_NONBLOCK)
1851 dbg("%s: non-blocking", __FUNCTION__);
1853 dbg("%s: blocking", __FUNCTION__);
1856 file->private_data = s;
1857 /* wait for device to become free */
1859 while (s->open_mode & file->f_mode) {
1860 if (file->f_flags & O_NONBLOCK) {
1864 add_wait_queue(&s->open_wait, &wait);
1865 __set_current_state(TASK_INTERRUPTIBLE);
1868 remove_wait_queue(&s->open_wait, &wait);
1869 set_current_state(TASK_RUNNING);
1870 if (signal_pending(current))
1871 return -ERESTARTSYS;
1878 if (file->f_mode & FMODE_READ) {
1879 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags =
1880 s->dma_adc.subdivision = s->dma_adc.total_bytes = 0;
1881 s->dma_adc.num_channels = 1;
1882 s->dma_adc.sample_size = 8;
1883 set_adc_rate(s, 8000);
1884 if ((minor & 0xf) == SND_DEV_DSP16)
1885 s->dma_adc.sample_size = 16;
1888 if (file->f_mode & FMODE_WRITE) {
1889 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags =
1890 s->dma_dac.subdivision = s->dma_dac.total_bytes = 0;
1891 s->dma_dac.num_channels = 1;
1892 s->dma_dac.sample_size = 8;
1893 set_dac_rate(s, 8000);
1894 if ((minor & 0xf) == SND_DEV_DSP16)
1895 s->dma_dac.sample_size = 16;
1898 if (file->f_mode & FMODE_READ) {
1899 if ((ret = prog_dmabuf_adc(s)))
1902 if (file->f_mode & FMODE_WRITE) {
1903 if ((ret = prog_dmabuf_dac(s)))
1907 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1909 init_MUTEX(&s->sem);
1913 static int au1000_release(struct inode *inode, struct file *file)
1915 struct au1000_state *s = (struct au1000_state *)file->private_data;
1919 if (file->f_mode & FMODE_WRITE) {
1921 drain_dac(s, file->f_flags & O_NONBLOCK);
1926 if (file->f_mode & FMODE_WRITE) {
1928 dealloc_dmabuf(s, &s->dma_dac);
1930 if (file->f_mode & FMODE_READ) {
1932 dealloc_dmabuf(s, &s->dma_adc);
1934 s->open_mode &= ((~file->f_mode) & (FMODE_READ|FMODE_WRITE));
1936 wake_up(&s->open_wait);
1941 static /*const */ struct file_operations au1000_audio_fops = {
1942 .owner = THIS_MODULE,
1943 .llseek = au1000_llseek,
1944 .read = au1000_read,
1945 .write = au1000_write,
1946 .poll = au1000_poll,
1947 .ioctl = au1000_ioctl,
1948 .mmap = au1000_mmap,
1949 .open = au1000_open,
1950 .release = au1000_release,
1954 /* --------------------------------------------------------------------- */
1957 /* --------------------------------------------------------------------- */
1960 * for debugging purposes, we'll create a proc device that dumps the
1965 static int proc_au1000_dump(char *buf, char **start, off_t fpos,
1966 int length, int *eof, void *data)
1968 struct au1000_state *s = &au1000_state;
1971 /* print out header */
1972 len += sprintf(buf + len, "\n\t\tAU1000 Audio Debug\n\n");
1974 // print out digital controller state
1975 len += sprintf(buf + len, "AU1000 Audio Controller registers\n");
1976 len += sprintf(buf + len, "---------------------------------\n");
1977 len += sprintf (buf + len, "AC97C_CONFIG = %08x\n",
1978 au_readl(AC97C_CONFIG));
1979 len += sprintf (buf + len, "AC97C_STATUS = %08x\n",
1980 au_readl(AC97C_STATUS));
1981 len += sprintf (buf + len, "AC97C_CNTRL = %08x\n",
1982 au_readl(AC97C_CNTRL));
1984 /* print out CODEC state */
1985 len += sprintf(buf + len, "\nAC97 CODEC registers\n");
1986 len += sprintf(buf + len, "----------------------\n");
1987 for (cnt = 0; cnt <= 0x7e; cnt += 2)
1988 len += sprintf(buf + len, "reg %02x = %04x\n",
1989 cnt, rdcodec(s->codec, cnt));
1996 *start = buf + fpos;
1997 if ((len -= fpos) > length)
2003 #endif /* AU1000_DEBUG */
2005 /* --------------------------------------------------------------------- */
2007 MODULE_AUTHOR("Monta Vista Software, stevel@mvista.com");
2008 MODULE_DESCRIPTION("Au1000 Audio Driver");
2010 /* --------------------------------------------------------------------- */
2012 static int __devinit au1000_probe(void)
2014 struct au1000_state *s = &au1000_state;
2018 memset(s, 0, sizeof(struct au1000_state));
2020 init_waitqueue_head(&s->dma_adc.wait);
2021 init_waitqueue_head(&s->dma_dac.wait);
2022 init_waitqueue_head(&s->open_wait);
2023 init_MUTEX(&s->open_sem);
2024 spin_lock_init(&s->lock);
2026 s->codec = ac97_alloc_codec();
2027 if(s->codec == NULL)
2029 error("Out of memory");
2032 s->codec->private_data = s;
2034 s->codec->codec_read = rdcodec;
2035 s->codec->codec_write = wrcodec;
2036 s->codec->codec_wait = waitcodec;
2038 if (!request_region(virt_to_phys((void *) AC97C_CONFIG),
2039 0x14, AU1000_MODULE_NAME)) {
2040 err("AC'97 ports in use");
2043 // Allocate the DMA Channels
2044 if ((s->dma_dac.dmanr = request_au1000_dma(DMA_ID_AC97C_TX,
2047 SA_INTERRUPT, s)) < 0) {
2048 err("Can't get DAC DMA");
2051 if ((s->dma_adc.dmanr = request_au1000_dma(DMA_ID_AC97C_RX,
2054 SA_INTERRUPT, s)) < 0) {
2055 err("Can't get ADC DMA");
2059 info("DAC: DMA%d/IRQ%d, ADC: DMA%d/IRQ%d",
2060 s->dma_dac.dmanr, get_dma_done_irq(s->dma_dac.dmanr),
2061 s->dma_adc.dmanr, get_dma_done_irq(s->dma_adc.dmanr));
2063 #ifdef USE_COHERENT_DMA
2064 // enable DMA coherency in read/write DMA channels
2065 set_dma_mode(s->dma_dac.dmanr,
2066 get_dma_mode(s->dma_dac.dmanr) & ~DMA_NC);
2067 set_dma_mode(s->dma_adc.dmanr,
2068 get_dma_mode(s->dma_adc.dmanr) & ~DMA_NC);
2070 // disable DMA coherency in read/write DMA channels
2071 set_dma_mode(s->dma_dac.dmanr,
2072 get_dma_mode(s->dma_dac.dmanr) | DMA_NC);
2073 set_dma_mode(s->dma_adc.dmanr,
2074 get_dma_mode(s->dma_adc.dmanr) | DMA_NC);
2077 /* register devices */
2079 if ((s->dev_audio = register_sound_dsp(&au1000_audio_fops, -1)) < 0)
2081 if ((s->codec->dev_mixer =
2082 register_sound_mixer(&au1000_mixer_fops, -1)) < 0)
2086 /* intialize the debug proc device */
2087 s->ps = create_proc_read_entry(AU1000_MODULE_NAME, 0, NULL,
2088 proc_au1000_dump, NULL);
2089 #endif /* AU1000_DEBUG */
2091 // configure pins for AC'97
2092 au_writel(au_readl(SYS_PINFUNC) & ~0x02, SYS_PINFUNC);
2094 // Assert reset for 10msec to the AC'97 controller, and enable clock
2095 au_writel(AC97C_RS | AC97C_CE, AC97C_CNTRL);
2097 au_writel(AC97C_CE, AC97C_CNTRL);
2098 au1000_delay(10); // wait for clock to stabilize
2100 /* cold reset the AC'97 */
2101 au_writel(AC97C_RESET, AC97C_CONFIG);
2103 au_writel(0, AC97C_CONFIG);
2104 /* need to delay around 500msec(bleech) to give
2105 some CODECs enough time to wakeup */
2108 /* warm reset the AC'97 to start the bitclk */
2109 au_writel(AC97C_SG | AC97C_SYNC, AC97C_CONFIG);
2111 au_writel(0, AC97C_CONFIG);
2114 if (!ac97_probe_codec(s->codec))
2117 s->codec_base_caps = rdcodec(s->codec, AC97_RESET);
2118 s->codec_ext_caps = rdcodec(s->codec, AC97_EXTENDED_ID);
2119 info("AC'97 Base/Extended ID = %04x/%04x",
2120 s->codec_base_caps, s->codec_ext_caps);
2123 * On the Pb1000, audio playback is on the AUX_OUT
2124 * channel (which defaults to LNLVL_OUT in AC'97
2125 * rev 2.2) so make sure this channel is listed
2126 * as supported (soundcard.h calls this channel
2127 * ALTPCM). ac97_codec.c does not handle detection
2128 * of this channel correctly.
2130 s->codec->supported_mixers |= SOUND_MASK_ALTPCM;
2132 * Now set AUX_OUT's default volume.
2135 mixdev_ioctl(s->codec, SOUND_MIXER_WRITE_ALTPCM,
2136 (unsigned long) &val);
2138 if (!(s->codec_ext_caps & AC97_EXTID_VRA)) {
2139 // codec does not support VRA
2142 // Boot option says disable VRA
2143 u16 ac97_extstat = rdcodec(s->codec, AC97_EXTENDED_STATUS);
2144 wrcodec(s->codec, AC97_EXTENDED_STATUS,
2145 ac97_extstat & ~AC97_EXTSTAT_VRA);
2149 info("no VRA, interpolating and decimating");
2151 /* set mic to be the recording source */
2152 val = SOUND_MASK_MIC;
2153 mixdev_ioctl(s->codec, SOUND_MIXER_WRITE_RECSRC,
2154 (unsigned long) &val);
2157 sprintf(proc_str, "driver/%s/%d/ac97", AU1000_MODULE_NAME,
2159 s->ac97_ps = create_proc_read_entry (proc_str, 0, NULL,
2160 ac97_read_proc, s->codec);
2166 unregister_sound_mixer(s->codec->dev_mixer);
2168 unregister_sound_dsp(s->dev_audio);
2170 free_au1000_dma(s->dma_adc.dmanr);
2172 free_au1000_dma(s->dma_dac.dmanr);
2174 release_region(virt_to_phys((void *) AC97C_CONFIG), 0x14);
2176 ac97_release_codec(s->codec);
2180 static void au1000_remove(void)
2182 struct au1000_state *s = &au1000_state;
2188 remove_proc_entry(AU1000_MODULE_NAME, NULL);
2189 #endif /* AU1000_DEBUG */
2191 free_au1000_dma(s->dma_adc.dmanr);
2192 free_au1000_dma(s->dma_dac.dmanr);
2193 release_region(virt_to_phys((void *) AC97C_CONFIG), 0x14);
2194 unregister_sound_dsp(s->dev_audio);
2195 unregister_sound_mixer(s->codec->dev_mixer);
2196 ac97_release_codec(s->codec);
2199 static int __init init_au1000(void)
2201 info("stevel@mvista.com, built " __TIME__ " on " __DATE__);
2202 return au1000_probe();
2205 static void __exit cleanup_au1000(void)
2211 module_init(init_au1000);
2212 module_exit(cleanup_au1000);
2214 /* --------------------------------------------------------------------- */
2218 static int __init au1000_setup(char *options)
2222 if (!options || !*options)
2225 while (this_opt = strsep(&options, ",")) {
2228 if (!strncmp(this_opt, "vra", 3)) {
2236 __setup("au1000_audio=", au1000_setup);