1 /*****************************************************************************/
4 * es1371.c -- Creative Ensoniq ES1371.
6 * Copyright (C) 1998-2001, 2003 Thomas Sailer (t.sailer@alumni.ethz.ch)
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 * Special thanks to Ensoniq
25 * /dev/dsp standard /dev/dsp device, (mostly) OSS compatible
26 * /dev/mixer standard /dev/mixer device, (mostly) OSS compatible
27 * /dev/dsp1 additional DAC, like /dev/dsp, but outputs to mixer "SYNTH" setting
28 * /dev/midi simple MIDI UART interface, no ioctl
30 * NOTE: the card does not have any FM/Wavetable synthesizer, it is supposed
31 * to be done in software. That is what /dev/dac is for. By now (Q2 1998)
32 * there are several MIDI to PCM (WAV) packages, one of them is timidity.
35 * 04.06.1998 0.1 Initial release
36 * Mixer stuff should be overhauled; especially optional AC97 mixer bits
37 * should be detected. This results in strange behaviour of some mixer
38 * settings, like master volume and mic.
39 * 08.06.1998 0.2 First release using Alan Cox' soundcore instead of miscdevice
40 * 03.08.1998 0.3 Do not include modversions.h
41 * Now mixer behaviour can basically be selected between
42 * "OSS documented" and "OSS actual" behaviour
43 * 31.08.1998 0.4 Fix realplayer problems - dac.count issues
44 * 27.10.1998 0.5 Fix joystick support
45 * -- Oliver Neukum (c188@org.chemie.uni-muenchen.de)
46 * 10.12.1998 0.6 Fix drain_dac trying to wait on not yet initialized DMA
47 * 23.12.1998 0.7 Fix a few f_file & FMODE_ bugs
48 * Don't wake up app until there are fragsize bytes to read/write
49 * 06.01.1999 0.8 remove the silly SA_INTERRUPT flag.
50 * hopefully killed the egcs section type conflict
51 * 12.03.1999 0.9 cinfo.blocks should be reset after GETxPTR ioctl.
52 * reported by Johan Maes <joma@telindus.be>
53 * 22.03.1999 0.10 return EAGAIN instead of EBUSY when O_NONBLOCK
54 * read/write cannot be executed
55 * 07.04.1999 0.11 implemented the following ioctl's: SOUND_PCM_READ_RATE,
56 * SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS;
57 * Alpha fixes reported by Peter Jones <pjones@redhat.com>
58 * Another Alpha fix (wait_src_ready in init routine)
59 * reported by "Ivan N. Kokshaysky" <ink@jurassic.park.msu.ru>
60 * Note: joystick address handling might still be wrong on archs
62 * 15.06.1999 0.12 Fix bad allocation bug.
63 * Thanks to Deti Fliegl <fliegl@in.tum.de>
64 * 28.06.1999 0.13 Add pci_set_master
65 * 03.08.1999 0.14 adapt to Linus' new __setup/__initcall
66 * added kernel command line option "es1371=joystickaddr"
67 * removed CONFIG_SOUND_ES1371_JOYPORT_BOOT kludge
68 * 10.08.1999 0.15 (Re)added S/PDIF module option for cards revision >= 4.
69 * Initial version by Dave Platt <dplatt@snulbug.mtview.ca.us>.
70 * module_init/__setup fixes
71 * 08.16.1999 0.16 Joe Cotellese <joec@ensoniq.com>
72 * Added detection for ES1371 revision ID so that we can
73 * detect the ES1373 and later parts.
74 * added AC97 #defines for readability
75 * added a /proc file system for dumping hardware state
76 * updated SRC and CODEC w/r functions to accommodate bugs
77 * in some versions of the ES137x chips.
78 * 31.08.1999 0.17 add spin_lock_init
79 * replaced current->state = x with set_current_state(x)
80 * 03.09.1999 0.18 change read semantics for MIDI to match
81 * OSS more closely; remove possible wakeup race
82 * 21.10.1999 0.19 Round sampling rates, requested by
83 * Kasamatsu Kenichi <t29w0267@ip.media.kyoto-u.ac.jp>
84 * 27.10.1999 0.20 Added SigmaTel 3D enhancement string
85 * Codec ID printing changes
86 * 28.10.1999 0.21 More waitqueue races fixed
87 * Joe Cotellese <joec@ensoniq.com>
88 * Changed PCI detection routine so we can more easily
89 * detect ES137x chip and derivatives.
90 * 05.01.2000 0.22 Should now work with rev7 boards; patch by
91 * Eric Lemar, elemar@cs.washington.edu
92 * 08.01.2000 0.23 Prevent some ioctl's from returning bad count values on underrun/overrun;
93 * Tim Janik's BSE (Bedevilled Sound Engine) found this
94 * 07.02.2000 0.24 Use pci_alloc_consistent and pci_register_driver
95 * 07.02.2000 0.25 Use ac97_codec
96 * 01.03.2000 0.26 SPDIF patch by Mikael Bouillot <mikael.bouillot@bigfoot.com>
98 * 21.11.2000 0.27 Initialize dma buffers in poll, otherwise poll may return a bogus mask
99 * 12.12.2000 0.28 More dma buffer initializations, patch from
100 * Tjeerd Mulder <tjeerd.mulder@fujitsu-siemens.com>
101 * 05.01.2001 0.29 Hopefully updates will not be required anymore when Creative bumps
102 * the CT5880 revision.
103 * suggested by Stephan Müller <smueller@chronox.de>
104 * 31.01.2001 0.30 Register/Unregister gameport
105 * Fix SETTRIGGER non OSS API conformity
106 * 14.07.2001 0.31 Add list of laptops needing amplifier control
107 * 03.01.2003 0.32 open_mode fixes from Georg Acher <acher@in.tum.de>
110 /*****************************************************************************/
112 #include <linux/interrupt.h>
113 #include <linux/module.h>
114 #include <linux/string.h>
115 #include <linux/ioport.h>
116 #include <linux/sched.h>
117 #include <linux/delay.h>
118 #include <linux/sound.h>
119 #include <linux/slab.h>
120 #include <linux/soundcard.h>
121 #include <linux/pci.h>
122 #include <linux/init.h>
123 #include <linux/poll.h>
124 #include <linux/bitops.h>
125 #include <linux/proc_fs.h>
126 #include <linux/spinlock.h>
127 #include <linux/smp_lock.h>
128 #include <linux/ac97_codec.h>
129 #include <linux/gameport.h>
130 #include <linux/wait.h>
133 #include <asm/page.h>
134 #include <asm/uaccess.h>
136 /* --------------------------------------------------------------------- */
138 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
141 /*#define DBG(x) {x}*/
143 /* --------------------------------------------------------------------- */
145 #ifndef PCI_VENDOR_ID_ENSONIQ
146 #define PCI_VENDOR_ID_ENSONIQ 0x1274
149 #ifndef PCI_VENDOR_ID_ECTIVA
150 #define PCI_VENDOR_ID_ECTIVA 0x1102
153 #ifndef PCI_DEVICE_ID_ENSONIQ_ES1371
154 #define PCI_DEVICE_ID_ENSONIQ_ES1371 0x1371
157 #ifndef PCI_DEVICE_ID_ENSONIQ_CT5880
158 #define PCI_DEVICE_ID_ENSONIQ_CT5880 0x5880
161 #ifndef PCI_DEVICE_ID_ECTIVA_EV1938
162 #define PCI_DEVICE_ID_ECTIVA_EV1938 0x8938
166 /* This is a little confusing because all ES1371 compatible chips have the
167 same DEVICE_ID, the only thing differentiating them is the REV_ID field.
168 This is only significant if you want to enable features on the later parts.
169 Yes, I know it's stupid and why didn't we use the sub IDs?
171 #define ES1371REV_ES1373_A 0x04
172 #define ES1371REV_ES1373_B 0x06
173 #define ES1371REV_CT5880_A 0x07
174 #define CT5880REV_CT5880_C 0x02
175 #define CT5880REV_CT5880_D 0x03
176 #define ES1371REV_ES1371_B 0x09
177 #define EV1938REV_EV1938_A 0x00
178 #define ES1371REV_ES1373_8 0x08
180 #define ES1371_MAGIC ((PCI_VENDOR_ID_ENSONIQ<<16)|PCI_DEVICE_ID_ENSONIQ_ES1371)
182 #define ES1371_EXTENT 0x40
185 #define ES1371_REG_CONTROL 0x00
186 #define ES1371_REG_STATUS 0x04 /* on the 5880 it is control/status */
187 #define ES1371_REG_UART_DATA 0x08
188 #define ES1371_REG_UART_STATUS 0x09
189 #define ES1371_REG_UART_CONTROL 0x09
190 #define ES1371_REG_UART_TEST 0x0a
191 #define ES1371_REG_MEMPAGE 0x0c
192 #define ES1371_REG_SRCONV 0x10
193 #define ES1371_REG_CODEC 0x14
194 #define ES1371_REG_LEGACY 0x18
195 #define ES1371_REG_SERIAL_CONTROL 0x20
196 #define ES1371_REG_DAC1_SCOUNT 0x24
197 #define ES1371_REG_DAC2_SCOUNT 0x28
198 #define ES1371_REG_ADC_SCOUNT 0x2c
200 #define ES1371_REG_DAC1_FRAMEADR 0xc30
201 #define ES1371_REG_DAC1_FRAMECNT 0xc34
202 #define ES1371_REG_DAC2_FRAMEADR 0xc38
203 #define ES1371_REG_DAC2_FRAMECNT 0xc3c
204 #define ES1371_REG_ADC_FRAMEADR 0xd30
205 #define ES1371_REG_ADC_FRAMECNT 0xd34
207 #define ES1371_FMT_U8_MONO 0
208 #define ES1371_FMT_U8_STEREO 1
209 #define ES1371_FMT_S16_MONO 2
210 #define ES1371_FMT_S16_STEREO 3
211 #define ES1371_FMT_STEREO 1
212 #define ES1371_FMT_S16 2
213 #define ES1371_FMT_MASK 3
215 static const unsigned sample_size[] = { 1, 2, 2, 4 };
216 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
218 #define CTRL_RECEN_B 0x08000000 /* 1 = don't mix analog in to digital out */
219 #define CTRL_SPDIFEN_B 0x04000000
220 #define CTRL_JOY_SHIFT 24
221 #define CTRL_JOY_MASK 3
222 #define CTRL_JOY_200 0x00000000 /* joystick base address */
223 #define CTRL_JOY_208 0x01000000
224 #define CTRL_JOY_210 0x02000000
225 #define CTRL_JOY_218 0x03000000
226 #define CTRL_GPIO_IN0 0x00100000 /* general purpose inputs/outputs */
227 #define CTRL_GPIO_IN1 0x00200000
228 #define CTRL_GPIO_IN2 0x00400000
229 #define CTRL_GPIO_IN3 0x00800000
230 #define CTRL_GPIO_OUT0 0x00010000
231 #define CTRL_GPIO_OUT1 0x00020000
232 #define CTRL_GPIO_OUT2 0x00040000
233 #define CTRL_GPIO_OUT3 0x00080000
234 #define CTRL_MSFMTSEL 0x00008000 /* MPEG serial data fmt: 0 = Sony, 1 = I2S */
235 #define CTRL_SYNCRES 0x00004000 /* AC97 warm reset */
236 #define CTRL_ADCSTOP 0x00002000 /* stop ADC transfers */
237 #define CTRL_PWR_INTRM 0x00001000 /* 1 = power level ints enabled */
238 #define CTRL_M_CB 0x00000800 /* recording source: 0 = ADC, 1 = MPEG */
239 #define CTRL_CCB_INTRM 0x00000400 /* 1 = CCB "voice" ints enabled */
240 #define CTRL_PDLEV0 0x00000000 /* power down level */
241 #define CTRL_PDLEV1 0x00000100
242 #define CTRL_PDLEV2 0x00000200
243 #define CTRL_PDLEV3 0x00000300
244 #define CTRL_BREQ 0x00000080 /* 1 = test mode (internal mem test) */
245 #define CTRL_DAC1_EN 0x00000040 /* enable DAC1 */
246 #define CTRL_DAC2_EN 0x00000020 /* enable DAC2 */
247 #define CTRL_ADC_EN 0x00000010 /* enable ADC */
248 #define CTRL_UART_EN 0x00000008 /* enable MIDI uart */
249 #define CTRL_JYSTK_EN 0x00000004 /* enable Joystick port */
250 #define CTRL_XTALCLKDIS 0x00000002 /* 1 = disable crystal clock input */
251 #define CTRL_PCICLKDIS 0x00000001 /* 1 = disable PCI clock distribution */
254 #define STAT_INTR 0x80000000 /* wired or of all interrupt bits */
255 #define CSTAT_5880_AC97_RST 0x20000000 /* CT5880 Reset bit */
256 #define STAT_EN_SPDIF 0x00040000 /* enable S/PDIF circuitry */
257 #define STAT_TS_SPDIF 0x00020000 /* test S/PDIF circuitry */
258 #define STAT_TESTMODE 0x00010000 /* test ASIC */
259 #define STAT_SYNC_ERR 0x00000100 /* 1 = codec sync error */
260 #define STAT_VC 0x000000c0 /* CCB int source, 0=DAC1, 1=DAC2, 2=ADC, 3=undef */
262 #define STAT_MPWR 0x00000020 /* power level interrupt */
263 #define STAT_MCCB 0x00000010 /* CCB int pending */
264 #define STAT_UART 0x00000008 /* UART int pending */
265 #define STAT_DAC1 0x00000004 /* DAC1 int pending */
266 #define STAT_DAC2 0x00000002 /* DAC2 int pending */
267 #define STAT_ADC 0x00000001 /* ADC int pending */
269 #define USTAT_RXINT 0x80 /* UART rx int pending */
270 #define USTAT_TXINT 0x04 /* UART tx int pending */
271 #define USTAT_TXRDY 0x02 /* UART tx ready */
272 #define USTAT_RXRDY 0x01 /* UART rx ready */
274 #define UCTRL_RXINTEN 0x80 /* 1 = enable RX ints */
275 #define UCTRL_TXINTEN 0x60 /* TX int enable field mask */
276 #define UCTRL_ENA_TXINT 0x20 /* enable TX int */
277 #define UCTRL_CNTRL 0x03 /* control field */
278 #define UCTRL_CNTRL_SWR 0x03 /* software reset command */
280 /* sample rate converter */
281 #define SRC_OKSTATE 1
283 #define SRC_RAMADDR_MASK 0xfe000000
284 #define SRC_RAMADDR_SHIFT 25
285 #define SRC_DAC1FREEZE (1UL << 21)
286 #define SRC_DAC2FREEZE (1UL << 20)
287 #define SRC_ADCFREEZE (1UL << 19)
290 #define SRC_WE 0x01000000 /* read/write control for SRC RAM */
291 #define SRC_BUSY 0x00800000 /* SRC busy */
292 #define SRC_DIS 0x00400000 /* 1 = disable SRC */
293 #define SRC_DDAC1 0x00200000 /* 1 = disable accum update for DAC1 */
294 #define SRC_DDAC2 0x00100000 /* 1 = disable accum update for DAC2 */
295 #define SRC_DADC 0x00080000 /* 1 = disable accum update for ADC2 */
296 #define SRC_CTLMASK 0x00780000
297 #define SRC_RAMDATA_MASK 0x0000ffff
298 #define SRC_RAMDATA_SHIFT 0
300 #define SRCREG_ADC 0x78
301 #define SRCREG_DAC1 0x70
302 #define SRCREG_DAC2 0x74
303 #define SRCREG_VOL_ADC 0x6c
304 #define SRCREG_VOL_DAC1 0x7c
305 #define SRCREG_VOL_DAC2 0x7e
307 #define SRCREG_TRUNC_N 0x00
308 #define SRCREG_INT_REGS 0x01
309 #define SRCREG_ACCUM_FRAC 0x02
310 #define SRCREG_VFREQ_FRAC 0x03
312 #define CODEC_PIRD 0x00800000 /* 0 = write AC97 register */
313 #define CODEC_PIADD_MASK 0x007f0000
314 #define CODEC_PIADD_SHIFT 16
315 #define CODEC_PIDAT_MASK 0x0000ffff
316 #define CODEC_PIDAT_SHIFT 0
318 #define CODEC_RDY 0x80000000 /* AC97 read data valid */
319 #define CODEC_WIP 0x40000000 /* AC97 write in progress */
320 #define CODEC_PORD 0x00800000 /* 0 = write AC97 register */
321 #define CODEC_POADD_MASK 0x007f0000
322 #define CODEC_POADD_SHIFT 16
323 #define CODEC_PODAT_MASK 0x0000ffff
324 #define CODEC_PODAT_SHIFT 0
327 #define LEGACY_JFAST 0x80000000 /* fast joystick timing */
328 #define LEGACY_FIRQ 0x01000000 /* force IRQ */
330 #define SCTRL_DACTEST 0x00400000 /* 1 = DAC test, test vector generation purposes */
331 #define SCTRL_P2ENDINC 0x00380000 /* */
332 #define SCTRL_SH_P2ENDINC 19
333 #define SCTRL_P2STINC 0x00070000 /* */
334 #define SCTRL_SH_P2STINC 16
335 #define SCTRL_R1LOOPSEL 0x00008000 /* 0 = loop mode */
336 #define SCTRL_P2LOOPSEL 0x00004000 /* 0 = loop mode */
337 #define SCTRL_P1LOOPSEL 0x00002000 /* 0 = loop mode */
338 #define SCTRL_P2PAUSE 0x00001000 /* 1 = pause mode */
339 #define SCTRL_P1PAUSE 0x00000800 /* 1 = pause mode */
340 #define SCTRL_R1INTEN 0x00000400 /* enable interrupt */
341 #define SCTRL_P2INTEN 0x00000200 /* enable interrupt */
342 #define SCTRL_P1INTEN 0x00000100 /* enable interrupt */
343 #define SCTRL_P1SCTRLD 0x00000080 /* reload sample count register for DAC1 */
344 #define SCTRL_P2DACSEN 0x00000040 /* 1 = DAC2 play back last sample when disabled */
345 #define SCTRL_R1SEB 0x00000020 /* 1 = 16bit */
346 #define SCTRL_R1SMB 0x00000010 /* 1 = stereo */
347 #define SCTRL_R1FMT 0x00000030 /* format mask */
348 #define SCTRL_SH_R1FMT 4
349 #define SCTRL_P2SEB 0x00000008 /* 1 = 16bit */
350 #define SCTRL_P2SMB 0x00000004 /* 1 = stereo */
351 #define SCTRL_P2FMT 0x0000000c /* format mask */
352 #define SCTRL_SH_P2FMT 2
353 #define SCTRL_P1SEB 0x00000002 /* 1 = 16bit */
354 #define SCTRL_P1SMB 0x00000001 /* 1 = stereo */
355 #define SCTRL_P1FMT 0x00000003 /* format mask */
356 #define SCTRL_SH_P1FMT 0
360 #define POLL_COUNT 0x1000
361 #define FMODE_DAC 4 /* slight misuse of mode_t */
363 /* MIDI buffer sizes */
365 #define MIDIINBUF 256
366 #define MIDIOUTBUF 256
368 #define FMODE_MIDI_SHIFT 3
369 #define FMODE_MIDI_READ (FMODE_READ << FMODE_MIDI_SHIFT)
370 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
372 #define ES1371_MODULE_NAME "es1371"
373 #define PFX ES1371_MODULE_NAME ": "
375 /* --------------------------------------------------------------------- */
377 struct es1371_state {
381 /* list of es1371 devices */
382 struct list_head devs;
384 /* the corresponding pci_dev structure */
387 /* soundcore stuff */
392 /* hardware resources */
393 unsigned long io; /* long for SPARC */
399 u8 rev; /* the chip revision */
402 int spdif_volume; /* S/PDIF output is enabled if != -1 */
405 /* debug /proc entry */
406 struct proc_dir_entry *ps;
407 #endif /* ES1371_DEBUG */
409 struct ac97_codec *codec;
414 unsigned dac1rate, dac2rate, adcrate;
417 struct semaphore open_sem;
419 wait_queue_head_t open_wait;
427 unsigned hwptr, swptr;
428 unsigned total_bytes;
430 unsigned error; /* over/underrun */
431 wait_queue_head_t wait;
432 /* redundant, but makes calculations easier */
435 unsigned fragsamples;
439 unsigned endcleared:1;
441 unsigned ossfragshift;
443 unsigned subdivision;
444 } dma_dac1, dma_dac2, dma_adc;
448 unsigned ird, iwr, icnt;
449 unsigned ord, owr, ocnt;
450 wait_queue_head_t iwait;
451 wait_queue_head_t owait;
452 unsigned char ibuf[MIDIINBUF];
453 unsigned char obuf[MIDIOUTBUF];
456 struct gameport gameport;
457 struct semaphore sem;
460 /* --------------------------------------------------------------------- */
462 static LIST_HEAD(devs);
464 /* --------------------------------------------------------------------- */
466 static inline unsigned ld2(unsigned int x)
491 /* --------------------------------------------------------------------- */
493 static unsigned wait_src_ready(struct es1371_state *s)
497 for (t = 0; t < POLL_COUNT; t++) {
498 if (!((r = inl(s->io + ES1371_REG_SRCONV)) & SRC_BUSY))
502 printk(KERN_DEBUG PFX "sample rate converter timeout r = 0x%08x\n", r);
506 static unsigned src_read(struct es1371_state *s, unsigned reg)
508 unsigned int temp,i,orig;
511 temp = wait_src_ready (s);
513 /* we can only access the SRC at certain times, make sure
514 we're allowed to before we read */
517 /* expose the SRC state bits */
518 outl ( (temp & SRC_CTLMASK) | (reg << SRC_RAMADDR_SHIFT) | 0x10000UL,
519 s->io + ES1371_REG_SRCONV);
521 /* now, wait for busy and the correct time to read */
522 temp = wait_src_ready (s);
524 if ( (temp & 0x00870000UL ) != ( SRC_OKSTATE << 16 )){
525 /* wait for the right state */
526 for (i=0; i<POLL_COUNT; i++){
527 temp = inl (s->io + ES1371_REG_SRCONV);
528 if ( (temp & 0x00870000UL ) == ( SRC_OKSTATE << 16 ))
533 /* hide the state bits */
534 outl ((orig & SRC_CTLMASK) | (reg << SRC_RAMADDR_SHIFT), s->io + ES1371_REG_SRCONV);
540 static void src_write(struct es1371_state *s, unsigned reg, unsigned data)
545 r = wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC);
546 r |= (reg << SRC_RAMADDR_SHIFT) & SRC_RAMADDR_MASK;
547 r |= (data << SRC_RAMDATA_SHIFT) & SRC_RAMDATA_MASK;
548 outl(r | SRC_WE, s->io + ES1371_REG_SRCONV);
552 /* --------------------------------------------------------------------- */
554 /* most of the following here is black magic */
555 static void set_adc_rate(struct es1371_state *s, unsigned rate)
558 unsigned int n, truncm, freq;
565 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9)))
567 truncm = (21 * n - 1) | 1;
568 freq = ((48000UL << 15) / rate) * n;
569 s->adcrate = (48000UL << 15) / (freq / n);
570 spin_lock_irqsave(&s->lock, flags);
574 src_write(s, SRCREG_ADC+SRCREG_TRUNC_N,
575 (((239 - truncm) >> 1) << 9) | (n << 4));
579 src_write(s, SRCREG_ADC+SRCREG_TRUNC_N,
580 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4));
582 src_write(s, SRCREG_ADC+SRCREG_INT_REGS,
583 (src_read(s, SRCREG_ADC+SRCREG_INT_REGS) & 0x00ff) |
584 ((freq >> 5) & 0xfc00));
585 src_write(s, SRCREG_ADC+SRCREG_VFREQ_FRAC, freq & 0x7fff);
586 src_write(s, SRCREG_VOL_ADC, n << 8);
587 src_write(s, SRCREG_VOL_ADC+1, n << 8);
588 spin_unlock_irqrestore(&s->lock, flags);
592 static void set_dac1_rate(struct es1371_state *s, unsigned rate)
595 unsigned int freq, r;
601 freq = ((rate << 15) + 1500) / 3000;
602 s->dac1rate = (freq * 3000 + 16384) >> 15;
603 spin_lock_irqsave(&s->lock, flags);
604 r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC2 | SRC_DADC)) | SRC_DDAC1;
605 outl(r, s->io + ES1371_REG_SRCONV);
606 src_write(s, SRCREG_DAC1+SRCREG_INT_REGS,
607 (src_read(s, SRCREG_DAC1+SRCREG_INT_REGS) & 0x00ff) |
608 ((freq >> 5) & 0xfc00));
609 src_write(s, SRCREG_DAC1+SRCREG_VFREQ_FRAC, freq & 0x7fff);
610 r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC2 | SRC_DADC));
611 outl(r, s->io + ES1371_REG_SRCONV);
612 spin_unlock_irqrestore(&s->lock, flags);
615 static void set_dac2_rate(struct es1371_state *s, unsigned rate)
618 unsigned int freq, r;
624 freq = ((rate << 15) + 1500) / 3000;
625 s->dac2rate = (freq * 3000 + 16384) >> 15;
626 spin_lock_irqsave(&s->lock, flags);
627 r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DADC)) | SRC_DDAC2;
628 outl(r, s->io + ES1371_REG_SRCONV);
629 src_write(s, SRCREG_DAC2+SRCREG_INT_REGS,
630 (src_read(s, SRCREG_DAC2+SRCREG_INT_REGS) & 0x00ff) |
631 ((freq >> 5) & 0xfc00));
632 src_write(s, SRCREG_DAC2+SRCREG_VFREQ_FRAC, freq & 0x7fff);
633 r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DADC));
634 outl(r, s->io + ES1371_REG_SRCONV);
635 spin_unlock_irqrestore(&s->lock, flags);
638 /* --------------------------------------------------------------------- */
640 static void __init src_init(struct es1371_state *s)
644 /* before we enable or disable the SRC we need
645 to wait for it to become ready */
648 outl(SRC_DIS, s->io + ES1371_REG_SRCONV);
650 for (i = 0; i < 0x80; i++)
653 src_write(s, SRCREG_DAC1+SRCREG_TRUNC_N, 16 << 4);
654 src_write(s, SRCREG_DAC1+SRCREG_INT_REGS, 16 << 10);
655 src_write(s, SRCREG_DAC2+SRCREG_TRUNC_N, 16 << 4);
656 src_write(s, SRCREG_DAC2+SRCREG_INT_REGS, 16 << 10);
657 src_write(s, SRCREG_VOL_ADC, 1 << 12);
658 src_write(s, SRCREG_VOL_ADC+1, 1 << 12);
659 src_write(s, SRCREG_VOL_DAC1, 1 << 12);
660 src_write(s, SRCREG_VOL_DAC1+1, 1 << 12);
661 src_write(s, SRCREG_VOL_DAC2, 1 << 12);
662 src_write(s, SRCREG_VOL_DAC2+1, 1 << 12);
663 set_adc_rate(s, 22050);
664 set_dac1_rate(s, 22050);
665 set_dac2_rate(s, 22050);
668 * enabling the sample rate converter without properly programming
669 * its parameters causes the chip to lock up (the SRC busy bit will
670 * be stuck high, and I've found no way to rectify this other than
674 outl(0, s->io+ES1371_REG_SRCONV);
677 /* --------------------------------------------------------------------- */
679 static void wrcodec(struct ac97_codec *codec, u8 addr, u16 data)
681 struct es1371_state *s = (struct es1371_state *)codec->private_data;
685 spin_lock_irqsave(&s->lock, flags);
686 for (t = 0; t < POLL_COUNT; t++)
687 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
690 /* save the current state for later */
691 x = wait_src_ready(s);
693 /* enable SRC state data in SRC mux */
694 outl((x & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC)) | 0x00010000,
695 s->io+ES1371_REG_SRCONV);
697 /* wait for not busy (state 0) first to avoid
699 for (t=0; t<POLL_COUNT; t++){
700 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0 )
705 /* wait for a SAFE time to write addr/data and then do it, dammit */
706 for (t=0; t<POLL_COUNT; t++){
707 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0x00010000)
712 outl(((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) |
713 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK), s->io+ES1371_REG_CODEC);
715 /* restore SRC reg */
717 outl(x, s->io+ES1371_REG_SRCONV);
718 spin_unlock_irqrestore(&s->lock, flags);
721 static u16 rdcodec(struct ac97_codec *codec, u8 addr)
723 struct es1371_state *s = (struct es1371_state *)codec->private_data;
727 spin_lock_irqsave(&s->lock, flags);
729 /* wait for WIP to go away */
730 for (t = 0; t < 0x1000; t++)
731 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
734 /* save the current state for later */
735 x = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC));
737 /* enable SRC state data in SRC mux */
738 outl( x | 0x00010000,
739 s->io+ES1371_REG_SRCONV);
741 /* wait for not busy (state 0) first to avoid
743 for (t=0; t<POLL_COUNT; t++){
744 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0 )
749 /* wait for a SAFE time to write addr/data and then do it, dammit */
750 for (t=0; t<POLL_COUNT; t++){
751 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0x00010000)
756 outl(((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD, s->io+ES1371_REG_CODEC);
757 /* restore SRC reg */
759 outl(x, s->io+ES1371_REG_SRCONV);
761 /* wait for WIP again */
762 for (t = 0; t < 0x1000; t++)
763 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
766 /* now wait for the stinkin' data (RDY) */
767 for (t = 0; t < POLL_COUNT; t++)
768 if ((x = inl(s->io+ES1371_REG_CODEC)) & CODEC_RDY)
771 spin_unlock_irqrestore(&s->lock, flags);
772 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT);
775 /* --------------------------------------------------------------------- */
777 static inline void stop_adc(struct es1371_state *s)
781 spin_lock_irqsave(&s->lock, flags);
782 s->ctrl &= ~CTRL_ADC_EN;
783 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
784 spin_unlock_irqrestore(&s->lock, flags);
787 static inline void stop_dac1(struct es1371_state *s)
791 spin_lock_irqsave(&s->lock, flags);
792 s->ctrl &= ~CTRL_DAC1_EN;
793 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
794 spin_unlock_irqrestore(&s->lock, flags);
797 static inline void stop_dac2(struct es1371_state *s)
801 spin_lock_irqsave(&s->lock, flags);
802 s->ctrl &= ~CTRL_DAC2_EN;
803 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
804 spin_unlock_irqrestore(&s->lock, flags);
807 static void start_dac1(struct es1371_state *s)
810 unsigned fragremain, fshift;
812 spin_lock_irqsave(&s->lock, flags);
813 if (!(s->ctrl & CTRL_DAC1_EN) && (s->dma_dac1.mapped || s->dma_dac1.count > 0)
814 && s->dma_dac1.ready) {
815 s->ctrl |= CTRL_DAC1_EN;
816 s->sctrl = (s->sctrl & ~(SCTRL_P1LOOPSEL | SCTRL_P1PAUSE | SCTRL_P1SCTRLD)) | SCTRL_P1INTEN;
817 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
818 fragremain = ((- s->dma_dac1.hwptr) & (s->dma_dac1.fragsize-1));
819 fshift = sample_shift[(s->sctrl & SCTRL_P1FMT) >> SCTRL_SH_P1FMT];
820 if (fragremain < 2*fshift)
821 fragremain = s->dma_dac1.fragsize;
822 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_DAC1_SCOUNT);
823 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
824 outl((s->dma_dac1.fragsize >> fshift) - 1, s->io+ES1371_REG_DAC1_SCOUNT);
826 spin_unlock_irqrestore(&s->lock, flags);
829 static void start_dac2(struct es1371_state *s)
832 unsigned fragremain, fshift;
834 spin_lock_irqsave(&s->lock, flags);
835 if (!(s->ctrl & CTRL_DAC2_EN) && (s->dma_dac2.mapped || s->dma_dac2.count > 0)
836 && s->dma_dac2.ready) {
837 s->ctrl |= CTRL_DAC2_EN;
838 s->sctrl = (s->sctrl & ~(SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | SCTRL_P2DACSEN |
839 SCTRL_P2ENDINC | SCTRL_P2STINC)) | SCTRL_P2INTEN |
840 (((s->sctrl & SCTRL_P2FMT) ? 2 : 1) << SCTRL_SH_P2ENDINC) |
841 (0 << SCTRL_SH_P2STINC);
842 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
843 fragremain = ((- s->dma_dac2.hwptr) & (s->dma_dac2.fragsize-1));
844 fshift = sample_shift[(s->sctrl & SCTRL_P2FMT) >> SCTRL_SH_P2FMT];
845 if (fragremain < 2*fshift)
846 fragremain = s->dma_dac2.fragsize;
847 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_DAC2_SCOUNT);
848 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
849 outl((s->dma_dac2.fragsize >> fshift) - 1, s->io+ES1371_REG_DAC2_SCOUNT);
851 spin_unlock_irqrestore(&s->lock, flags);
854 static void start_adc(struct es1371_state *s)
857 unsigned fragremain, fshift;
859 spin_lock_irqsave(&s->lock, flags);
860 if (!(s->ctrl & CTRL_ADC_EN) && (s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
861 && s->dma_adc.ready) {
862 s->ctrl |= CTRL_ADC_EN;
863 s->sctrl = (s->sctrl & ~SCTRL_R1LOOPSEL) | SCTRL_R1INTEN;
864 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
865 fragremain = ((- s->dma_adc.hwptr) & (s->dma_adc.fragsize-1));
866 fshift = sample_shift[(s->sctrl & SCTRL_R1FMT) >> SCTRL_SH_R1FMT];
867 if (fragremain < 2*fshift)
868 fragremain = s->dma_adc.fragsize;
869 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_ADC_SCOUNT);
870 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
871 outl((s->dma_adc.fragsize >> fshift) - 1, s->io+ES1371_REG_ADC_SCOUNT);
873 spin_unlock_irqrestore(&s->lock, flags);
876 /* --------------------------------------------------------------------- */
878 #define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
879 #define DMABUF_MINORDER 1
882 static inline void dealloc_dmabuf(struct es1371_state *s, struct dmabuf *db)
884 struct page *page, *pend;
887 /* undo marking the pages as reserved */
888 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
889 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
890 ClearPageReserved(page);
891 pci_free_consistent(s->dev, PAGE_SIZE << db->buforder, db->rawbuf, db->dmaaddr);
894 db->mapped = db->ready = 0;
897 static int prog_dmabuf(struct es1371_state *s, struct dmabuf *db, unsigned rate, unsigned fmt, unsigned reg)
902 struct page *page, *pend;
904 db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
906 db->ready = db->mapped = 0;
907 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
908 if ((db->rawbuf = pci_alloc_consistent(s->dev, PAGE_SIZE << order, &db->dmaaddr)))
912 db->buforder = order;
913 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
914 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
915 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
916 SetPageReserved(page);
918 fmt &= ES1371_FMT_MASK;
919 bytepersec = rate << sample_shift[fmt];
920 bufs = PAGE_SIZE << db->buforder;
921 if (db->ossfragshift) {
922 if ((1000 << db->ossfragshift) < bytepersec)
923 db->fragshift = ld2(bytepersec/1000);
925 db->fragshift = db->ossfragshift;
927 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
928 if (db->fragshift < 3)
931 db->numfrag = bufs >> db->fragshift;
932 while (db->numfrag < 4 && db->fragshift > 3) {
934 db->numfrag = bufs >> db->fragshift;
936 db->fragsize = 1 << db->fragshift;
937 if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
938 db->numfrag = db->ossmaxfrags;
939 db->fragsamples = db->fragsize >> sample_shift[fmt];
940 db->dmasize = db->numfrag << db->fragshift;
941 memset(db->rawbuf, (fmt & ES1371_FMT_S16) ? 0 : 0x80, db->dmasize);
942 outl((reg >> 8) & 15, s->io+ES1371_REG_MEMPAGE);
943 outl(db->dmaaddr, s->io+(reg & 0xff));
944 outl((db->dmasize >> 2)-1, s->io+((reg + 4) & 0xff));
950 static inline int prog_dmabuf_adc(struct es1371_state *s)
953 return prog_dmabuf(s, &s->dma_adc, s->adcrate, (s->sctrl >> SCTRL_SH_R1FMT) & ES1371_FMT_MASK,
954 ES1371_REG_ADC_FRAMEADR);
957 static inline int prog_dmabuf_dac2(struct es1371_state *s)
960 return prog_dmabuf(s, &s->dma_dac2, s->dac2rate, (s->sctrl >> SCTRL_SH_P2FMT) & ES1371_FMT_MASK,
961 ES1371_REG_DAC2_FRAMEADR);
964 static inline int prog_dmabuf_dac1(struct es1371_state *s)
967 return prog_dmabuf(s, &s->dma_dac1, s->dac1rate, (s->sctrl >> SCTRL_SH_P1FMT) & ES1371_FMT_MASK,
968 ES1371_REG_DAC1_FRAMEADR);
971 static inline unsigned get_hwptr(struct es1371_state *s, struct dmabuf *db, unsigned reg)
973 unsigned hwptr, diff;
975 outl((reg >> 8) & 15, s->io+ES1371_REG_MEMPAGE);
976 hwptr = (inl(s->io+(reg & 0xff)) >> 14) & 0x3fffc;
977 diff = (db->dmasize + hwptr - db->hwptr) % db->dmasize;
982 static inline void clear_advance(void *buf, unsigned bsize, unsigned bptr, unsigned len, unsigned char c)
984 if (bptr + len > bsize) {
985 unsigned x = bsize - bptr;
986 memset(((char *)buf) + bptr, c, x);
990 memset(((char *)buf) + bptr, c, len);
993 /* call with spinlock held! */
994 static void es1371_update_ptr(struct es1371_state *s)
998 /* update ADC pointer */
999 if (s->ctrl & CTRL_ADC_EN) {
1000 diff = get_hwptr(s, &s->dma_adc, ES1371_REG_ADC_FRAMECNT);
1001 s->dma_adc.total_bytes += diff;
1002 s->dma_adc.count += diff;
1003 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1004 wake_up(&s->dma_adc.wait);
1005 if (!s->dma_adc.mapped) {
1006 if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
1007 s->ctrl &= ~CTRL_ADC_EN;
1008 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
1013 /* update DAC1 pointer */
1014 if (s->ctrl & CTRL_DAC1_EN) {
1015 diff = get_hwptr(s, &s->dma_dac1, ES1371_REG_DAC1_FRAMECNT);
1016 s->dma_dac1.total_bytes += diff;
1017 if (s->dma_dac1.mapped) {
1018 s->dma_dac1.count += diff;
1019 if (s->dma_dac1.count >= (signed)s->dma_dac1.fragsize)
1020 wake_up(&s->dma_dac1.wait);
1022 s->dma_dac1.count -= diff;
1023 if (s->dma_dac1.count <= 0) {
1024 s->ctrl &= ~CTRL_DAC1_EN;
1025 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
1026 s->dma_dac1.error++;
1027 } else if (s->dma_dac1.count <= (signed)s->dma_dac1.fragsize && !s->dma_dac1.endcleared) {
1028 clear_advance(s->dma_dac1.rawbuf, s->dma_dac1.dmasize, s->dma_dac1.swptr,
1029 s->dma_dac1.fragsize, (s->sctrl & SCTRL_P1SEB) ? 0 : 0x80);
1030 s->dma_dac1.endcleared = 1;
1032 if (s->dma_dac1.count + (signed)s->dma_dac1.fragsize <= (signed)s->dma_dac1.dmasize)
1033 wake_up(&s->dma_dac1.wait);
1036 /* update DAC2 pointer */
1037 if (s->ctrl & CTRL_DAC2_EN) {
1038 diff = get_hwptr(s, &s->dma_dac2, ES1371_REG_DAC2_FRAMECNT);
1039 s->dma_dac2.total_bytes += diff;
1040 if (s->dma_dac2.mapped) {
1041 s->dma_dac2.count += diff;
1042 if (s->dma_dac2.count >= (signed)s->dma_dac2.fragsize)
1043 wake_up(&s->dma_dac2.wait);
1045 s->dma_dac2.count -= diff;
1046 if (s->dma_dac2.count <= 0) {
1047 s->ctrl &= ~CTRL_DAC2_EN;
1048 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
1049 s->dma_dac2.error++;
1050 } else if (s->dma_dac2.count <= (signed)s->dma_dac2.fragsize && !s->dma_dac2.endcleared) {
1051 clear_advance(s->dma_dac2.rawbuf, s->dma_dac2.dmasize, s->dma_dac2.swptr,
1052 s->dma_dac2.fragsize, (s->sctrl & SCTRL_P2SEB) ? 0 : 0x80);
1053 s->dma_dac2.endcleared = 1;
1055 if (s->dma_dac2.count + (signed)s->dma_dac2.fragsize <= (signed)s->dma_dac2.dmasize)
1056 wake_up(&s->dma_dac2.wait);
1061 /* hold spinlock for the following! */
1062 static void es1371_handle_midi(struct es1371_state *s)
1067 if (!(s->ctrl & CTRL_UART_EN))
1070 while (inb(s->io+ES1371_REG_UART_STATUS) & USTAT_RXRDY) {
1071 ch = inb(s->io+ES1371_REG_UART_DATA);
1072 if (s->midi.icnt < MIDIINBUF) {
1073 s->midi.ibuf[s->midi.iwr] = ch;
1074 s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
1080 wake_up(&s->midi.iwait);
1082 while ((inb(s->io+ES1371_REG_UART_STATUS) & USTAT_TXRDY) && s->midi.ocnt > 0) {
1083 outb(s->midi.obuf[s->midi.ord], s->io+ES1371_REG_UART_DATA);
1084 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
1086 if (s->midi.ocnt < MIDIOUTBUF-16)
1090 wake_up(&s->midi.owait);
1091 outb((s->midi.ocnt > 0) ? UCTRL_RXINTEN | UCTRL_ENA_TXINT : UCTRL_RXINTEN, s->io+ES1371_REG_UART_CONTROL);
1094 static irqreturn_t es1371_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1096 struct es1371_state *s = (struct es1371_state *)dev_id;
1097 unsigned int intsrc, sctl;
1099 /* fastpath out, to ease interrupt sharing */
1100 intsrc = inl(s->io+ES1371_REG_STATUS);
1101 if (!(intsrc & 0x80000000))
1103 spin_lock(&s->lock);
1104 /* clear audio interrupts first */
1106 if (intsrc & STAT_ADC)
1107 sctl &= ~SCTRL_R1INTEN;
1108 if (intsrc & STAT_DAC1)
1109 sctl &= ~SCTRL_P1INTEN;
1110 if (intsrc & STAT_DAC2)
1111 sctl &= ~SCTRL_P2INTEN;
1112 outl(sctl, s->io+ES1371_REG_SERIAL_CONTROL);
1113 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1114 es1371_update_ptr(s);
1115 es1371_handle_midi(s);
1116 spin_unlock(&s->lock);
1120 /* --------------------------------------------------------------------- */
1122 static const char invalid_magic[] = KERN_CRIT PFX "invalid magic value\n";
1124 #define VALIDATE_STATE(s) \
1126 if (!(s) || (s)->magic != ES1371_MAGIC) { \
1127 printk(invalid_magic); \
1132 /* --------------------------------------------------------------------- */
1134 /* Conversion table for S/PDIF PCM volume emulation through the SRC */
1135 /* dB-linear table of DAC vol values; -0dB to -46.5dB with mute */
1136 static const unsigned short DACVolTable[101] =
1138 0x1000, 0x0f2a, 0x0e60, 0x0da0, 0x0cea, 0x0c3e, 0x0b9a, 0x0aff,
1139 0x0a6d, 0x09e1, 0x095e, 0x08e1, 0x086a, 0x07fa, 0x078f, 0x072a,
1140 0x06cb, 0x0670, 0x061a, 0x05c9, 0x057b, 0x0532, 0x04ed, 0x04ab,
1141 0x046d, 0x0432, 0x03fa, 0x03c5, 0x0392, 0x0363, 0x0335, 0x030b,
1142 0x02e2, 0x02bc, 0x0297, 0x0275, 0x0254, 0x0235, 0x0217, 0x01fb,
1143 0x01e1, 0x01c8, 0x01b0, 0x0199, 0x0184, 0x0170, 0x015d, 0x014b,
1144 0x0139, 0x0129, 0x0119, 0x010b, 0x00fd, 0x00f0, 0x00e3, 0x00d7,
1145 0x00cc, 0x00c1, 0x00b7, 0x00ae, 0x00a5, 0x009c, 0x0094, 0x008c,
1146 0x0085, 0x007e, 0x0077, 0x0071, 0x006b, 0x0066, 0x0060, 0x005b,
1147 0x0057, 0x0052, 0x004e, 0x004a, 0x0046, 0x0042, 0x003f, 0x003c,
1148 0x0038, 0x0036, 0x0033, 0x0030, 0x002e, 0x002b, 0x0029, 0x0027,
1149 0x0025, 0x0023, 0x0021, 0x001f, 0x001e, 0x001c, 0x001b, 0x0019,
1150 0x0018, 0x0017, 0x0016, 0x0014, 0x0000
1154 * when we are in S/PDIF mode, we want to disable any analog output so
1155 * we filter the mixer ioctls
1157 static int mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd, unsigned long arg)
1159 struct es1371_state *s = (struct es1371_state *)codec->private_data;
1161 unsigned long flags;
1162 unsigned int left, right;
1165 /* filter mixer ioctls to catch PCM and MASTER volume when in S/PDIF mode */
1166 if (s->spdif_volume == -1)
1167 return codec->mixer_ioctl(codec, cmd, arg);
1169 case SOUND_MIXER_WRITE_VOLUME:
1172 case SOUND_MIXER_WRITE_PCM: /* use SRC for PCM volume */
1173 if (get_user(val, (int *)arg))
1175 right = ((val >> 8) & 0xff);
1176 left = (val & 0xff);
1181 s->spdif_volume = (right << 8) | left;
1182 spin_lock_irqsave(&s->lock, flags);
1183 src_write(s, SRCREG_VOL_DAC2, DACVolTable[100 - left]);
1184 src_write(s, SRCREG_VOL_DAC2+1, DACVolTable[100 - right]);
1185 spin_unlock_irqrestore(&s->lock, flags);
1188 case SOUND_MIXER_READ_PCM:
1189 return put_user(s->spdif_volume, (int *)arg);
1191 return codec->mixer_ioctl(codec, cmd, arg);
1194 /* --------------------------------------------------------------------- */
1197 * AC97 Mixer Register to Connections mapping of the Concert 97 board
1199 * AC97_MASTER_VOL_STEREO Line Out
1200 * AC97_MASTER_VOL_MONO TAD Output
1201 * AC97_PCBEEP_VOL none
1202 * AC97_PHONE_VOL TAD Input (mono)
1203 * AC97_MIC_VOL MIC Input (mono)
1204 * AC97_LINEIN_VOL Line Input (stereo)
1205 * AC97_CD_VOL CD Input (stereo)
1206 * AC97_VIDEO_VOL none
1207 * AC97_AUX_VOL Aux Input (stereo)
1208 * AC97_PCMOUT_VOL Wave Output (stereo)
1211 static int es1371_open_mixdev(struct inode *inode, struct file *file)
1213 int minor = iminor(inode);
1214 struct list_head *list;
1215 struct es1371_state *s;
1217 for (list = devs.next; ; list = list->next) {
1220 s = list_entry(list, struct es1371_state, devs);
1221 if (s->codec->dev_mixer == minor)
1225 file->private_data = s;
1229 static int es1371_release_mixdev(struct inode *inode, struct file *file)
1231 struct es1371_state *s = (struct es1371_state *)file->private_data;
1237 static int es1371_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1239 struct es1371_state *s = (struct es1371_state *)file->private_data;
1240 struct ac97_codec *codec = s->codec;
1242 return mixdev_ioctl(codec, cmd, arg);
1245 static /*const*/ struct file_operations es1371_mixer_fops = {
1246 .owner = THIS_MODULE,
1247 .llseek = no_llseek,
1248 .ioctl = es1371_ioctl_mixdev,
1249 .open = es1371_open_mixdev,
1250 .release = es1371_release_mixdev,
1253 /* --------------------------------------------------------------------- */
1255 static int drain_dac1(struct es1371_state *s, int nonblock)
1257 DECLARE_WAITQUEUE(wait, current);
1258 unsigned long flags;
1261 if (s->dma_dac1.mapped || !s->dma_dac1.ready)
1263 add_wait_queue(&s->dma_dac1.wait, &wait);
1265 __set_current_state(TASK_INTERRUPTIBLE);
1266 spin_lock_irqsave(&s->lock, flags);
1267 count = s->dma_dac1.count;
1268 spin_unlock_irqrestore(&s->lock, flags);
1271 if (signal_pending(current))
1274 remove_wait_queue(&s->dma_dac1.wait, &wait);
1275 set_current_state(TASK_RUNNING);
1278 tmo = 3 * HZ * (count + s->dma_dac1.fragsize) / 2 / s->dac1rate;
1279 tmo >>= sample_shift[(s->sctrl & SCTRL_P1FMT) >> SCTRL_SH_P1FMT];
1280 if (!schedule_timeout(tmo + 1))
1281 DBG(printk(KERN_DEBUG PFX "dac1 dma timed out??\n");)
1283 remove_wait_queue(&s->dma_dac1.wait, &wait);
1284 set_current_state(TASK_RUNNING);
1285 if (signal_pending(current))
1286 return -ERESTARTSYS;
1290 static int drain_dac2(struct es1371_state *s, int nonblock)
1292 DECLARE_WAITQUEUE(wait, current);
1293 unsigned long flags;
1296 if (s->dma_dac2.mapped || !s->dma_dac2.ready)
1298 add_wait_queue(&s->dma_dac2.wait, &wait);
1300 __set_current_state(TASK_UNINTERRUPTIBLE);
1301 spin_lock_irqsave(&s->lock, flags);
1302 count = s->dma_dac2.count;
1303 spin_unlock_irqrestore(&s->lock, flags);
1306 if (signal_pending(current))
1309 remove_wait_queue(&s->dma_dac2.wait, &wait);
1310 set_current_state(TASK_RUNNING);
1313 tmo = 3 * HZ * (count + s->dma_dac2.fragsize) / 2 / s->dac2rate;
1314 tmo >>= sample_shift[(s->sctrl & SCTRL_P2FMT) >> SCTRL_SH_P2FMT];
1315 if (!schedule_timeout(tmo + 1))
1316 DBG(printk(KERN_DEBUG PFX "dac2 dma timed out??\n");)
1318 remove_wait_queue(&s->dma_dac2.wait, &wait);
1319 set_current_state(TASK_RUNNING);
1320 if (signal_pending(current))
1321 return -ERESTARTSYS;
1325 /* --------------------------------------------------------------------- */
1327 static ssize_t es1371_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1329 struct es1371_state *s = (struct es1371_state *)file->private_data;
1330 DECLARE_WAITQUEUE(wait, current);
1332 unsigned long flags;
1337 if (ppos != &file->f_pos)
1339 if (s->dma_adc.mapped)
1341 if (!access_ok(VERIFY_WRITE, buffer, count))
1344 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1347 add_wait_queue(&s->dma_adc.wait, &wait);
1349 spin_lock_irqsave(&s->lock, flags);
1350 swptr = s->dma_adc.swptr;
1351 cnt = s->dma_adc.dmasize-swptr;
1352 if (s->dma_adc.count < cnt)
1353 cnt = s->dma_adc.count;
1355 __set_current_state(TASK_INTERRUPTIBLE);
1356 spin_unlock_irqrestore(&s->lock, flags);
1360 if (s->dma_adc.enabled)
1362 if (file->f_flags & O_NONBLOCK) {
1369 if (signal_pending(current)) {
1375 if (s->dma_adc.mapped)
1382 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
1387 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1388 spin_lock_irqsave(&s->lock, flags);
1389 s->dma_adc.swptr = swptr;
1390 s->dma_adc.count -= cnt;
1391 spin_unlock_irqrestore(&s->lock, flags);
1395 if (s->dma_adc.enabled)
1401 remove_wait_queue(&s->dma_adc.wait, &wait);
1402 set_current_state(TASK_RUNNING);
1406 static ssize_t es1371_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1408 struct es1371_state *s = (struct es1371_state *)file->private_data;
1409 DECLARE_WAITQUEUE(wait, current);
1411 unsigned long flags;
1416 if (ppos != &file->f_pos)
1418 if (s->dma_dac2.mapped)
1420 if (!access_ok(VERIFY_READ, buffer, count))
1423 if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1426 add_wait_queue(&s->dma_dac2.wait, &wait);
1428 spin_lock_irqsave(&s->lock, flags);
1429 if (s->dma_dac2.count < 0) {
1430 s->dma_dac2.count = 0;
1431 s->dma_dac2.swptr = s->dma_dac2.hwptr;
1433 swptr = s->dma_dac2.swptr;
1434 cnt = s->dma_dac2.dmasize-swptr;
1435 if (s->dma_dac2.count + cnt > s->dma_dac2.dmasize)
1436 cnt = s->dma_dac2.dmasize - s->dma_dac2.count;
1438 __set_current_state(TASK_INTERRUPTIBLE);
1439 spin_unlock_irqrestore(&s->lock, flags);
1443 if (s->dma_dac2.enabled)
1445 if (file->f_flags & O_NONBLOCK) {
1452 if (signal_pending(current)) {
1458 if (s->dma_dac2.mapped)
1465 if (copy_from_user(s->dma_dac2.rawbuf + swptr, buffer, cnt)) {
1470 swptr = (swptr + cnt) % s->dma_dac2.dmasize;
1471 spin_lock_irqsave(&s->lock, flags);
1472 s->dma_dac2.swptr = swptr;
1473 s->dma_dac2.count += cnt;
1474 s->dma_dac2.endcleared = 0;
1475 spin_unlock_irqrestore(&s->lock, flags);
1479 if (s->dma_dac2.enabled)
1485 remove_wait_queue(&s->dma_dac2.wait, &wait);
1487 set_current_state(TASK_RUNNING);
1491 /* No kernel lock - we have our own spinlock */
1492 static unsigned int es1371_poll(struct file *file, struct poll_table_struct *wait)
1494 struct es1371_state *s = (struct es1371_state *)file->private_data;
1495 unsigned long flags;
1496 unsigned int mask = 0;
1499 if (file->f_mode & FMODE_WRITE) {
1500 if (!s->dma_dac2.ready && prog_dmabuf_dac2(s))
1502 poll_wait(file, &s->dma_dac2.wait, wait);
1504 if (file->f_mode & FMODE_READ) {
1505 if (!s->dma_adc.ready && prog_dmabuf_adc(s))
1507 poll_wait(file, &s->dma_adc.wait, wait);
1509 spin_lock_irqsave(&s->lock, flags);
1510 es1371_update_ptr(s);
1511 if (file->f_mode & FMODE_READ) {
1512 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1513 mask |= POLLIN | POLLRDNORM;
1515 if (file->f_mode & FMODE_WRITE) {
1516 if (s->dma_dac2.mapped) {
1517 if (s->dma_dac2.count >= (signed)s->dma_dac2.fragsize)
1518 mask |= POLLOUT | POLLWRNORM;
1520 if ((signed)s->dma_dac2.dmasize >= s->dma_dac2.count + (signed)s->dma_dac2.fragsize)
1521 mask |= POLLOUT | POLLWRNORM;
1524 spin_unlock_irqrestore(&s->lock, flags);
1528 static int es1371_mmap(struct file *file, struct vm_area_struct *vma)
1530 struct es1371_state *s = (struct es1371_state *)file->private_data;
1539 if (vma->vm_flags & VM_WRITE) {
1540 if ((ret = prog_dmabuf_dac2(s)) != 0) {
1544 } else if (vma->vm_flags & VM_READ) {
1545 if ((ret = prog_dmabuf_adc(s)) != 0) {
1553 if (vma->vm_pgoff != 0) {
1557 size = vma->vm_end - vma->vm_start;
1558 if (size > (PAGE_SIZE << db->buforder)) {
1562 if (remap_page_range(vma, vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot)) {
1573 static int es1371_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1575 struct es1371_state *s = (struct es1371_state *)file->private_data;
1576 unsigned long flags;
1577 audio_buf_info abinfo;
1580 int val, mapped, ret;
1583 mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac2.mapped) ||
1584 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1586 case OSS_GETVERSION:
1587 return put_user(SOUND_VERSION, (int *)arg);
1589 case SNDCTL_DSP_SYNC:
1590 if (file->f_mode & FMODE_WRITE)
1591 return drain_dac2(s, 0/*file->f_flags & O_NONBLOCK*/);
1594 case SNDCTL_DSP_SETDUPLEX:
1597 case SNDCTL_DSP_GETCAPS:
1598 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
1600 case SNDCTL_DSP_RESET:
1601 if (file->f_mode & FMODE_WRITE) {
1603 synchronize_irq(s->irq);
1604 s->dma_dac2.swptr = s->dma_dac2.hwptr = s->dma_dac2.count = s->dma_dac2.total_bytes = 0;
1606 if (file->f_mode & FMODE_READ) {
1608 synchronize_irq(s->irq);
1609 s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1613 case SNDCTL_DSP_SPEED:
1614 if (get_user(val, (int *)arg))
1617 if (file->f_mode & FMODE_READ) {
1619 s->dma_adc.ready = 0;
1620 set_adc_rate(s, val);
1622 if (file->f_mode & FMODE_WRITE) {
1624 s->dma_dac2.ready = 0;
1625 set_dac2_rate(s, val);
1628 return put_user((file->f_mode & FMODE_READ) ? s->adcrate : s->dac2rate, (int *)arg);
1630 case SNDCTL_DSP_STEREO:
1631 if (get_user(val, (int *)arg))
1633 if (file->f_mode & FMODE_READ) {
1635 s->dma_adc.ready = 0;
1636 spin_lock_irqsave(&s->lock, flags);
1638 s->sctrl |= SCTRL_R1SMB;
1640 s->sctrl &= ~SCTRL_R1SMB;
1641 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1642 spin_unlock_irqrestore(&s->lock, flags);
1644 if (file->f_mode & FMODE_WRITE) {
1646 s->dma_dac2.ready = 0;
1647 spin_lock_irqsave(&s->lock, flags);
1649 s->sctrl |= SCTRL_P2SMB;
1651 s->sctrl &= ~SCTRL_P2SMB;
1652 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1653 spin_unlock_irqrestore(&s->lock, flags);
1657 case SNDCTL_DSP_CHANNELS:
1658 if (get_user(val, (int *)arg))
1661 if (file->f_mode & FMODE_READ) {
1663 s->dma_adc.ready = 0;
1664 spin_lock_irqsave(&s->lock, flags);
1666 s->sctrl |= SCTRL_R1SMB;
1668 s->sctrl &= ~SCTRL_R1SMB;
1669 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1670 spin_unlock_irqrestore(&s->lock, flags);
1672 if (file->f_mode & FMODE_WRITE) {
1674 s->dma_dac2.ready = 0;
1675 spin_lock_irqsave(&s->lock, flags);
1677 s->sctrl |= SCTRL_P2SMB;
1679 s->sctrl &= ~SCTRL_P2SMB;
1680 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1681 spin_unlock_irqrestore(&s->lock, flags);
1684 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SMB : SCTRL_P2SMB)) ? 2 : 1, (int *)arg);
1686 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1687 return put_user(AFMT_S16_LE|AFMT_U8, (int *)arg);
1689 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1690 if (get_user(val, (int *)arg))
1692 if (val != AFMT_QUERY) {
1693 if (file->f_mode & FMODE_READ) {
1695 s->dma_adc.ready = 0;
1696 spin_lock_irqsave(&s->lock, flags);
1697 if (val == AFMT_S16_LE)
1698 s->sctrl |= SCTRL_R1SEB;
1700 s->sctrl &= ~SCTRL_R1SEB;
1701 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1702 spin_unlock_irqrestore(&s->lock, flags);
1704 if (file->f_mode & FMODE_WRITE) {
1706 s->dma_dac2.ready = 0;
1707 spin_lock_irqsave(&s->lock, flags);
1708 if (val == AFMT_S16_LE)
1709 s->sctrl |= SCTRL_P2SEB;
1711 s->sctrl &= ~SCTRL_P2SEB;
1712 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1713 spin_unlock_irqrestore(&s->lock, flags);
1716 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SEB : SCTRL_P2SEB)) ?
1717 AFMT_S16_LE : AFMT_U8, (int *)arg);
1719 case SNDCTL_DSP_POST:
1722 case SNDCTL_DSP_GETTRIGGER:
1724 if (file->f_mode & FMODE_READ && s->ctrl & CTRL_ADC_EN)
1725 val |= PCM_ENABLE_INPUT;
1726 if (file->f_mode & FMODE_WRITE && s->ctrl & CTRL_DAC2_EN)
1727 val |= PCM_ENABLE_OUTPUT;
1728 return put_user(val, (int *)arg);
1730 case SNDCTL_DSP_SETTRIGGER:
1731 if (get_user(val, (int *)arg))
1733 if (file->f_mode & FMODE_READ) {
1734 if (val & PCM_ENABLE_INPUT) {
1735 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1737 s->dma_adc.enabled = 1;
1740 s->dma_adc.enabled = 0;
1744 if (file->f_mode & FMODE_WRITE) {
1745 if (val & PCM_ENABLE_OUTPUT) {
1746 if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1748 s->dma_dac2.enabled = 1;
1751 s->dma_dac2.enabled = 0;
1757 case SNDCTL_DSP_GETOSPACE:
1758 if (!(file->f_mode & FMODE_WRITE))
1760 if (!s->dma_dac2.ready && (val = prog_dmabuf_dac2(s)) != 0)
1762 spin_lock_irqsave(&s->lock, flags);
1763 es1371_update_ptr(s);
1764 abinfo.fragsize = s->dma_dac2.fragsize;
1765 count = s->dma_dac2.count;
1768 abinfo.bytes = s->dma_dac2.dmasize - count;
1769 abinfo.fragstotal = s->dma_dac2.numfrag;
1770 abinfo.fragments = abinfo.bytes >> s->dma_dac2.fragshift;
1771 spin_unlock_irqrestore(&s->lock, flags);
1772 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1774 case SNDCTL_DSP_GETISPACE:
1775 if (!(file->f_mode & FMODE_READ))
1777 if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
1779 spin_lock_irqsave(&s->lock, flags);
1780 es1371_update_ptr(s);
1781 abinfo.fragsize = s->dma_adc.fragsize;
1782 count = s->dma_adc.count;
1785 abinfo.bytes = count;
1786 abinfo.fragstotal = s->dma_adc.numfrag;
1787 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1788 spin_unlock_irqrestore(&s->lock, flags);
1789 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1791 case SNDCTL_DSP_NONBLOCK:
1792 file->f_flags |= O_NONBLOCK;
1795 case SNDCTL_DSP_GETODELAY:
1796 if (!(file->f_mode & FMODE_WRITE))
1798 if (!s->dma_dac2.ready && (val = prog_dmabuf_dac2(s)) != 0)
1800 spin_lock_irqsave(&s->lock, flags);
1801 es1371_update_ptr(s);
1802 count = s->dma_dac2.count;
1803 spin_unlock_irqrestore(&s->lock, flags);
1806 return put_user(count, (int *)arg);
1808 case SNDCTL_DSP_GETIPTR:
1809 if (!(file->f_mode & FMODE_READ))
1811 if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
1813 spin_lock_irqsave(&s->lock, flags);
1814 es1371_update_ptr(s);
1815 cinfo.bytes = s->dma_adc.total_bytes;
1816 count = s->dma_adc.count;
1819 cinfo.blocks = count >> s->dma_adc.fragshift;
1820 cinfo.ptr = s->dma_adc.hwptr;
1821 if (s->dma_adc.mapped)
1822 s->dma_adc.count &= s->dma_adc.fragsize-1;
1823 spin_unlock_irqrestore(&s->lock, flags);
1824 if (copy_to_user((void *)arg, &cinfo, sizeof(cinfo)))
1828 case SNDCTL_DSP_GETOPTR:
1829 if (!(file->f_mode & FMODE_WRITE))
1831 if (!s->dma_dac2.ready && (val = prog_dmabuf_dac2(s)) != 0)
1833 spin_lock_irqsave(&s->lock, flags);
1834 es1371_update_ptr(s);
1835 cinfo.bytes = s->dma_dac2.total_bytes;
1836 count = s->dma_dac2.count;
1839 cinfo.blocks = count >> s->dma_dac2.fragshift;
1840 cinfo.ptr = s->dma_dac2.hwptr;
1841 if (s->dma_dac2.mapped)
1842 s->dma_dac2.count &= s->dma_dac2.fragsize-1;
1843 spin_unlock_irqrestore(&s->lock, flags);
1844 if (copy_to_user((void *)arg, &cinfo, sizeof(cinfo)))
1848 case SNDCTL_DSP_GETBLKSIZE:
1849 if (file->f_mode & FMODE_WRITE) {
1850 if ((val = prog_dmabuf_dac2(s)))
1852 return put_user(s->dma_dac2.fragsize, (int *)arg);
1854 if ((val = prog_dmabuf_adc(s)))
1856 return put_user(s->dma_adc.fragsize, (int *)arg);
1858 case SNDCTL_DSP_SETFRAGMENT:
1859 if (get_user(val, (int *)arg))
1861 if (file->f_mode & FMODE_READ) {
1862 s->dma_adc.ossfragshift = val & 0xffff;
1863 s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1864 if (s->dma_adc.ossfragshift < 4)
1865 s->dma_adc.ossfragshift = 4;
1866 if (s->dma_adc.ossfragshift > 15)
1867 s->dma_adc.ossfragshift = 15;
1868 if (s->dma_adc.ossmaxfrags < 4)
1869 s->dma_adc.ossmaxfrags = 4;
1871 if (file->f_mode & FMODE_WRITE) {
1872 s->dma_dac2.ossfragshift = val & 0xffff;
1873 s->dma_dac2.ossmaxfrags = (val >> 16) & 0xffff;
1874 if (s->dma_dac2.ossfragshift < 4)
1875 s->dma_dac2.ossfragshift = 4;
1876 if (s->dma_dac2.ossfragshift > 15)
1877 s->dma_dac2.ossfragshift = 15;
1878 if (s->dma_dac2.ossmaxfrags < 4)
1879 s->dma_dac2.ossmaxfrags = 4;
1883 case SNDCTL_DSP_SUBDIVIDE:
1884 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1885 (file->f_mode & FMODE_WRITE && s->dma_dac2.subdivision))
1887 if (get_user(val, (int *)arg))
1889 if (val != 1 && val != 2 && val != 4)
1891 if (file->f_mode & FMODE_READ)
1892 s->dma_adc.subdivision = val;
1893 if (file->f_mode & FMODE_WRITE)
1894 s->dma_dac2.subdivision = val;
1897 case SOUND_PCM_READ_RATE:
1898 return put_user((file->f_mode & FMODE_READ) ? s->adcrate : s->dac2rate, (int *)arg);
1900 case SOUND_PCM_READ_CHANNELS:
1901 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SMB : SCTRL_P2SMB)) ? 2 : 1, (int *)arg);
1903 case SOUND_PCM_READ_BITS:
1904 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SEB : SCTRL_P2SEB)) ? 16 : 8, (int *)arg);
1906 case SOUND_PCM_WRITE_FILTER:
1907 case SNDCTL_DSP_SETSYNCRO:
1908 case SOUND_PCM_READ_FILTER:
1912 return mixdev_ioctl(s->codec, cmd, arg);
1915 static int es1371_open(struct inode *inode, struct file *file)
1917 int minor = iminor(inode);
1918 DECLARE_WAITQUEUE(wait, current);
1919 unsigned long flags;
1920 struct list_head *list;
1921 struct es1371_state *s;
1923 for (list = devs.next; ; list = list->next) {
1926 s = list_entry(list, struct es1371_state, devs);
1927 if (!((s->dev_audio ^ minor) & ~0xf))
1931 file->private_data = s;
1932 /* wait for device to become free */
1934 while (s->open_mode & file->f_mode) {
1935 if (file->f_flags & O_NONBLOCK) {
1939 add_wait_queue(&s->open_wait, &wait);
1940 __set_current_state(TASK_INTERRUPTIBLE);
1943 remove_wait_queue(&s->open_wait, &wait);
1944 set_current_state(TASK_RUNNING);
1945 if (signal_pending(current))
1946 return -ERESTARTSYS;
1949 if (file->f_mode & FMODE_READ) {
1950 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
1951 s->dma_adc.enabled = 1;
1952 set_adc_rate(s, 8000);
1954 if (file->f_mode & FMODE_WRITE) {
1955 s->dma_dac2.ossfragshift = s->dma_dac2.ossmaxfrags = s->dma_dac2.subdivision = 0;
1956 s->dma_dac2.enabled = 1;
1957 set_dac2_rate(s, 8000);
1959 spin_lock_irqsave(&s->lock, flags);
1960 if (file->f_mode & FMODE_READ) {
1961 s->sctrl &= ~SCTRL_R1FMT;
1962 if ((minor & 0xf) == SND_DEV_DSP16)
1963 s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_R1FMT;
1965 s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_R1FMT;
1967 if (file->f_mode & FMODE_WRITE) {
1968 s->sctrl &= ~SCTRL_P2FMT;
1969 if ((minor & 0xf) == SND_DEV_DSP16)
1970 s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_P2FMT;
1972 s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_P2FMT;
1974 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1975 spin_unlock_irqrestore(&s->lock, flags);
1976 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1978 init_MUTEX(&s->sem);
1982 static int es1371_release(struct inode *inode, struct file *file)
1984 struct es1371_state *s = (struct es1371_state *)file->private_data;
1988 if (file->f_mode & FMODE_WRITE)
1989 drain_dac2(s, file->f_flags & O_NONBLOCK);
1991 if (file->f_mode & FMODE_WRITE) {
1993 dealloc_dmabuf(s, &s->dma_dac2);
1995 if (file->f_mode & FMODE_READ) {
1997 dealloc_dmabuf(s, &s->dma_adc);
1999 s->open_mode &= ~(file->f_mode & (FMODE_READ|FMODE_WRITE));
2001 wake_up(&s->open_wait);
2006 static /*const*/ struct file_operations es1371_audio_fops = {
2007 .owner = THIS_MODULE,
2008 .llseek = no_llseek,
2009 .read = es1371_read,
2010 .write = es1371_write,
2011 .poll = es1371_poll,
2012 .ioctl = es1371_ioctl,
2013 .mmap = es1371_mmap,
2014 .open = es1371_open,
2015 .release = es1371_release,
2018 /* --------------------------------------------------------------------- */
2020 static ssize_t es1371_write_dac(struct file *file, const char *buffer, size_t count, loff_t *ppos)
2022 struct es1371_state *s = (struct es1371_state *)file->private_data;
2023 DECLARE_WAITQUEUE(wait, current);
2025 unsigned long flags;
2030 if (ppos != &file->f_pos)
2032 if (s->dma_dac1.mapped)
2034 if (!s->dma_dac1.ready && (ret = prog_dmabuf_dac1(s)))
2036 if (!access_ok(VERIFY_READ, buffer, count))
2038 add_wait_queue(&s->dma_dac1.wait, &wait);
2040 spin_lock_irqsave(&s->lock, flags);
2041 if (s->dma_dac1.count < 0) {
2042 s->dma_dac1.count = 0;
2043 s->dma_dac1.swptr = s->dma_dac1.hwptr;
2045 swptr = s->dma_dac1.swptr;
2046 cnt = s->dma_dac1.dmasize-swptr;
2047 if (s->dma_dac1.count + cnt > s->dma_dac1.dmasize)
2048 cnt = s->dma_dac1.dmasize - s->dma_dac1.count;
2050 __set_current_state(TASK_INTERRUPTIBLE);
2051 spin_unlock_irqrestore(&s->lock, flags);
2055 if (s->dma_dac1.enabled)
2057 if (file->f_flags & O_NONBLOCK) {
2063 if (signal_pending(current)) {
2070 if (copy_from_user(s->dma_dac1.rawbuf + swptr, buffer, cnt)) {
2075 swptr = (swptr + cnt) % s->dma_dac1.dmasize;
2076 spin_lock_irqsave(&s->lock, flags);
2077 s->dma_dac1.swptr = swptr;
2078 s->dma_dac1.count += cnt;
2079 s->dma_dac1.endcleared = 0;
2080 spin_unlock_irqrestore(&s->lock, flags);
2084 if (s->dma_dac1.enabled)
2087 remove_wait_queue(&s->dma_dac1.wait, &wait);
2088 set_current_state(TASK_RUNNING);
2092 /* No kernel lock - we have our own spinlock */
2093 static unsigned int es1371_poll_dac(struct file *file, struct poll_table_struct *wait)
2095 struct es1371_state *s = (struct es1371_state *)file->private_data;
2096 unsigned long flags;
2097 unsigned int mask = 0;
2100 if (!s->dma_dac1.ready && prog_dmabuf_dac1(s))
2102 poll_wait(file, &s->dma_dac1.wait, wait);
2103 spin_lock_irqsave(&s->lock, flags);
2104 es1371_update_ptr(s);
2105 if (s->dma_dac1.mapped) {
2106 if (s->dma_dac1.count >= (signed)s->dma_dac1.fragsize)
2107 mask |= POLLOUT | POLLWRNORM;
2109 if ((signed)s->dma_dac1.dmasize >= s->dma_dac1.count + (signed)s->dma_dac1.fragsize)
2110 mask |= POLLOUT | POLLWRNORM;
2112 spin_unlock_irqrestore(&s->lock, flags);
2116 static int es1371_mmap_dac(struct file *file, struct vm_area_struct *vma)
2118 struct es1371_state *s = (struct es1371_state *)file->private_data;
2123 if (!(vma->vm_flags & VM_WRITE))
2126 if ((ret = prog_dmabuf_dac1(s)) != 0)
2129 if (vma->vm_pgoff != 0)
2131 size = vma->vm_end - vma->vm_start;
2132 if (size > (PAGE_SIZE << s->dma_dac1.buforder))
2135 if (remap_page_range(vma, vma->vm_start, virt_to_phys(s->dma_dac1.rawbuf), size, vma->vm_page_prot))
2137 s->dma_dac1.mapped = 1;
2144 static int es1371_ioctl_dac(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2146 struct es1371_state *s = (struct es1371_state *)file->private_data;
2147 unsigned long flags;
2148 audio_buf_info abinfo;
2155 case OSS_GETVERSION:
2156 return put_user(SOUND_VERSION, (int *)arg);
2158 case SNDCTL_DSP_SYNC:
2159 return drain_dac1(s, 0/*file->f_flags & O_NONBLOCK*/);
2161 case SNDCTL_DSP_SETDUPLEX:
2164 case SNDCTL_DSP_GETCAPS:
2165 return put_user(DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
2167 case SNDCTL_DSP_RESET:
2169 synchronize_irq(s->irq);
2170 s->dma_dac1.swptr = s->dma_dac1.hwptr = s->dma_dac1.count = s->dma_dac1.total_bytes = 0;
2173 case SNDCTL_DSP_SPEED:
2174 if (get_user(val, (int *)arg))
2178 s->dma_dac1.ready = 0;
2179 set_dac1_rate(s, val);
2181 return put_user(s->dac1rate, (int *)arg);
2183 case SNDCTL_DSP_STEREO:
2184 if (get_user(val, (int *)arg))
2187 s->dma_dac1.ready = 0;
2188 spin_lock_irqsave(&s->lock, flags);
2190 s->sctrl |= SCTRL_P1SMB;
2192 s->sctrl &= ~SCTRL_P1SMB;
2193 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2194 spin_unlock_irqrestore(&s->lock, flags);
2197 case SNDCTL_DSP_CHANNELS:
2198 if (get_user(val, (int *)arg))
2202 s->dma_dac1.ready = 0;
2203 spin_lock_irqsave(&s->lock, flags);
2205 s->sctrl |= SCTRL_P1SMB;
2207 s->sctrl &= ~SCTRL_P1SMB;
2208 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2209 spin_unlock_irqrestore(&s->lock, flags);
2211 return put_user((s->sctrl & SCTRL_P1SMB) ? 2 : 1, (int *)arg);
2213 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
2214 return put_user(AFMT_S16_LE|AFMT_U8, (int *)arg);
2216 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
2217 if (get_user(val, (int *)arg))
2219 if (val != AFMT_QUERY) {
2221 s->dma_dac1.ready = 0;
2222 spin_lock_irqsave(&s->lock, flags);
2223 if (val == AFMT_S16_LE)
2224 s->sctrl |= SCTRL_P1SEB;
2226 s->sctrl &= ~SCTRL_P1SEB;
2227 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2228 spin_unlock_irqrestore(&s->lock, flags);
2230 return put_user((s->sctrl & SCTRL_P1SEB) ? AFMT_S16_LE : AFMT_U8, (int *)arg);
2232 case SNDCTL_DSP_POST:
2235 case SNDCTL_DSP_GETTRIGGER:
2236 return put_user((s->ctrl & CTRL_DAC1_EN) ? PCM_ENABLE_OUTPUT : 0, (int *)arg);
2238 case SNDCTL_DSP_SETTRIGGER:
2239 if (get_user(val, (int *)arg))
2241 if (val & PCM_ENABLE_OUTPUT) {
2242 if (!s->dma_dac1.ready && (ret = prog_dmabuf_dac1(s)))
2244 s->dma_dac1.enabled = 1;
2247 s->dma_dac1.enabled = 0;
2252 case SNDCTL_DSP_GETOSPACE:
2253 if (!s->dma_dac1.ready && (val = prog_dmabuf_dac1(s)) != 0)
2255 spin_lock_irqsave(&s->lock, flags);
2256 es1371_update_ptr(s);
2257 abinfo.fragsize = s->dma_dac1.fragsize;
2258 count = s->dma_dac1.count;
2261 abinfo.bytes = s->dma_dac1.dmasize - count;
2262 abinfo.fragstotal = s->dma_dac1.numfrag;
2263 abinfo.fragments = abinfo.bytes >> s->dma_dac1.fragshift;
2264 spin_unlock_irqrestore(&s->lock, flags);
2265 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2267 case SNDCTL_DSP_NONBLOCK:
2268 file->f_flags |= O_NONBLOCK;
2271 case SNDCTL_DSP_GETODELAY:
2272 if (!s->dma_dac1.ready && (val = prog_dmabuf_dac1(s)) != 0)
2274 spin_lock_irqsave(&s->lock, flags);
2275 es1371_update_ptr(s);
2276 count = s->dma_dac1.count;
2277 spin_unlock_irqrestore(&s->lock, flags);
2280 return put_user(count, (int *)arg);
2282 case SNDCTL_DSP_GETOPTR:
2283 if (!s->dma_dac1.ready && (val = prog_dmabuf_dac1(s)) != 0)
2285 spin_lock_irqsave(&s->lock, flags);
2286 es1371_update_ptr(s);
2287 cinfo.bytes = s->dma_dac1.total_bytes;
2288 count = s->dma_dac1.count;
2291 cinfo.blocks = count >> s->dma_dac1.fragshift;
2292 cinfo.ptr = s->dma_dac1.hwptr;
2293 if (s->dma_dac1.mapped)
2294 s->dma_dac1.count &= s->dma_dac1.fragsize-1;
2295 spin_unlock_irqrestore(&s->lock, flags);
2296 if (copy_to_user((void *)arg, &cinfo, sizeof(cinfo)))
2300 case SNDCTL_DSP_GETBLKSIZE:
2301 if ((val = prog_dmabuf_dac1(s)))
2303 return put_user(s->dma_dac1.fragsize, (int *)arg);
2305 case SNDCTL_DSP_SETFRAGMENT:
2306 if (get_user(val, (int *)arg))
2308 s->dma_dac1.ossfragshift = val & 0xffff;
2309 s->dma_dac1.ossmaxfrags = (val >> 16) & 0xffff;
2310 if (s->dma_dac1.ossfragshift < 4)
2311 s->dma_dac1.ossfragshift = 4;
2312 if (s->dma_dac1.ossfragshift > 15)
2313 s->dma_dac1.ossfragshift = 15;
2314 if (s->dma_dac1.ossmaxfrags < 4)
2315 s->dma_dac1.ossmaxfrags = 4;
2318 case SNDCTL_DSP_SUBDIVIDE:
2319 if (s->dma_dac1.subdivision)
2321 if (get_user(val, (int *)arg))
2323 if (val != 1 && val != 2 && val != 4)
2325 s->dma_dac1.subdivision = val;
2328 case SOUND_PCM_READ_RATE:
2329 return put_user(s->dac1rate, (int *)arg);
2331 case SOUND_PCM_READ_CHANNELS:
2332 return put_user((s->sctrl & SCTRL_P1SMB) ? 2 : 1, (int *)arg);
2334 case SOUND_PCM_READ_BITS:
2335 return put_user((s->sctrl & SCTRL_P1SEB) ? 16 : 8, (int *)arg);
2337 case SOUND_PCM_WRITE_FILTER:
2338 case SNDCTL_DSP_SETSYNCRO:
2339 case SOUND_PCM_READ_FILTER:
2343 return mixdev_ioctl(s->codec, cmd, arg);
2346 static int es1371_open_dac(struct inode *inode, struct file *file)
2348 int minor = iminor(inode);
2349 DECLARE_WAITQUEUE(wait, current);
2350 unsigned long flags;
2351 struct list_head *list;
2352 struct es1371_state *s;
2354 for (list = devs.next; ; list = list->next) {
2357 s = list_entry(list, struct es1371_state, devs);
2358 if (!((s->dev_dac ^ minor) & ~0xf))
2362 /* we allow opening with O_RDWR, most programs do it although they will only write */
2364 if (file->f_mode & FMODE_READ)
2367 if (!(file->f_mode & FMODE_WRITE))
2369 file->private_data = s;
2370 /* wait for device to become free */
2372 while (s->open_mode & FMODE_DAC) {
2373 if (file->f_flags & O_NONBLOCK) {
2377 add_wait_queue(&s->open_wait, &wait);
2378 __set_current_state(TASK_INTERRUPTIBLE);
2381 remove_wait_queue(&s->open_wait, &wait);
2382 set_current_state(TASK_RUNNING);
2383 if (signal_pending(current))
2384 return -ERESTARTSYS;
2387 s->dma_dac1.ossfragshift = s->dma_dac1.ossmaxfrags = s->dma_dac1.subdivision = 0;
2388 s->dma_dac1.enabled = 1;
2389 set_dac1_rate(s, 8000);
2390 spin_lock_irqsave(&s->lock, flags);
2391 s->sctrl &= ~SCTRL_P1FMT;
2392 if ((minor & 0xf) == SND_DEV_DSP16)
2393 s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_P1FMT;
2395 s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_P1FMT;
2396 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2397 spin_unlock_irqrestore(&s->lock, flags);
2398 s->open_mode |= FMODE_DAC;
2403 static int es1371_release_dac(struct inode *inode, struct file *file)
2405 struct es1371_state *s = (struct es1371_state *)file->private_data;
2409 drain_dac1(s, file->f_flags & O_NONBLOCK);
2412 dealloc_dmabuf(s, &s->dma_dac1);
2413 s->open_mode &= ~FMODE_DAC;
2415 wake_up(&s->open_wait);
2420 static /*const*/ struct file_operations es1371_dac_fops = {
2421 .owner = THIS_MODULE,
2422 .llseek = no_llseek,
2423 .write = es1371_write_dac,
2424 .poll = es1371_poll_dac,
2425 .ioctl = es1371_ioctl_dac,
2426 .mmap = es1371_mmap_dac,
2427 .open = es1371_open_dac,
2428 .release = es1371_release_dac,
2431 /* --------------------------------------------------------------------- */
2433 static ssize_t es1371_midi_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
2435 struct es1371_state *s = (struct es1371_state *)file->private_data;
2436 DECLARE_WAITQUEUE(wait, current);
2438 unsigned long flags;
2443 if (ppos != &file->f_pos)
2445 if (!access_ok(VERIFY_WRITE, buffer, count))
2450 add_wait_queue(&s->midi.iwait, &wait);
2452 spin_lock_irqsave(&s->lock, flags);
2454 cnt = MIDIINBUF - ptr;
2455 if (s->midi.icnt < cnt)
2458 __set_current_state(TASK_INTERRUPTIBLE);
2459 spin_unlock_irqrestore(&s->lock, flags);
2463 if (file->f_flags & O_NONBLOCK) {
2469 if (signal_pending(current)) {
2476 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt)) {
2481 ptr = (ptr + cnt) % MIDIINBUF;
2482 spin_lock_irqsave(&s->lock, flags);
2484 s->midi.icnt -= cnt;
2485 spin_unlock_irqrestore(&s->lock, flags);
2491 __set_current_state(TASK_RUNNING);
2492 remove_wait_queue(&s->midi.iwait, &wait);
2496 static ssize_t es1371_midi_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
2498 struct es1371_state *s = (struct es1371_state *)file->private_data;
2499 DECLARE_WAITQUEUE(wait, current);
2501 unsigned long flags;
2506 if (ppos != &file->f_pos)
2508 if (!access_ok(VERIFY_READ, buffer, count))
2513 add_wait_queue(&s->midi.owait, &wait);
2515 spin_lock_irqsave(&s->lock, flags);
2517 cnt = MIDIOUTBUF - ptr;
2518 if (s->midi.ocnt + cnt > MIDIOUTBUF)
2519 cnt = MIDIOUTBUF - s->midi.ocnt;
2521 __set_current_state(TASK_INTERRUPTIBLE);
2522 es1371_handle_midi(s);
2524 spin_unlock_irqrestore(&s->lock, flags);
2528 if (file->f_flags & O_NONBLOCK) {
2534 if (signal_pending(current)) {
2541 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt)) {
2546 ptr = (ptr + cnt) % MIDIOUTBUF;
2547 spin_lock_irqsave(&s->lock, flags);
2549 s->midi.ocnt += cnt;
2550 spin_unlock_irqrestore(&s->lock, flags);
2554 spin_lock_irqsave(&s->lock, flags);
2555 es1371_handle_midi(s);
2556 spin_unlock_irqrestore(&s->lock, flags);
2558 __set_current_state(TASK_RUNNING);
2559 remove_wait_queue(&s->midi.owait, &wait);
2563 /* No kernel lock - we have our own spinlock */
2564 static unsigned int es1371_midi_poll(struct file *file, struct poll_table_struct *wait)
2566 struct es1371_state *s = (struct es1371_state *)file->private_data;
2567 unsigned long flags;
2568 unsigned int mask = 0;
2571 if (file->f_mode & FMODE_WRITE)
2572 poll_wait(file, &s->midi.owait, wait);
2573 if (file->f_mode & FMODE_READ)
2574 poll_wait(file, &s->midi.iwait, wait);
2575 spin_lock_irqsave(&s->lock, flags);
2576 if (file->f_mode & FMODE_READ) {
2577 if (s->midi.icnt > 0)
2578 mask |= POLLIN | POLLRDNORM;
2580 if (file->f_mode & FMODE_WRITE) {
2581 if (s->midi.ocnt < MIDIOUTBUF)
2582 mask |= POLLOUT | POLLWRNORM;
2584 spin_unlock_irqrestore(&s->lock, flags);
2588 static int es1371_midi_open(struct inode *inode, struct file *file)
2590 int minor = iminor(inode);
2591 DECLARE_WAITQUEUE(wait, current);
2592 unsigned long flags;
2593 struct list_head *list;
2594 struct es1371_state *s;
2596 for (list = devs.next; ; list = list->next) {
2599 s = list_entry(list, struct es1371_state, devs);
2600 if (s->dev_midi == minor)
2604 file->private_data = s;
2605 /* wait for device to become free */
2607 while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
2608 if (file->f_flags & O_NONBLOCK) {
2612 add_wait_queue(&s->open_wait, &wait);
2613 __set_current_state(TASK_INTERRUPTIBLE);
2616 remove_wait_queue(&s->open_wait, &wait);
2617 set_current_state(TASK_RUNNING);
2618 if (signal_pending(current))
2619 return -ERESTARTSYS;
2622 spin_lock_irqsave(&s->lock, flags);
2623 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2624 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2625 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2626 outb(UCTRL_CNTRL_SWR, s->io+ES1371_REG_UART_CONTROL);
2627 outb(0, s->io+ES1371_REG_UART_CONTROL);
2628 outb(0, s->io+ES1371_REG_UART_TEST);
2630 if (file->f_mode & FMODE_READ) {
2631 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2633 if (file->f_mode & FMODE_WRITE) {
2634 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2636 s->ctrl |= CTRL_UART_EN;
2637 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2638 es1371_handle_midi(s);
2639 spin_unlock_irqrestore(&s->lock, flags);
2640 s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
2645 static int es1371_midi_release(struct inode *inode, struct file *file)
2647 struct es1371_state *s = (struct es1371_state *)file->private_data;
2648 DECLARE_WAITQUEUE(wait, current);
2649 unsigned long flags;
2650 unsigned count, tmo;
2654 if (file->f_mode & FMODE_WRITE) {
2655 add_wait_queue(&s->midi.owait, &wait);
2657 __set_current_state(TASK_INTERRUPTIBLE);
2658 spin_lock_irqsave(&s->lock, flags);
2659 count = s->midi.ocnt;
2660 spin_unlock_irqrestore(&s->lock, flags);
2663 if (signal_pending(current))
2665 if (file->f_flags & O_NONBLOCK)
2667 tmo = (count * HZ) / 3100;
2668 if (!schedule_timeout(tmo ? : 1) && tmo)
2669 printk(KERN_DEBUG PFX "midi timed out??\n");
2671 remove_wait_queue(&s->midi.owait, &wait);
2672 set_current_state(TASK_RUNNING);
2675 s->open_mode &= ~((file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE));
2676 spin_lock_irqsave(&s->lock, flags);
2677 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2678 s->ctrl &= ~CTRL_UART_EN;
2679 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2681 spin_unlock_irqrestore(&s->lock, flags);
2683 wake_up(&s->open_wait);
2688 static /*const*/ struct file_operations es1371_midi_fops = {
2689 .owner = THIS_MODULE,
2690 .llseek = no_llseek,
2691 .read = es1371_midi_read,
2692 .write = es1371_midi_write,
2693 .poll = es1371_midi_poll,
2694 .open = es1371_midi_open,
2695 .release = es1371_midi_release,
2698 /* --------------------------------------------------------------------- */
2701 * for debugging purposes, we'll create a proc device that dumps the
2706 static int proc_es1371_dump (char *buf, char **start, off_t fpos, int length, int *eof, void *data)
2708 struct es1371_state *s;
2711 if (list_empty(&devs))
2713 s = list_entry(devs.next, struct es1371_state, devs);
2714 /* print out header */
2715 len += sprintf(buf + len, "\t\tCreative ES137x Debug Dump-o-matic\n");
2717 /* print out CODEC state */
2718 len += sprintf (buf + len, "AC97 CODEC state\n");
2719 for (cnt=0; cnt <= 0x7e; cnt = cnt +2)
2720 len+= sprintf (buf + len, "reg:0x%02x val:0x%04x\n", cnt, rdcodec(s->codec, cnt));
2727 *start = buf + fpos;
2728 if ((len -= fpos) > length)
2734 #endif /* ES1371_DEBUG */
2736 /* --------------------------------------------------------------------- */
2738 /* maximum number of devices; only used for command line params */
2741 static int spdif[NR_DEVICE];
2742 static int nomix[NR_DEVICE];
2743 static int amplifier[NR_DEVICE];
2745 static unsigned int devindex;
2747 MODULE_PARM(spdif, "1-" __MODULE_STRING(NR_DEVICE) "i");
2748 MODULE_PARM_DESC(spdif, "if 1 the output is in S/PDIF digital mode");
2749 MODULE_PARM(nomix, "1-" __MODULE_STRING(NR_DEVICE) "i");
2750 MODULE_PARM_DESC(nomix, "if 1 no analog audio is mixed to the digital output");
2751 MODULE_PARM(amplifier, "1-" __MODULE_STRING(NR_DEVICE) "i");
2752 MODULE_PARM_DESC(amplifier, "Set to 1 if the machine needs the amp control enabling (many laptops)");
2754 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2755 MODULE_DESCRIPTION("ES1371 AudioPCI97 Driver");
2756 MODULE_LICENSE("GPL");
2759 /* --------------------------------------------------------------------- */
2761 static struct initvol {
2764 } initvol[] __initdata = {
2765 { SOUND_MIXER_WRITE_LINE, 0x4040 },
2766 { SOUND_MIXER_WRITE_CD, 0x4040 },
2767 { MIXER_WRITE(SOUND_MIXER_VIDEO), 0x4040 },
2768 { SOUND_MIXER_WRITE_LINE1, 0x4040 },
2769 { SOUND_MIXER_WRITE_PCM, 0x4040 },
2770 { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
2771 { MIXER_WRITE(SOUND_MIXER_PHONEOUT), 0x4040 },
2772 { SOUND_MIXER_WRITE_OGAIN, 0x4040 },
2773 { MIXER_WRITE(SOUND_MIXER_PHONEIN), 0x4040 },
2774 { SOUND_MIXER_WRITE_SPEAKER, 0x4040 },
2775 { SOUND_MIXER_WRITE_MIC, 0x4040 },
2776 { SOUND_MIXER_WRITE_RECLEV, 0x4040 },
2777 { SOUND_MIXER_WRITE_IGAIN, 0x4040 }
2783 } amplifier_needed[] =
2785 { 0x107B, 0x2150 }, /* Gateway Solo 2150 */
2786 { 0x13BD, 0x100C }, /* Mebius PC-MJ100V */
2787 { 0x1102, 0x5938 }, /* Targa Xtender 300 */
2788 { 0x1102, 0x8938 }, /* IPC notebook */
2789 { PCI_ANY_ID, PCI_ANY_ID }
2793 static int __devinit es1371_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
2795 struct es1371_state *s;
2797 int i, val, res = -1;
2803 if ((res=pci_enable_device(pcidev)))
2806 if (!(pci_resource_flags(pcidev, 0) & IORESOURCE_IO))
2808 if (pcidev->irq == 0)
2810 i = pci_set_dma_mask(pcidev, 0xffffffff);
2812 printk(KERN_WARNING "es1371: architecture does not support 32bit PCI busmaster DMA\n");
2815 if (!(s = kmalloc(sizeof(struct es1371_state), GFP_KERNEL))) {
2816 printk(KERN_WARNING PFX "out of memory\n");
2819 memset(s, 0, sizeof(struct es1371_state));
2821 s->codec = ac97_alloc_codec();
2822 if(s->codec == NULL)
2825 init_waitqueue_head(&s->dma_adc.wait);
2826 init_waitqueue_head(&s->dma_dac1.wait);
2827 init_waitqueue_head(&s->dma_dac2.wait);
2828 init_waitqueue_head(&s->open_wait);
2829 init_waitqueue_head(&s->midi.iwait);
2830 init_waitqueue_head(&s->midi.owait);
2831 init_MUTEX(&s->open_sem);
2832 spin_lock_init(&s->lock);
2833 s->magic = ES1371_MAGIC;
2835 s->io = pci_resource_start(pcidev, 0);
2836 s->irq = pcidev->irq;
2837 s->vendor = pcidev->vendor;
2838 s->device = pcidev->device;
2839 pci_read_config_byte(pcidev, PCI_REVISION_ID, &s->rev);
2840 s->codec->private_data = s;
2842 s->codec->codec_read = rdcodec;
2843 s->codec->codec_write = wrcodec;
2844 printk(KERN_INFO PFX "found chip, vendor id 0x%04x device id 0x%04x revision 0x%02x\n",
2845 s->vendor, s->device, s->rev);
2846 if (!request_region(s->io, ES1371_EXTENT, "es1371")) {
2847 printk(KERN_ERR PFX "io ports %#lx-%#lx in use\n", s->io, s->io+ES1371_EXTENT-1);
2851 if ((res=request_irq(s->irq, es1371_interrupt, SA_SHIRQ, "es1371",s))) {
2852 printk(KERN_ERR PFX "irq %u in use\n", s->irq);
2855 printk(KERN_INFO PFX "found es1371 rev %d at io %#lx irq %u joystick %#x\n",
2856 s->rev, s->io, s->irq, s->gameport.io);
2857 /* register devices */
2858 if ((res=(s->dev_audio = register_sound_dsp(&es1371_audio_fops,-1)))<0)
2860 if ((res=(s->codec->dev_mixer = register_sound_mixer(&es1371_mixer_fops, -1))) < 0)
2862 if ((res=(s->dev_dac = register_sound_dsp(&es1371_dac_fops, -1))) < 0)
2864 if ((res=(s->dev_midi = register_sound_midi(&es1371_midi_fops, -1)))<0 )
2867 /* initialize the debug proc device */
2868 s->ps = create_proc_read_entry("es1371",0,NULL,proc_es1371_dump,NULL);
2869 #endif /* ES1371_DEBUG */
2871 /* initialize codec registers */
2874 /* Check amplifier requirements */
2876 if (amplifier[devindex])
2877 s->ctrl |= CTRL_GPIO_OUT0;
2878 else for(idx = 0; amplifier_needed[idx].svid != PCI_ANY_ID; idx++)
2880 if(pcidev->subsystem_vendor == amplifier_needed[idx].svid &&
2881 pcidev->subsystem_device == amplifier_needed[idx].sdid)
2883 s->ctrl |= CTRL_GPIO_OUT0; /* turn internal amplifier on */
2884 printk(KERN_INFO PFX "Enabling internal amplifier.\n");
2888 for (i = 0x218; i >= 0x200; i -= 0x08) {
2889 if (request_region(i, JOY_EXTENT, "es1371")) {
2890 s->ctrl |= CTRL_JYSTK_EN | (((i >> 3) & CTRL_JOY_MASK) << CTRL_JOY_SHIFT);
2895 if (!s->gameport.io)
2896 printk(KERN_ERR PFX "no free joystick address found\n");
2900 s->spdif_volume = -1;
2901 /* check to see if s/pdif mode is being requested */
2902 if (spdif[devindex]) {
2904 printk(KERN_INFO PFX "enabling S/PDIF output\n");
2905 s->spdif_volume = 0;
2906 cssr |= STAT_EN_SPDIF;
2907 s->ctrl |= CTRL_SPDIFEN_B;
2908 if (nomix[devindex]) /* don't mix analog inputs to s/pdif output */
2909 s->ctrl |= CTRL_RECEN_B;
2911 printk(KERN_ERR PFX "revision %d does not support S/PDIF\n", s->rev);
2914 /* initialize the chips */
2915 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2916 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2917 outl(LEGACY_JFAST, s->io+ES1371_REG_LEGACY);
2918 pci_set_master(pcidev); /* enable bus mastering */
2919 /* if we are a 5880 turn on the AC97 */
2920 if (s->vendor == PCI_VENDOR_ID_ENSONIQ &&
2921 ((s->device == PCI_DEVICE_ID_ENSONIQ_CT5880 && s->rev >= CT5880REV_CT5880_C) ||
2922 (s->device == PCI_DEVICE_ID_ENSONIQ_ES1371 && s->rev == ES1371REV_CT5880_A) ||
2923 (s->device == PCI_DEVICE_ID_ENSONIQ_ES1371 && s->rev == ES1371REV_ES1373_8))) {
2924 cssr |= CSTAT_5880_AC97_RST;
2925 outl(cssr, s->io+ES1371_REG_STATUS);
2926 /* need to delay around 20ms(bleech) to give
2927 some CODECs enough time to wakeup */
2928 tmo = jiffies + (HZ / 50) + 1;
2930 tmo2 = tmo - jiffies;
2933 schedule_timeout(tmo2);
2936 /* AC97 warm reset to start the bitclk */
2937 outl(s->ctrl | CTRL_SYNCRES, s->io+ES1371_REG_CONTROL);
2939 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2940 /* init the sample rate converter */
2943 if (!ac97_probe_codec(s->codec)) {
2947 /* set default values */
2951 val = SOUND_MASK_LINE;
2952 mixdev_ioctl(s->codec, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2953 for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
2954 val = initvol[i].vol;
2955 mixdev_ioctl(s->codec, initvol[i].mixch, (unsigned long)&val);
2957 /* mute master and PCM when in S/PDIF mode */
2958 if (s->spdif_volume != -1) {
2960 s->codec->mixer_ioctl(s->codec, SOUND_MIXER_WRITE_VOLUME, (unsigned long)&val);
2961 s->codec->mixer_ioctl(s->codec, SOUND_MIXER_WRITE_PCM, (unsigned long)&val);
2964 /* turn on S/PDIF output driver if requested */
2965 outl(cssr, s->io+ES1371_REG_STATUS);
2966 /* register gameport */
2968 gameport_register_port(&s->gameport);
2969 /* store it in the driver field */
2970 pci_set_drvdata(pcidev, s);
2971 /* put it into driver list */
2972 list_add_tail(&s->devs, &devs);
2973 /* increment devindex */
2974 if (devindex < NR_DEVICE-1)
2980 release_region(s->gameport.io, JOY_EXTENT);
2983 remove_proc_entry("es1371", NULL);
2985 unregister_sound_midi(s->dev_midi);
2987 unregister_sound_dsp(s->dev_dac);
2989 unregister_sound_mixer(s->codec->dev_mixer);
2991 unregister_sound_dsp(s->dev_audio);
2993 printk(KERN_ERR PFX "cannot register misc device\n");
2994 free_irq(s->irq, s);
2996 release_region(s->io, ES1371_EXTENT);
2999 ac97_release_codec(s->codec);
3004 static void __devexit es1371_remove(struct pci_dev *dev)
3006 struct es1371_state *s = pci_get_drvdata(dev);
3013 remove_proc_entry("es1371", NULL);
3014 #endif /* ES1371_DEBUG */
3015 outl(0, s->io+ES1371_REG_CONTROL); /* switch everything off */
3016 outl(0, s->io+ES1371_REG_SERIAL_CONTROL); /* clear serial interrupts */
3017 synchronize_irq(s->irq);
3018 free_irq(s->irq, s);
3019 if (s->gameport.io) {
3020 gameport_unregister_port(&s->gameport);
3021 release_region(s->gameport.io, JOY_EXTENT);
3023 release_region(s->io, ES1371_EXTENT);
3024 unregister_sound_dsp(s->dev_audio);
3025 unregister_sound_mixer(s->codec->dev_mixer);
3026 unregister_sound_dsp(s->dev_dac);
3027 unregister_sound_midi(s->dev_midi);
3028 ac97_release_codec(s->codec);
3030 pci_set_drvdata(dev, NULL);
3033 static struct pci_device_id id_table[] = {
3034 { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_ES1371, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
3035 { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_CT5880, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
3036 { PCI_VENDOR_ID_ECTIVA, PCI_DEVICE_ID_ECTIVA_EV1938, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
3040 MODULE_DEVICE_TABLE(pci, id_table);
3042 static struct pci_driver es1371_driver = {
3044 .id_table = id_table,
3045 .probe = es1371_probe,
3046 .remove = __devexit_p(es1371_remove),
3049 static int __init init_es1371(void)
3051 printk(KERN_INFO PFX "version v0.32 time " __TIME__ " " __DATE__ "\n");
3052 return pci_module_init(&es1371_driver);
3055 static void __exit cleanup_es1371(void)
3057 printk(KERN_INFO PFX "unloading\n");
3058 pci_unregister_driver(&es1371_driver);
3061 module_init(init_es1371);
3062 module_exit(cleanup_es1371);
3064 /* --------------------------------------------------------------------- */
3068 /* format is: es1371=[spdif,[nomix,[amplifier]]] */
3070 static int __init es1371_setup(char *str)
3072 static unsigned __initdata nr_dev = 0;
3074 if (nr_dev >= NR_DEVICE)
3078 ((get_option(&str, &spdif[nr_dev]) == 2)
3079 && (get_option(&str, &nomix[nr_dev]) == 2)
3080 && (get_option(&str, &lifier[nr_dev])));
3086 __setup("es1371=", es1371_setup);