1 /*****************************************************************************
3 * ESS Maestro3/Allegro driver for Linux 2.4.x
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * (c) Copyright 2000 Zach Brown <zab@zabbo.net>
21 * I need to thank many people for helping make this driver happen.
22 * As always, Eric Brombaugh was a hacking machine and killed many bugs
23 * that I was too dumb to notice. Howard Kim at ESS provided reference boards
24 * and as much docs as he could. Todd and Mick at Dell tested snapshots on
25 * an army of laptops. msw and deviant at Red Hat also humoured me by hanging
26 * their laptops every few hours in the name of science.
28 * Shouts go out to Mike "DJ XPCom" Ang.
31 * v1.23 - Jun 5 2002 - Michael Olson <olson@cs.odu.edu>
32 * added a module option to allow selection of GPIO pin number
34 * v1.22 - Feb 28 2001 - Zach Brown <zab@zabbo.net>
35 * allocate mem at insmod/setup, rather than open
36 * limit pci dma addresses to 28bit, thanks guys.
37 * v1.21 - Feb 04 2001 - Zach Brown <zab@zabbo.net>
38 * fix up really dumb notifier -> suspend oops
39 * v1.20 - Jan 30 2001 - Zach Brown <zab@zabbo.net>
40 * get rid of pm callback and use pci_dev suspend/resume instead
41 * m3_probe cleanups, including pm oops think-o
42 * v1.10 - Jan 6 2001 - Zach Brown <zab@zabbo.net>
43 * revert to lame remap_page_range mmap() just to make it work
45 * fix up incredibly broken open/release resource management
46 * duh. fix record format setting.
47 * add SMP locking and cleanup formatting here and there
48 * v1.00 - Dec 16 2000 - Zach Brown <zab@zabbo.net>
49 * port to sexy 2.4 interfaces
50 * properly align instance allocations so recording works
51 * clean up function namespace a little :/
52 * update PCI IDs based on mail from ESS
53 * arbitrarily bump version number to show its 2.4 now,
54 * 2.2 will stay 0., oss_audio port gets 2.
55 * v0.03 - Nov 05 2000 - Zach Brown <zab@zabbo.net>
56 * disable recording but allow dsp to be opened read
57 * pull out most silly compat defines
58 * v0.02 - Nov 04 2000 - Zach Brown <zab@zabbo.net>
59 * changed clocking setup for m3, slowdown fixed.
60 * codec reset is hopefully reliable now
61 * rudimentary apm/power management makes suspend/resume work
62 * v0.01 - Oct 31 2000 - Zach Brown <zab@zabbo.net>
64 * v0.00 - Sep 09 2000 - Zach Brown <zab@zabbo.net>
65 * first pass derivation from maestro.c
68 * in/out allocated contiguously so fullduplex mmap will work?
69 * no beep on init (mute)
70 * resetup msrc data memory if freq changes?
74 * Allow me to ramble a bit about the m3 architecture. The core of the
75 * chip is the 'assp', the custom ESS dsp that runs the show. It has
76 * a small amount of code and data ram. ESS drops binary dsp code images
77 * on our heads, but we don't get to see specs on the dsp.
79 * The constant piece of code on the dsp is the 'kernel'. It also has a
80 * chunk of the dsp memory that is statically set aside for its control
81 * info. This is the KDATA defines in maestro3.h. Part of its core
82 * data is a list of code addresses that point to the pieces of DSP code
83 * that it should walk through in its loop. These other pieces of code
84 * do the real work. The kernel presumably jumps into each of them in turn.
85 * These code images tend to have their own data area, and one can have
86 * multiple data areas representing different states for each of the 'client
87 * instance' code portions. There is generally a list in the kernel data
88 * that points to the data instances for a given piece of code.
90 * We've only been given the binary image for the 'minisrc', mini sample
91 * rate converter. This is rather annoying because it limits the work
92 * we can do on the dsp, but it also greatly simplifies the job of managing
93 * dsp data memory for the code and data for our playing streams :). We
94 * statically allocate the minisrc code into a region we 'know' to be free
95 * based on the map of the binary kernel image we're loading. We also
96 * statically allocate the data areas for the maximum number of pcm streams
97 * we can be dealing with. This max is set by the length of the static list
98 * in the kernel data that records the number of minisrc data regions we
99 * can have. Thats right, all software dsp mixing with static code list
102 * How sound goes in and out is still a relative mystery. It appears
103 * that the dsp has the ability to get input and output through various
104 * 'connections'. To do IO from or to a connection, you put the address
105 * of the minisrc client area in the static kernel data lists for that
106 * input or output. so for pcm -> dsp -> mixer, we put the minisrc data
107 * instance in the DMA list and also in the list for the mixer. I guess
108 * it Just Knows which is in/out, and we give some dma control info that
109 * helps. There are all sorts of cool inputs/outputs that it seems we can't
110 * use without dsp code images that know how to use them.
112 * So at init time we preload all the memory allocation stuff and set some
113 * system wide parameters. When we really get a sound to play we build
114 * up its minisrc header (stream parameters, buffer addresses, input/output
115 * settings). Then we throw its header on the various lists. We also
116 * tickle some KDATA settings that ask the assp to raise clock interrupts
117 * and do some amount of software mixing before handing data to the ac97.
119 * Sorry for the vague details. Feel free to ask Eric or myself if you
120 * happen to be trying to use this driver elsewhere. Please accept my
121 * apologies for the quality of the OSS support code, its passed through
122 * too many hands now and desperately wants to be rethought.
125 /*****************************************************************************/
127 #include <linux/config.h>
128 #include <linux/module.h>
129 #include <linux/kernel.h>
130 #include <linux/string.h>
131 #include <linux/ctype.h>
132 #include <linux/ioport.h>
133 #include <linux/sched.h>
134 #include <linux/delay.h>
135 #include <linux/sound.h>
136 #include <linux/slab.h>
137 #include <linux/soundcard.h>
138 #include <linux/pci.h>
139 #include <linux/vmalloc.h>
140 #include <linux/init.h>
141 #include <linux/interrupt.h>
142 #include <linux/poll.h>
143 #include <linux/reboot.h>
144 #include <linux/spinlock.h>
145 #include <linux/ac97_codec.h>
146 #include <linux/wait.h>
150 #include <asm/uaccess.h>
152 #include "maestro3.h"
156 #define DRIVER_VERSION "1.23"
157 #define M3_MODULE_NAME "maestro3"
158 #define PFX M3_MODULE_NAME ": "
160 #define M3_STATE_MAGIC 0x734d724d
161 #define M3_CARD_MAGIC 0x646e6f50
163 #define ESS_FMT_STEREO 0x01
164 #define ESS_FMT_16BIT 0x02
165 #define ESS_FMT_MASK 0x03
166 #define ESS_DAC_SHIFT 0
167 #define ESS_ADC_SHIFT 4
169 #define DAC_RUNNING 1
170 #define ADC_RUNNING 2
172 #define SND_DEV_DSP16 5
176 #define DPMOD 1 /* per module load */
177 #define DPSTR 2 /* per 'stream' */
178 #define DPSYS 3 /* per syscall */
179 #define DPCRAP 4 /* stuff the user shouldn't see unless they're really debuggin */
180 #define DPINT 5 /* per interrupt, LOTS */
181 #define DPRINTK(DP, args...) {if (debug >= (DP)) printk(KERN_DEBUG PFX args);}
192 static int external_amp = 1;
193 static int gpio_pin = -1;
197 struct m3_card *card;
198 unsigned char fmt, enable;
202 /* this locks around the oss state in the driver */
203 /* no, this lock is removed - only use card->lock */
204 /* otherwise: against what are you protecting on SMP
205 when irqhandler uses s->lock
206 and m3_assp_read uses card->lock ?
208 struct semaphore open_sem;
209 wait_queue_head_t open_wait;
214 struct assp_instance {
216 } dac_inst, adc_inst;
218 /* should be in dmabuf */
219 unsigned int rateadc, ratedac;
226 unsigned hwptr, swptr;
227 unsigned total_bytes;
229 unsigned error; /* over/underrun */
230 wait_queue_head_t wait;
231 /* redundant, but makes calculations easier */
234 unsigned fragsamples;
238 unsigned endcleared:1;
239 unsigned ossfragshift;
241 unsigned subdivision;
243 int mixer_index, dma_index, msrc_index, adc1_index;
254 struct m3_card *next;
256 struct ac97_codec *ac97;
257 spinlock_t ac97_lock;
262 #define MAX_DSPS NR_DSPS
263 struct m3_state channels[MAX_DSPS];
265 /* this locks around the physical registers on the card */
268 /* hardware resources */
269 struct pci_dev *pcidev;
277 struct m3_list msrc_list,
282 /* for storing reset state..*/
287 wait_queue_head_t suspend_queue;
291 * an arbitrary volume we set the internal
292 * volume settings to so that the ac97 volume
293 * range is a little less insane. 0x7fff is
296 #define ARB_VOLUME ( 0x6800 )
298 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
304 * a maestro3 with 'hardware strapping', only
310 static char *card_names[] = {
311 [ESS_ALLEGRO] = "Allegro",
312 [ESS_MAESTRO3] = "Maestro3(i)",
313 [ESS_MAESTRO3HW] = "Maestro3(i)hw"
316 #ifndef PCI_VENDOR_ESS
317 #define PCI_VENDOR_ESS 0x125D
320 #define M3_DEVICE(DEV, TYPE) \
322 .vendor = PCI_VENDOR_ESS, \
324 .subvendor = PCI_ANY_ID, \
325 .subdevice = PCI_ANY_ID, \
326 .class = PCI_CLASS_MULTIMEDIA_AUDIO << 8, \
327 .class_mask = 0xffff << 8, \
328 .driver_data = TYPE, \
331 static struct pci_device_id m3_id_table[] = {
332 M3_DEVICE(0x1988, ESS_ALLEGRO),
333 M3_DEVICE(0x1998, ESS_MAESTRO3),
334 M3_DEVICE(0x199a, ESS_MAESTRO3HW),
338 MODULE_DEVICE_TABLE (pci, m3_id_table);
341 * reports seem to indicate that the m3 is limited
342 * to 28bit bus addresses. aaaargggh...
344 #define M3_PCI_DMA_MASK 0x0fffffff
372 static struct m3_card *devs;
375 * I'm not very good at laying out functions in a file :)
377 static int m3_notifier(struct notifier_block *nb, unsigned long event, void *buf);
378 static int m3_suspend(struct pci_dev *pci_dev, u32 state);
379 static void check_suspend(struct m3_card *card);
381 struct notifier_block m3_reboot_nb = {
382 .notifier_call = m3_notifier,
385 static void m3_outw(struct m3_card *card,
386 u16 value, unsigned long reg)
389 outw(value, card->iobase + reg);
392 static u16 m3_inw(struct m3_card *card, unsigned long reg)
395 return inw(card->iobase + reg);
397 static void m3_outb(struct m3_card *card,
398 u8 value, unsigned long reg)
401 outb(value, card->iobase + reg);
403 static u8 m3_inb(struct m3_card *card, unsigned long reg)
406 return inb(card->iobase + reg);
410 * access 16bit words to the code or data regions of the dsp's memory.
411 * index addresses 16bit words.
413 static u16 __m3_assp_read(struct m3_card *card, u16 region, u16 index)
415 m3_outw(card, region & MEMTYPE_MASK, DSP_PORT_MEMORY_TYPE);
416 m3_outw(card, index, DSP_PORT_MEMORY_INDEX);
417 return m3_inw(card, DSP_PORT_MEMORY_DATA);
419 static u16 m3_assp_read(struct m3_card *card, u16 region, u16 index)
424 spin_lock_irqsave(&(card->lock), flags);
425 ret = __m3_assp_read(card, region, index);
426 spin_unlock_irqrestore(&(card->lock), flags);
431 static void __m3_assp_write(struct m3_card *card,
432 u16 region, u16 index, u16 data)
434 m3_outw(card, region & MEMTYPE_MASK, DSP_PORT_MEMORY_TYPE);
435 m3_outw(card, index, DSP_PORT_MEMORY_INDEX);
436 m3_outw(card, data, DSP_PORT_MEMORY_DATA);
438 static void m3_assp_write(struct m3_card *card,
439 u16 region, u16 index, u16 data)
443 spin_lock_irqsave(&(card->lock), flags);
444 __m3_assp_write(card, region, index, data);
445 spin_unlock_irqrestore(&(card->lock), flags);
448 static void m3_assp_halt(struct m3_card *card)
450 card->reset_state = m3_inb(card, DSP_PORT_CONTROL_REG_B) & ~REGB_STOP_CLOCK;
452 m3_outb(card, card->reset_state & ~REGB_ENABLE_RESET, DSP_PORT_CONTROL_REG_B);
455 static void m3_assp_continue(struct m3_card *card)
457 m3_outb(card, card->reset_state | REGB_ENABLE_RESET, DSP_PORT_CONTROL_REG_B);
461 * This makes me sad. the maestro3 has lists
462 * internally that must be packed.. 0 terminates,
463 * apparently, or maybe all unused entries have
464 * to be 0, the lists have static lengths set
465 * by the binary code images.
468 static int m3_add_list(struct m3_card *card,
469 struct m3_list *list, u16 val)
471 DPRINTK(DPSTR, "adding val 0x%x to list 0x%p at pos %d\n",
472 val, list, list->curlen);
474 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
475 list->mem_addr + list->curlen,
478 return list->curlen++;
482 static void m3_remove_list(struct m3_card *card,
483 struct m3_list *list, int index)
486 int lastindex = list->curlen - 1;
488 DPRINTK(DPSTR, "removing ind %d from list 0x%p\n",
491 if(index != lastindex) {
492 val = m3_assp_read(card, MEMTYPE_INTERNAL_DATA,
493 list->mem_addr + lastindex);
494 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
495 list->mem_addr + index,
499 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
500 list->mem_addr + lastindex,
506 static void set_fmt(struct m3_state *s, unsigned char mask, unsigned char data)
510 s->fmt = (s->fmt & mask) | data;
512 tmp = (s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK;
514 /* write to 'mono' word */
515 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
516 s->dac_inst.data + SRC3_DIRECTION_OFFSET + 1,
517 (tmp & ESS_FMT_STEREO) ? 0 : 1);
518 /* write to '8bit' word */
519 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
520 s->dac_inst.data + SRC3_DIRECTION_OFFSET + 2,
521 (tmp & ESS_FMT_16BIT) ? 0 : 1);
523 tmp = (s->fmt >> ESS_ADC_SHIFT) & ESS_FMT_MASK;
525 /* write to 'mono' word */
526 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
527 s->adc_inst.data + SRC3_DIRECTION_OFFSET + 1,
528 (tmp & ESS_FMT_STEREO) ? 0 : 1);
529 /* write to '8bit' word */
530 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
531 s->adc_inst.data + SRC3_DIRECTION_OFFSET + 2,
532 (tmp & ESS_FMT_16BIT) ? 0 : 1);
535 static void set_dac_rate(struct m3_state *s, unsigned int rate)
546 freq = ((rate << 15) + 24000 ) / 48000;
550 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
551 s->dac_inst.data + CDATA_FREQUENCY,
555 static void set_adc_rate(struct m3_state *s, unsigned int rate)
566 freq = ((rate << 15) + 24000 ) / 48000;
570 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
571 s->adc_inst.data + CDATA_FREQUENCY,
575 static void inc_timer_users(struct m3_card *card)
579 spin_lock_irqsave(&card->lock, flags);
582 DPRINTK(DPSYS, "inc timer users now %d\n",
584 if(card->timer_users != 1)
587 __m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
588 KDATA_TIMER_COUNT_RELOAD,
591 __m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
592 KDATA_TIMER_COUNT_CURRENT,
596 m3_inw(card, HOST_INT_CTRL) | CLKRUN_GEN_ENABLE,
599 spin_unlock_irqrestore(&card->lock, flags);
602 static void dec_timer_users(struct m3_card *card)
606 spin_lock_irqsave(&card->lock, flags);
609 DPRINTK(DPSYS, "dec timer users now %d\n",
611 if(card->timer_users > 0 )
614 __m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
615 KDATA_TIMER_COUNT_RELOAD,
618 __m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
619 KDATA_TIMER_COUNT_CURRENT,
622 m3_outw(card, m3_inw(card, HOST_INT_CTRL) & ~CLKRUN_GEN_ENABLE,
625 spin_unlock_irqrestore(&card->lock, flags);
629 * {start,stop}_{adc,dac} should be called
630 * while holding the 'state' lock and they
631 * will try to grab the 'card' lock..
633 static void stop_adc(struct m3_state *s)
635 if (! (s->enable & ADC_RUNNING))
638 s->enable &= ~ADC_RUNNING;
639 dec_timer_users(s->card);
641 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
642 s->adc_inst.data + CDATA_INSTANCE_READY, 0);
644 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
645 KDATA_ADC1_REQUEST, 0);
648 static void stop_dac(struct m3_state *s)
650 if (! (s->enable & DAC_RUNNING))
653 DPRINTK(DPSYS, "stop_dac()\n");
655 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
656 s->dac_inst.data + CDATA_INSTANCE_READY, 0);
658 s->enable &= ~DAC_RUNNING;
659 s->card->dacs_active--;
660 dec_timer_users(s->card);
662 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
663 KDATA_MIXER_TASK_NUMBER,
664 s->card->dacs_active ) ;
667 static void start_dac(struct m3_state *s)
669 if( (!s->dma_dac.mapped && s->dma_dac.count < 1) ||
671 (s->enable & DAC_RUNNING))
674 DPRINTK(DPSYS, "start_dac()\n");
676 s->enable |= DAC_RUNNING;
677 s->card->dacs_active++;
678 inc_timer_users(s->card);
680 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
681 s->dac_inst.data + CDATA_INSTANCE_READY, 1);
683 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
684 KDATA_MIXER_TASK_NUMBER,
685 s->card->dacs_active ) ;
688 static void start_adc(struct m3_state *s)
690 if ((! s->dma_adc.mapped &&
691 s->dma_adc.count >= (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
693 || (s->enable & ADC_RUNNING) )
696 DPRINTK(DPSYS, "start_adc()\n");
698 s->enable |= ADC_RUNNING;
699 inc_timer_users(s->card);
701 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
702 KDATA_ADC1_REQUEST, 1);
704 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
705 s->adc_inst.data + CDATA_INSTANCE_READY, 1);
708 static struct play_vals {
711 {CDATA_LEFT_VOLUME, ARB_VOLUME},
712 {CDATA_RIGHT_VOLUME, ARB_VOLUME},
713 {SRC3_DIRECTION_OFFSET, 0} ,
714 /* +1, +2 are stereo/16 bit */
715 {SRC3_DIRECTION_OFFSET + 3, 0x0000}, /* fraction? */
716 {SRC3_DIRECTION_OFFSET + 4, 0}, /* first l */
717 {SRC3_DIRECTION_OFFSET + 5, 0}, /* first r */
718 {SRC3_DIRECTION_OFFSET + 6, 0}, /* second l */
719 {SRC3_DIRECTION_OFFSET + 7, 0}, /* second r */
720 {SRC3_DIRECTION_OFFSET + 8, 0}, /* delta l */
721 {SRC3_DIRECTION_OFFSET + 9, 0}, /* delta r */
722 {SRC3_DIRECTION_OFFSET + 10, 0x8000}, /* round */
723 {SRC3_DIRECTION_OFFSET + 11, 0xFF00}, /* higher bute mark */
724 {SRC3_DIRECTION_OFFSET + 13, 0}, /* temp0 */
725 {SRC3_DIRECTION_OFFSET + 14, 0}, /* c fraction */
726 {SRC3_DIRECTION_OFFSET + 15, 0}, /* counter */
727 {SRC3_DIRECTION_OFFSET + 16, 8}, /* numin */
728 {SRC3_DIRECTION_OFFSET + 17, 50*2}, /* numout */
729 {SRC3_DIRECTION_OFFSET + 18, MINISRC_BIQUAD_STAGE - 1}, /* numstage */
730 {SRC3_DIRECTION_OFFSET + 20, 0}, /* filtertap */
731 {SRC3_DIRECTION_OFFSET + 21, 0} /* booster */
735 /* the mode passed should be already shifted and masked */
736 static void m3_play_setup(struct m3_state *s, int mode, u32 rate, void *buffer, int size)
738 int dsp_in_size = MINISRC_IN_BUFFER_SIZE - (0x20 * 2);
739 int dsp_out_size = MINISRC_OUT_BUFFER_SIZE - (0x20 * 2);
740 int dsp_in_buffer = s->dac_inst.data + (MINISRC_TMP_BUFFER_SIZE / 2);
741 int dsp_out_buffer = dsp_in_buffer + (dsp_in_size / 2) + 1;
742 struct dmabuf *db = &s->dma_dac;
745 DPRINTK(DPSTR, "mode=%d rate=%d buf=%p len=%d.\n",
746 mode, rate, buffer, size);
748 #define LO(x) ((x) & 0xffff)
749 #define HI(x) LO((x) >> 16)
751 /* host dma buffer pointers */
753 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
754 s->dac_inst.data + CDATA_HOST_SRC_ADDRL,
755 LO(virt_to_bus(buffer)));
757 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
758 s->dac_inst.data + CDATA_HOST_SRC_ADDRH,
759 HI(virt_to_bus(buffer)));
761 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
762 s->dac_inst.data + CDATA_HOST_SRC_END_PLUS_1L,
763 LO(virt_to_bus(buffer) + size));
765 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
766 s->dac_inst.data + CDATA_HOST_SRC_END_PLUS_1H,
767 HI(virt_to_bus(buffer) + size));
769 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
770 s->dac_inst.data + CDATA_HOST_SRC_CURRENTL,
771 LO(virt_to_bus(buffer)));
773 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
774 s->dac_inst.data + CDATA_HOST_SRC_CURRENTH,
775 HI(virt_to_bus(buffer)));
781 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
782 s->dac_inst.data + CDATA_IN_BUF_BEGIN,
785 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
786 s->dac_inst.data + CDATA_IN_BUF_END_PLUS_1,
787 dsp_in_buffer + (dsp_in_size / 2));
789 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
790 s->dac_inst.data + CDATA_IN_BUF_HEAD,
793 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
794 s->dac_inst.data + CDATA_IN_BUF_TAIL,
797 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
798 s->dac_inst.data + CDATA_OUT_BUF_BEGIN,
801 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
802 s->dac_inst.data + CDATA_OUT_BUF_END_PLUS_1,
803 dsp_out_buffer + (dsp_out_size / 2));
805 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
806 s->dac_inst.data + CDATA_OUT_BUF_HEAD,
809 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
810 s->dac_inst.data + CDATA_OUT_BUF_TAIL,
814 * some per client initializers
817 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
818 s->dac_inst.data + SRC3_DIRECTION_OFFSET + 12,
819 s->dac_inst.data + 40 + 8);
821 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
822 s->dac_inst.data + SRC3_DIRECTION_OFFSET + 19,
823 s->dac_inst.code + MINISRC_COEF_LOC);
825 /* enable or disable low pass filter? */
826 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
827 s->dac_inst.data + SRC3_DIRECTION_OFFSET + 22,
828 s->ratedac > 45000 ? 0xff : 0 );
830 /* tell it which way dma is going? */
831 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
832 s->dac_inst.data + CDATA_DMA_CONTROL,
833 DMACONTROL_AUTOREPEAT + DMAC_PAGE3_SELECTOR + DMAC_BLOCKF_SELECTOR);
836 * set an armload of static initializers
838 for(i = 0 ; i < (sizeof(pv) / sizeof(pv[0])) ; i++)
839 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
840 s->dac_inst.data + pv[i].addr, pv[i].val);
843 * put us in the lists if we're not already there
846 if(db->in_lists == 0) {
848 db->msrc_index = m3_add_list(s->card, &s->card->msrc_list,
849 s->dac_inst.data >> DP_SHIFT_COUNT);
851 db->dma_index = m3_add_list(s->card, &s->card->dma_list,
852 s->dac_inst.data >> DP_SHIFT_COUNT);
854 db->mixer_index = m3_add_list(s->card, &s->card->mixer_list,
855 s->dac_inst.data >> DP_SHIFT_COUNT);
860 set_dac_rate(s,rate);
865 * Native record driver
867 static struct rec_vals {
870 {CDATA_LEFT_VOLUME, ARB_VOLUME},
871 {CDATA_RIGHT_VOLUME, ARB_VOLUME},
872 {SRC3_DIRECTION_OFFSET, 1} ,
873 /* +1, +2 are stereo/16 bit */
874 {SRC3_DIRECTION_OFFSET + 3, 0x0000}, /* fraction? */
875 {SRC3_DIRECTION_OFFSET + 4, 0}, /* first l */
876 {SRC3_DIRECTION_OFFSET + 5, 0}, /* first r */
877 {SRC3_DIRECTION_OFFSET + 6, 0}, /* second l */
878 {SRC3_DIRECTION_OFFSET + 7, 0}, /* second r */
879 {SRC3_DIRECTION_OFFSET + 8, 0}, /* delta l */
880 {SRC3_DIRECTION_OFFSET + 9, 0}, /* delta r */
881 {SRC3_DIRECTION_OFFSET + 10, 0x8000}, /* round */
882 {SRC3_DIRECTION_OFFSET + 11, 0xFF00}, /* higher bute mark */
883 {SRC3_DIRECTION_OFFSET + 13, 0}, /* temp0 */
884 {SRC3_DIRECTION_OFFSET + 14, 0}, /* c fraction */
885 {SRC3_DIRECTION_OFFSET + 15, 0}, /* counter */
886 {SRC3_DIRECTION_OFFSET + 16, 50},/* numin */
887 {SRC3_DIRECTION_OFFSET + 17, 8}, /* numout */
888 {SRC3_DIRECTION_OFFSET + 18, 0}, /* numstage */
889 {SRC3_DIRECTION_OFFSET + 19, 0}, /* coef */
890 {SRC3_DIRECTION_OFFSET + 20, 0}, /* filtertap */
891 {SRC3_DIRECTION_OFFSET + 21, 0}, /* booster */
892 {SRC3_DIRECTION_OFFSET + 22, 0xff} /* skip lpf */
895 /* again, passed mode is alrady shifted/masked */
896 static void m3_rec_setup(struct m3_state *s, int mode, u32 rate, void *buffer, int size)
898 int dsp_in_size = MINISRC_IN_BUFFER_SIZE + (0x10 * 2);
899 int dsp_out_size = MINISRC_OUT_BUFFER_SIZE - (0x10 * 2);
900 int dsp_in_buffer = s->adc_inst.data + (MINISRC_TMP_BUFFER_SIZE / 2);
901 int dsp_out_buffer = dsp_in_buffer + (dsp_in_size / 2) + 1;
902 struct dmabuf *db = &s->dma_adc;
905 DPRINTK(DPSTR, "rec_setup mode=%d rate=%d buf=%p len=%d.\n",
906 mode, rate, buffer, size);
908 #define LO(x) ((x) & 0xffff)
909 #define HI(x) LO((x) >> 16)
911 /* host dma buffer pointers */
913 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
914 s->adc_inst.data + CDATA_HOST_SRC_ADDRL,
915 LO(virt_to_bus(buffer)));
917 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
918 s->adc_inst.data + CDATA_HOST_SRC_ADDRH,
919 HI(virt_to_bus(buffer)));
921 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
922 s->adc_inst.data + CDATA_HOST_SRC_END_PLUS_1L,
923 LO(virt_to_bus(buffer) + size));
925 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
926 s->adc_inst.data + CDATA_HOST_SRC_END_PLUS_1H,
927 HI(virt_to_bus(buffer) + size));
929 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
930 s->adc_inst.data + CDATA_HOST_SRC_CURRENTL,
931 LO(virt_to_bus(buffer)));
933 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
934 s->adc_inst.data + CDATA_HOST_SRC_CURRENTH,
935 HI(virt_to_bus(buffer)));
941 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
942 s->adc_inst.data + CDATA_IN_BUF_BEGIN,
945 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
946 s->adc_inst.data + CDATA_IN_BUF_END_PLUS_1,
947 dsp_in_buffer + (dsp_in_size / 2));
949 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
950 s->adc_inst.data + CDATA_IN_BUF_HEAD,
953 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
954 s->adc_inst.data + CDATA_IN_BUF_TAIL,
957 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
958 s->adc_inst.data + CDATA_OUT_BUF_BEGIN,
961 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
962 s->adc_inst.data + CDATA_OUT_BUF_END_PLUS_1,
963 dsp_out_buffer + (dsp_out_size / 2));
965 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
966 s->adc_inst.data + CDATA_OUT_BUF_HEAD,
969 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
970 s->adc_inst.data + CDATA_OUT_BUF_TAIL,
974 * some per client initializers
977 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
978 s->adc_inst.data + SRC3_DIRECTION_OFFSET + 12,
979 s->adc_inst.data + 40 + 8);
981 /* tell it which way dma is going? */
982 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
983 s->adc_inst.data + CDATA_DMA_CONTROL,
984 DMACONTROL_DIRECTION + DMACONTROL_AUTOREPEAT +
985 DMAC_PAGE3_SELECTOR + DMAC_BLOCKF_SELECTOR);
988 * set an armload of static initializers
990 for(i = 0 ; i < (sizeof(rv) / sizeof(rv[0])) ; i++)
991 m3_assp_write(s->card, MEMTYPE_INTERNAL_DATA,
992 s->adc_inst.data + rv[i].addr, rv[i].val);
995 * put us in the lists if we're not already there
998 if(db->in_lists == 0) {
1000 db->adc1_index = m3_add_list(s->card, &s->card->adc1_list,
1001 s->adc_inst.data >> DP_SHIFT_COUNT);
1003 db->dma_index = m3_add_list(s->card, &s->card->dma_list,
1004 s->adc_inst.data >> DP_SHIFT_COUNT);
1006 db->msrc_index = m3_add_list(s->card, &s->card->msrc_list,
1007 s->adc_inst.data >> DP_SHIFT_COUNT);
1012 set_adc_rate(s,rate);
1015 /* --------------------------------------------------------------------- */
1017 static void set_dmaa(struct m3_state *s, unsigned int addr, unsigned int count)
1019 DPRINTK(DPINT,"set_dmaa??\n");
1022 static void set_dmac(struct m3_state *s, unsigned int addr, unsigned int count)
1024 DPRINTK(DPINT,"set_dmac??\n");
1027 u32 get_dma_pos(struct m3_card *card,
1034 * try and get a valid answer
1037 hi = m3_assp_read(card, MEMTYPE_INTERNAL_DATA,
1038 instance_addr + CDATA_HOST_SRC_CURRENTH);
1040 lo = m3_assp_read(card, MEMTYPE_INTERNAL_DATA,
1041 instance_addr + CDATA_HOST_SRC_CURRENTL);
1043 if(hi == m3_assp_read(card, MEMTYPE_INTERNAL_DATA,
1044 instance_addr + CDATA_HOST_SRC_CURRENTH))
1047 return lo | (hi<<16);
1050 u32 get_dmaa(struct m3_state *s)
1054 offset = get_dma_pos(s->card, s->dac_inst.data) -
1055 virt_to_bus(s->dma_dac.rawbuf);
1057 DPRINTK(DPINT,"get_dmaa: 0x%08x\n",offset);
1062 u32 get_dmac(struct m3_state *s)
1066 offset = get_dma_pos(s->card, s->adc_inst.data) -
1067 virt_to_bus(s->dma_adc.rawbuf);
1069 DPRINTK(DPINT,"get_dmac: 0x%08x\n",offset);
1076 prog_dmabuf(struct m3_state *s, unsigned rec)
1078 struct dmabuf *db = rec ? &s->dma_adc : &s->dma_dac;
1079 unsigned rate = rec ? s->rateadc : s->ratedac;
1080 unsigned bytepersec;
1083 unsigned long flags;
1085 spin_lock_irqsave(&s->card->lock, flags);
1090 fmt >>= ESS_ADC_SHIFT;
1093 fmt >>= ESS_DAC_SHIFT;
1095 fmt &= ESS_FMT_MASK;
1097 db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
1099 bytepersec = rate << sample_shift[fmt];
1100 bufs = PAGE_SIZE << db->buforder;
1101 if (db->ossfragshift) {
1102 if ((1000 << db->ossfragshift) < bytepersec)
1103 db->fragshift = ld2(bytepersec/1000);
1105 db->fragshift = db->ossfragshift;
1107 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
1108 if (db->fragshift < 3)
1111 db->numfrag = bufs >> db->fragshift;
1112 while (db->numfrag < 4 && db->fragshift > 3) {
1114 db->numfrag = bufs >> db->fragshift;
1116 db->fragsize = 1 << db->fragshift;
1117 if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
1118 db->numfrag = db->ossmaxfrags;
1119 db->fragsamples = db->fragsize >> sample_shift[fmt];
1120 db->dmasize = db->numfrag << db->fragshift;
1122 DPRINTK(DPSTR,"prog_dmabuf: numfrag: %d fragsize: %d dmasize: %d\n",db->numfrag,db->fragsize,db->dmasize);
1124 memset(db->rawbuf, (fmt & ESS_FMT_16BIT) ? 0 : 0x80, db->dmasize);
1127 m3_rec_setup(s, fmt, s->rateadc, db->rawbuf, db->dmasize);
1129 m3_play_setup(s, fmt, s->ratedac, db->rawbuf, db->dmasize);
1133 spin_unlock_irqrestore(&s->card->lock, flags);
1138 static void clear_advance(struct m3_state *s)
1140 unsigned char c = ((s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_16BIT) ? 0 : 0x80;
1142 unsigned char *buf = s->dma_dac.rawbuf;
1143 unsigned bsize = s->dma_dac.dmasize;
1144 unsigned bptr = s->dma_dac.swptr;
1145 unsigned len = s->dma_dac.fragsize;
1147 if (bptr + len > bsize) {
1148 unsigned x = bsize - bptr;
1149 memset(buf + bptr, c, x);
1150 /* account for wrapping? */
1154 memset(buf + bptr, c, len);
1157 /* call with spinlock held! */
1158 static void m3_update_ptr(struct m3_state *s)
1163 /* update ADC pointer */
1164 if (s->dma_adc.ready) {
1165 hwptr = get_dmac(s) % s->dma_adc.dmasize;
1166 diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
1167 s->dma_adc.hwptr = hwptr;
1168 s->dma_adc.total_bytes += diff;
1169 s->dma_adc.count += diff;
1170 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1171 wake_up(&s->dma_adc.wait);
1172 if (!s->dma_adc.mapped) {
1173 if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
1175 /* brute force everyone back in sync, sigh */
1176 s->dma_adc.count = 0;
1177 s->dma_adc.swptr = 0;
1178 s->dma_adc.hwptr = 0;
1183 /* update DAC pointer */
1184 if (s->dma_dac.ready) {
1185 hwptr = get_dmaa(s) % s->dma_dac.dmasize;
1186 diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
1188 DPRINTK(DPINT,"updating dac: hwptr: %6d diff: %6d count: %6d\n",
1189 hwptr,diff,s->dma_dac.count);
1191 s->dma_dac.hwptr = hwptr;
1192 s->dma_dac.total_bytes += diff;
1194 if (s->dma_dac.mapped) {
1196 s->dma_dac.count += diff;
1197 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize) {
1198 wake_up(&s->dma_dac.wait);
1202 s->dma_dac.count -= diff;
1204 if (s->dma_dac.count <= 0) {
1205 DPRINTK(DPCRAP,"underflow! diff: %d (0x%x) count: %d (0x%x) hw: %d (0x%x) sw: %d (0x%x)\n",
1213 /* brute force everyone back in sync, sigh */
1214 s->dma_dac.count = 0;
1215 s->dma_dac.swptr = hwptr;
1217 } else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
1219 s->dma_dac.endcleared = 1;
1221 if (s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize) {
1222 wake_up(&s->dma_dac.wait);
1223 DPRINTK(DPINT,"waking up DAC count: %d sw: %d hw: %d\n",
1224 s->dma_dac.count, s->dma_dac.swptr, hwptr);
1230 static irqreturn_t m3_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1232 struct m3_card *c = (struct m3_card *)dev_id;
1233 struct m3_state *s = &c->channels[0];
1236 status = inb(c->iobase+0x1A);
1241 /* presumably acking the ints? */
1242 outw(status, c->iobase+0x1A);
1248 * ack an assp int if its running
1249 * and has an int pending
1251 if( status & ASSP_INT_PENDING) {
1252 u8 ctl = inb(c->iobase + ASSP_CONTROL_B);
1253 if( !(ctl & STOP_ASSP_CLOCK)) {
1254 ctl = inb(c->iobase + ASSP_HOST_INT_STATUS );
1255 if(ctl & DSP2HOST_REQ_TIMER) {
1256 outb( DSP2HOST_REQ_TIMER, c->iobase + ASSP_HOST_INT_STATUS);
1257 /* update adc/dac info if it was a timer int */
1258 spin_lock(&c->lock);
1260 spin_unlock(&c->lock);
1265 /* XXX is this needed? */
1267 outb(0x40, c->iobase+0x1A);
1272 /* --------------------------------------------------------------------- */
1274 static const char invalid_magic[] = KERN_CRIT PFX "invalid magic value in %s\n";
1276 #define VALIDATE_MAGIC(FOO,MAG) \
1278 if (!(FOO) || (FOO)->magic != MAG) { \
1279 printk(invalid_magic,__FUNCTION__); \
1284 #define VALIDATE_STATE(a) VALIDATE_MAGIC(a,M3_STATE_MAGIC)
1285 #define VALIDATE_CARD(a) VALIDATE_MAGIC(a,M3_CARD_MAGIC)
1287 /* --------------------------------------------------------------------- */
1289 static int drain_dac(struct m3_state *s, int nonblock)
1291 DECLARE_WAITQUEUE(wait,current);
1292 unsigned long flags;
1296 if (s->dma_dac.mapped || !s->dma_dac.ready)
1298 set_current_state(TASK_INTERRUPTIBLE);
1299 add_wait_queue(&s->dma_dac.wait, &wait);
1301 spin_lock_irqsave(&s->card->lock, flags);
1302 count = s->dma_dac.count;
1303 spin_unlock_irqrestore(&s->card->lock, flags);
1306 if (signal_pending(current))
1309 remove_wait_queue(&s->dma_dac.wait, &wait);
1310 set_current_state(TASK_RUNNING);
1313 tmo = (count * HZ) / s->ratedac;
1314 tmo >>= sample_shift[(s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK];
1315 /* XXX this is just broken. someone is waking us up alot, or schedule_timeout is broken.
1316 or something. who cares. - zach */
1317 if (!schedule_timeout(tmo ? tmo : 1) && tmo)
1318 DPRINTK(DPCRAP,"dma timed out?? %ld\n",jiffies);
1320 remove_wait_queue(&s->dma_dac.wait, &wait);
1321 set_current_state(TASK_RUNNING);
1322 if (signal_pending(current))
1323 return -ERESTARTSYS;
1327 static ssize_t m3_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1329 struct m3_state *s = (struct m3_state *)file->private_data;
1331 unsigned long flags;
1336 if (s->dma_adc.mapped)
1338 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1340 if (!access_ok(VERIFY_WRITE, buffer, count))
1344 spin_lock_irqsave(&s->card->lock, flags);
1349 swptr = s->dma_adc.swptr;
1350 cnt = s->dma_adc.dmasize-swptr;
1351 if (s->dma_adc.count < cnt)
1352 cnt = s->dma_adc.count;
1359 if (file->f_flags & O_NONBLOCK)
1361 ret = ret ? ret : -EAGAIN;
1365 spin_unlock_irqrestore(&s->card->lock, flags);
1366 timed_out = interruptible_sleep_on_timeout(&s->dma_adc.wait, HZ) == 0;
1367 spin_lock_irqsave(&s->card->lock, flags);
1370 printk("read: chip lockup? dmasz %u fragsz %u count %u hwptr %u swptr %u\n",
1371 s->dma_adc.dmasize, s->dma_adc.fragsize, s->dma_adc.count,
1372 s->dma_adc.hwptr, s->dma_adc.swptr);
1374 set_dmac(s, virt_to_bus(s->dma_adc.rawbuf), s->dma_adc.numfrag << s->dma_adc.fragshift);
1375 s->dma_adc.count = s->dma_adc.hwptr = s->dma_adc.swptr = 0;
1377 if (signal_pending(current))
1379 ret = ret ? ret : -ERESTARTSYS;
1385 spin_unlock_irqrestore(&s->card->lock, flags);
1386 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
1387 ret = ret ? ret : -EFAULT;
1390 spin_lock_irqsave(&s->card->lock, flags);
1392 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1393 s->dma_adc.swptr = swptr;
1394 s->dma_adc.count -= cnt;
1402 spin_unlock_irqrestore(&s->card->lock, flags);
1406 static ssize_t m3_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1408 struct m3_state *s = (struct m3_state *)file->private_data;
1410 unsigned long flags;
1415 if (s->dma_dac.mapped)
1417 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1419 if (!access_ok(VERIFY_READ, buffer, count))
1423 spin_lock_irqsave(&s->card->lock, flags);
1428 if (s->dma_dac.count < 0) {
1429 s->dma_dac.count = 0;
1430 s->dma_dac.swptr = s->dma_dac.hwptr;
1432 swptr = s->dma_dac.swptr;
1434 cnt = s->dma_dac.dmasize-swptr;
1436 if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
1437 cnt = s->dma_dac.dmasize - s->dma_dac.count;
1445 if (file->f_flags & O_NONBLOCK) {
1446 if(!ret) ret = -EAGAIN;
1449 spin_unlock_irqrestore(&s->card->lock, flags);
1450 timed_out = interruptible_sleep_on_timeout(&s->dma_dac.wait, HZ) == 0;
1451 spin_lock_irqsave(&s->card->lock, flags);
1453 DPRINTK(DPCRAP,"write: chip lockup? dmasz %u fragsz %u count %u hwptr %u swptr %u\n",
1454 s->dma_dac.dmasize, s->dma_dac.fragsize, s->dma_dac.count,
1455 s->dma_dac.hwptr, s->dma_dac.swptr);
1457 set_dmaa(s, virt_to_bus(s->dma_dac.rawbuf), s->dma_dac.numfrag << s->dma_dac.fragshift);
1458 s->dma_dac.count = s->dma_dac.hwptr = s->dma_dac.swptr = 0;
1460 if (signal_pending(current)) {
1461 if (!ret) ret = -ERESTARTSYS;
1466 spin_unlock_irqrestore(&s->card->lock, flags);
1467 if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt)) {
1468 if (!ret) ret = -EFAULT;
1471 spin_lock_irqsave(&s->card->lock, flags);
1473 DPRINTK(DPSYS,"wrote %6d bytes at sw: %6d cnt: %6d while hw: %6d\n",
1474 cnt, swptr, s->dma_dac.count, s->dma_dac.hwptr);
1476 swptr = (swptr + cnt) % s->dma_dac.dmasize;
1478 s->dma_dac.swptr = swptr;
1479 s->dma_dac.count += cnt;
1480 s->dma_dac.endcleared = 0;
1487 spin_unlock_irqrestore(&s->card->lock, flags);
1491 static unsigned int m3_poll(struct file *file, struct poll_table_struct *wait)
1493 struct m3_state *s = (struct m3_state *)file->private_data;
1494 unsigned long flags;
1495 unsigned int mask = 0;
1498 if (file->f_mode & FMODE_WRITE)
1499 poll_wait(file, &s->dma_dac.wait, wait);
1500 if (file->f_mode & FMODE_READ)
1501 poll_wait(file, &s->dma_adc.wait, wait);
1503 spin_lock_irqsave(&s->card->lock, flags);
1506 if (file->f_mode & FMODE_READ) {
1507 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1508 mask |= POLLIN | POLLRDNORM;
1510 if (file->f_mode & FMODE_WRITE) {
1511 if (s->dma_dac.mapped) {
1512 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
1513 mask |= POLLOUT | POLLWRNORM;
1515 if ((signed)s->dma_dac.dmasize >= s->dma_dac.count + (signed)s->dma_dac.fragsize)
1516 mask |= POLLOUT | POLLWRNORM;
1520 spin_unlock_irqrestore(&s->card->lock, flags);
1524 static int m3_mmap(struct file *file, struct vm_area_struct *vma)
1526 struct m3_state *s = (struct m3_state *)file->private_data;
1527 unsigned long max_size, size, start, offset;
1532 if (vma->vm_flags & VM_WRITE) {
1533 if ((ret = prog_dmabuf(s, 0)) != 0)
1537 if (vma->vm_flags & VM_READ) {
1538 if ((ret = prog_dmabuf(s, 1)) != 0)
1544 max_size = db->dmasize;
1546 start = vma->vm_start;
1547 offset = (vma->vm_pgoff << PAGE_SHIFT);
1548 size = vma->vm_end - vma->vm_start;
1552 if(offset > max_size - size)
1556 * this will be ->nopage() once I can
1557 * ask Jeff what the hell I'm doing wrong.
1560 if (remap_page_range(vma, vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot))
1571 * this function is a disaster..
1573 #define get_user_ret(x, ptr, ret) ({ if(get_user(x, ptr)) return ret; })
1574 static int m3_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1576 struct m3_state *s = (struct m3_state *)file->private_data;
1577 struct m3_card *card=s->card;
1578 unsigned long flags;
1579 audio_buf_info abinfo;
1581 int val, mapped, ret;
1582 unsigned char fmtm, fmtd;
1583 void __user *argp = (void __user *)arg;
1584 int __user *p = argp;
1588 mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1589 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1591 DPRINTK(DPSYS,"m3_ioctl: cmd %d\n", cmd);
1594 case OSS_GETVERSION:
1595 return put_user(SOUND_VERSION, p);
1597 case SNDCTL_DSP_SYNC:
1598 if (file->f_mode & FMODE_WRITE)
1599 return drain_dac(s, file->f_flags & O_NONBLOCK);
1602 case SNDCTL_DSP_SETDUPLEX:
1606 case SNDCTL_DSP_GETCAPS:
1607 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
1609 case SNDCTL_DSP_RESET:
1610 spin_lock_irqsave(&card->lock, flags);
1611 if (file->f_mode & FMODE_WRITE) {
1613 synchronize_irq(s->card->pcidev->irq);
1614 s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
1616 if (file->f_mode & FMODE_READ) {
1618 synchronize_irq(s->card->pcidev->irq);
1619 s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1621 spin_unlock_irqrestore(&card->lock, flags);
1624 case SNDCTL_DSP_SPEED:
1625 get_user_ret(val, p, -EFAULT);
1626 spin_lock_irqsave(&card->lock, flags);
1628 if (file->f_mode & FMODE_READ) {
1630 s->dma_adc.ready = 0;
1631 set_adc_rate(s, val);
1633 if (file->f_mode & FMODE_WRITE) {
1635 s->dma_dac.ready = 0;
1636 set_dac_rate(s, val);
1639 spin_unlock_irqrestore(&card->lock, flags);
1640 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, p);
1642 case SNDCTL_DSP_STEREO:
1643 get_user_ret(val, p, -EFAULT);
1644 spin_lock_irqsave(&card->lock, flags);
1647 if (file->f_mode & FMODE_READ) {
1649 s->dma_adc.ready = 0;
1651 fmtd |= ESS_FMT_STEREO << ESS_ADC_SHIFT;
1653 fmtm &= ~(ESS_FMT_STEREO << ESS_ADC_SHIFT);
1655 if (file->f_mode & FMODE_WRITE) {
1657 s->dma_dac.ready = 0;
1659 fmtd |= ESS_FMT_STEREO << ESS_DAC_SHIFT;
1661 fmtm &= ~(ESS_FMT_STEREO << ESS_DAC_SHIFT);
1663 set_fmt(s, fmtm, fmtd);
1664 spin_unlock_irqrestore(&card->lock, flags);
1667 case SNDCTL_DSP_CHANNELS:
1668 get_user_ret(val, p, -EFAULT);
1669 spin_lock_irqsave(&card->lock, flags);
1673 if (file->f_mode & FMODE_READ) {
1675 s->dma_adc.ready = 0;
1677 fmtd |= ESS_FMT_STEREO << ESS_ADC_SHIFT;
1679 fmtm &= ~(ESS_FMT_STEREO << ESS_ADC_SHIFT);
1681 if (file->f_mode & FMODE_WRITE) {
1683 s->dma_dac.ready = 0;
1685 fmtd |= ESS_FMT_STEREO << ESS_DAC_SHIFT;
1687 fmtm &= ~(ESS_FMT_STEREO << ESS_DAC_SHIFT);
1689 set_fmt(s, fmtm, fmtd);
1691 spin_unlock_irqrestore(&card->lock, flags);
1692 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (ESS_FMT_STEREO << ESS_ADC_SHIFT)
1693 : (ESS_FMT_STEREO << ESS_DAC_SHIFT))) ? 2 : 1, p);
1695 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1696 return put_user(AFMT_U8|AFMT_S16_LE, p);
1698 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1699 get_user_ret(val, p, -EFAULT);
1700 spin_lock_irqsave(&card->lock, flags);
1701 if (val != AFMT_QUERY) {
1704 if (file->f_mode & FMODE_READ) {
1706 s->dma_adc.ready = 0;
1707 if (val == AFMT_S16_LE)
1708 fmtd |= ESS_FMT_16BIT << ESS_ADC_SHIFT;
1710 fmtm &= ~(ESS_FMT_16BIT << ESS_ADC_SHIFT);
1712 if (file->f_mode & FMODE_WRITE) {
1714 s->dma_dac.ready = 0;
1715 if (val == AFMT_S16_LE)
1716 fmtd |= ESS_FMT_16BIT << ESS_DAC_SHIFT;
1718 fmtm &= ~(ESS_FMT_16BIT << ESS_DAC_SHIFT);
1720 set_fmt(s, fmtm, fmtd);
1722 spin_unlock_irqrestore(&card->lock, flags);
1723 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ?
1724 (ESS_FMT_16BIT << ESS_ADC_SHIFT)
1725 : (ESS_FMT_16BIT << ESS_DAC_SHIFT))) ?
1730 case SNDCTL_DSP_POST:
1733 case SNDCTL_DSP_GETTRIGGER:
1735 if ((file->f_mode & FMODE_READ) && (s->enable & ADC_RUNNING))
1736 val |= PCM_ENABLE_INPUT;
1737 if ((file->f_mode & FMODE_WRITE) && (s->enable & DAC_RUNNING))
1738 val |= PCM_ENABLE_OUTPUT;
1739 return put_user(val, p);
1741 case SNDCTL_DSP_SETTRIGGER:
1742 get_user_ret(val, p, -EFAULT);
1743 if (file->f_mode & FMODE_READ) {
1744 if (val & PCM_ENABLE_INPUT) {
1745 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1751 if (file->f_mode & FMODE_WRITE) {
1752 if (val & PCM_ENABLE_OUTPUT) {
1753 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1761 case SNDCTL_DSP_GETOSPACE:
1762 if (!(file->f_mode & FMODE_WRITE))
1764 if (!(s->enable & DAC_RUNNING) && (val = prog_dmabuf(s, 0)) != 0)
1766 spin_lock_irqsave(&card->lock, flags);
1768 abinfo.fragsize = s->dma_dac.fragsize;
1769 abinfo.bytes = s->dma_dac.dmasize - s->dma_dac.count;
1770 abinfo.fragstotal = s->dma_dac.numfrag;
1771 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1772 spin_unlock_irqrestore(&card->lock, flags);
1773 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1775 case SNDCTL_DSP_GETISPACE:
1776 if (!(file->f_mode & FMODE_READ))
1778 if (!(s->enable & ADC_RUNNING) && (val = prog_dmabuf(s, 1)) != 0)
1780 spin_lock_irqsave(&card->lock, flags);
1782 abinfo.fragsize = s->dma_adc.fragsize;
1783 abinfo.bytes = s->dma_adc.count;
1784 abinfo.fragstotal = s->dma_adc.numfrag;
1785 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1786 spin_unlock_irqrestore(&card->lock, flags);
1787 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1789 case SNDCTL_DSP_NONBLOCK:
1790 file->f_flags |= O_NONBLOCK;
1793 case SNDCTL_DSP_GETODELAY:
1794 if (!(file->f_mode & FMODE_WRITE))
1796 spin_lock_irqsave(&card->lock, flags);
1798 val = s->dma_dac.count;
1799 spin_unlock_irqrestore(&card->lock, flags);
1800 return put_user(val, p);
1802 case SNDCTL_DSP_GETIPTR:
1803 if (!(file->f_mode & FMODE_READ))
1805 spin_lock_irqsave(&card->lock, flags);
1807 cinfo.bytes = s->dma_adc.total_bytes;
1808 cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift;
1809 cinfo.ptr = s->dma_adc.hwptr;
1810 if (s->dma_adc.mapped)
1811 s->dma_adc.count &= s->dma_adc.fragsize-1;
1812 spin_unlock_irqrestore(&card->lock, flags);
1813 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1817 case SNDCTL_DSP_GETOPTR:
1818 if (!(file->f_mode & FMODE_WRITE))
1820 spin_lock_irqsave(&card->lock, flags);
1822 cinfo.bytes = s->dma_dac.total_bytes;
1823 cinfo.blocks = s->dma_dac.count >> s->dma_dac.fragshift;
1824 cinfo.ptr = s->dma_dac.hwptr;
1825 if (s->dma_dac.mapped)
1826 s->dma_dac.count &= s->dma_dac.fragsize-1;
1827 spin_unlock_irqrestore(&card->lock, flags);
1828 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1832 case SNDCTL_DSP_GETBLKSIZE:
1833 if (file->f_mode & FMODE_WRITE) {
1834 if ((val = prog_dmabuf(s, 0)))
1836 return put_user(s->dma_dac.fragsize, p);
1838 if ((val = prog_dmabuf(s, 1)))
1840 return put_user(s->dma_adc.fragsize, p);
1842 case SNDCTL_DSP_SETFRAGMENT:
1843 get_user_ret(val, p, -EFAULT);
1844 spin_lock_irqsave(&card->lock, flags);
1845 if (file->f_mode & FMODE_READ) {
1846 s->dma_adc.ossfragshift = val & 0xffff;
1847 s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1848 if (s->dma_adc.ossfragshift < 4)
1849 s->dma_adc.ossfragshift = 4;
1850 if (s->dma_adc.ossfragshift > 15)
1851 s->dma_adc.ossfragshift = 15;
1852 if (s->dma_adc.ossmaxfrags < 4)
1853 s->dma_adc.ossmaxfrags = 4;
1855 if (file->f_mode & FMODE_WRITE) {
1856 s->dma_dac.ossfragshift = val & 0xffff;
1857 s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
1858 if (s->dma_dac.ossfragshift < 4)
1859 s->dma_dac.ossfragshift = 4;
1860 if (s->dma_dac.ossfragshift > 15)
1861 s->dma_dac.ossfragshift = 15;
1862 if (s->dma_dac.ossmaxfrags < 4)
1863 s->dma_dac.ossmaxfrags = 4;
1865 spin_unlock_irqrestore(&card->lock, flags);
1868 case SNDCTL_DSP_SUBDIVIDE:
1869 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1870 (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1872 get_user_ret(val, p, -EFAULT);
1873 if (val != 1 && val != 2 && val != 4)
1875 if (file->f_mode & FMODE_READ)
1876 s->dma_adc.subdivision = val;
1877 if (file->f_mode & FMODE_WRITE)
1878 s->dma_dac.subdivision = val;
1881 case SOUND_PCM_READ_RATE:
1882 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, p);
1884 case SOUND_PCM_READ_CHANNELS:
1885 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (ESS_FMT_STEREO << ESS_ADC_SHIFT)
1886 : (ESS_FMT_STEREO << ESS_DAC_SHIFT))) ? 2 : 1, p);
1888 case SOUND_PCM_READ_BITS:
1889 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (ESS_FMT_16BIT << ESS_ADC_SHIFT)
1890 : (ESS_FMT_16BIT << ESS_DAC_SHIFT))) ? 16 : 8, p);
1892 case SOUND_PCM_WRITE_FILTER:
1893 case SNDCTL_DSP_SETSYNCRO:
1894 case SOUND_PCM_READ_FILTER:
1902 allocate_dmabuf(struct pci_dev *pci_dev, struct dmabuf *db)
1906 DPRINTK(DPSTR,"allocating for dmabuf %p\n", db);
1909 * alloc as big a chunk as we can, start with
1910 * 64k 'cause we're insane. based on order cause
1911 * the amazingly complicated prog_dmabuf wants it.
1913 * pci_alloc_sonsistent guarantees that it won't cross a natural
1914 * boundary; the m3 hardware can't have dma cross a 64k bus
1917 for (order = 16-PAGE_SHIFT; order >= 1; order--) {
1918 db->rawbuf = pci_alloc_consistent(pci_dev, PAGE_SIZE << order,
1927 DPRINTK(DPSTR,"allocated %ld (%d) bytes at %p\n",
1928 PAGE_SIZE<<order, order, db->rawbuf);
1931 struct page *page, *pend;
1933 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << order) - 1);
1934 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
1935 SetPageReserved(page);
1939 db->buforder = order;
1947 nuke_lists(struct m3_card *card, struct dmabuf *db)
1949 m3_remove_list(card, &(card->dma_list), db->dma_index);
1950 m3_remove_list(card, &(card->msrc_list), db->msrc_index);
1955 free_dmabuf(struct pci_dev *pci_dev, struct dmabuf *db)
1957 if(db->rawbuf == NULL)
1960 DPRINTK(DPSTR,"freeing %p from dmabuf %p\n",db->rawbuf, db);
1963 struct page *page, *pend;
1964 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
1965 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
1966 ClearPageReserved(page);
1970 pci_free_consistent(pci_dev, PAGE_SIZE << db->buforder,
1971 db->rawbuf, db->handle);
1979 static int m3_open(struct inode *inode, struct file *file)
1981 unsigned int minor = iminor(inode);
1983 struct m3_state *s = NULL;
1985 unsigned char fmtm = ~0, fmts = 0;
1986 unsigned long flags;
1989 * Scan the cards and find the channel. We only
1990 * do this at open time so it is ok
1992 for(c = devs ; c != NULL ; c = c->next) {
1994 for(i=0;i<NR_DSPS;i++) {
1996 if(c->channels[i].dev_audio < 0)
1998 if((c->channels[i].dev_audio ^ minor) & ~0xf)
2001 s = &c->channels[i];
2011 file->private_data = s;
2013 /* wait for device to become free */
2015 while (s->open_mode & file->f_mode) {
2016 if (file->f_flags & O_NONBLOCK) {
2018 return -EWOULDBLOCK;
2021 interruptible_sleep_on(&s->open_wait);
2022 if (signal_pending(current))
2023 return -ERESTARTSYS;
2027 spin_lock_irqsave(&c->lock, flags);
2029 if (file->f_mode & FMODE_READ) {
2030 fmtm &= ~((ESS_FMT_STEREO | ESS_FMT_16BIT) << ESS_ADC_SHIFT);
2031 if ((minor & 0xf) == SND_DEV_DSP16)
2032 fmts |= ESS_FMT_16BIT << ESS_ADC_SHIFT;
2034 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
2035 set_adc_rate(s, 8000);
2037 if (file->f_mode & FMODE_WRITE) {
2038 fmtm &= ~((ESS_FMT_STEREO | ESS_FMT_16BIT) << ESS_DAC_SHIFT);
2039 if ((minor & 0xf) == SND_DEV_DSP16)
2040 fmts |= ESS_FMT_16BIT << ESS_DAC_SHIFT;
2042 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
2043 set_dac_rate(s, 8000);
2045 set_fmt(s, fmtm, fmts);
2046 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
2049 spin_unlock_irqrestore(&c->lock, flags);
2050 return nonseekable_open(inode, file);
2053 static int m3_release(struct inode *inode, struct file *file)
2055 struct m3_state *s = (struct m3_state *)file->private_data;
2056 struct m3_card *card=s->card;
2057 unsigned long flags;
2060 if (file->f_mode & FMODE_WRITE)
2061 drain_dac(s, file->f_flags & O_NONBLOCK);
2064 spin_lock_irqsave(&card->lock, flags);
2066 if (file->f_mode & FMODE_WRITE) {
2068 if(s->dma_dac.in_lists) {
2069 m3_remove_list(s->card, &(s->card->mixer_list), s->dma_dac.mixer_index);
2070 nuke_lists(s->card, &(s->dma_dac));
2073 if (file->f_mode & FMODE_READ) {
2075 if(s->dma_adc.in_lists) {
2076 m3_remove_list(s->card, &(s->card->adc1_list), s->dma_adc.adc1_index);
2077 nuke_lists(s->card, &(s->dma_adc));
2081 s->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
2083 spin_unlock_irqrestore(&card->lock, flags);
2085 wake_up(&s->open_wait);
2091 * Wait for the ac97 serial bus to be free.
2092 * return nonzero if the bus is still busy.
2094 static int m3_ac97_wait(struct m3_card *card)
2098 while( (m3_inb(card, 0x30) & 1) && i--) ;
2103 u16 m3_ac97_read(struct ac97_codec *codec, u8 reg)
2106 struct m3_card *card = codec->private_data;
2108 spin_lock(&card->ac97_lock);
2110 if(m3_ac97_wait(card)) {
2111 printk(KERN_ERR PFX "serial bus busy reading reg 0x%x\n",reg);
2115 m3_outb(card, 0x80 | (reg & 0x7f), 0x30);
2117 if(m3_ac97_wait(card)) {
2118 printk(KERN_ERR PFX "serial bus busy finishing read reg 0x%x\n",reg);
2122 ret = m3_inw(card, 0x32);
2123 DPRINTK(DPCRAP,"reading 0x%04x from 0x%02x\n",ret, reg);
2126 spin_unlock(&card->ac97_lock);
2130 void m3_ac97_write(struct ac97_codec *codec, u8 reg, u16 val)
2132 struct m3_card *card = codec->private_data;
2134 spin_lock(&card->ac97_lock);
2136 if(m3_ac97_wait(card)) {
2137 printk(KERN_ERR PFX "serial bus busy writing 0x%x to 0x%x\n",val, reg);
2140 DPRINTK(DPCRAP,"writing 0x%04x to 0x%02x\n", val, reg);
2142 m3_outw(card, val, 0x32);
2143 m3_outb(card, reg & 0x7f, 0x30);
2145 spin_unlock(&card->ac97_lock);
2147 /* OSS /dev/mixer file operation methods */
2148 static int m3_open_mixdev(struct inode *inode, struct file *file)
2150 unsigned int minor = iminor(inode);
2151 struct m3_card *card = devs;
2153 for (card = devs; card != NULL; card = card->next) {
2154 if((card->ac97 != NULL) && (card->ac97->dev_mixer == minor))
2162 file->private_data = card->ac97;
2164 return nonseekable_open(inode, file);
2167 static int m3_release_mixdev(struct inode *inode, struct file *file)
2172 static int m3_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
2175 struct ac97_codec *codec = (struct ac97_codec *)file->private_data;
2177 return codec->mixer_ioctl(codec, cmd, arg);
2180 static struct file_operations m3_mixer_fops = {
2181 .owner = THIS_MODULE,
2182 .llseek = no_llseek,
2183 .ioctl = m3_ioctl_mixdev,
2184 .open = m3_open_mixdev,
2185 .release = m3_release_mixdev,
2188 void remote_codec_config(int io, int isremote)
2190 isremote = isremote ? 1 : 0;
2192 outw( (inw(io + RING_BUS_CTRL_B) & ~SECOND_CODEC_ID_MASK) | isremote,
2193 io + RING_BUS_CTRL_B);
2194 outw( (inw(io + SDO_OUT_DEST_CTRL) & ~COMMAND_ADDR_OUT) | isremote,
2195 io + SDO_OUT_DEST_CTRL);
2196 outw( (inw(io + SDO_IN_DEST_CTRL) & ~STATUS_ADDR_IN) | isremote,
2197 io + SDO_IN_DEST_CTRL);
2201 * hack, returns non zero on err
2203 static int try_read_vendor(struct m3_card *card)
2207 if(m3_ac97_wait(card))
2210 m3_outb(card, 0x80 | (AC97_VENDOR_ID1 & 0x7f), 0x30);
2212 if(m3_ac97_wait(card))
2215 ret = m3_inw(card, 0x32);
2217 return (ret == 0) || (ret == 0xffff);
2220 static void m3_codec_reset(struct m3_card *card, int busywait)
2223 int delay1 = 0, delay2 = 0, i;
2224 int io = card->iobase;
2226 switch (card->card_type) {
2228 * the onboard codec on the allegro seems
2229 * to want to wait a very long time before
2230 * coming back to life
2237 case ESS_MAESTRO3HW:
2243 for(i = 0; i < 5; i ++) {
2244 dir = inw(io + GPIO_DIRECTION);
2245 dir |= 0x10; /* assuming pci bus master? */
2247 remote_codec_config(io, 0);
2249 outw(IO_SRAM_ENABLE, io + RING_BUS_CTRL_A);
2252 outw(dir & ~GPO_PRIMARY_AC97 , io + GPIO_DIRECTION);
2253 outw(~GPO_PRIMARY_AC97 , io + GPIO_MASK);
2254 outw(0, io + GPIO_DATA);
2255 outw(dir | GPO_PRIMARY_AC97, io + GPIO_DIRECTION);
2260 set_current_state(TASK_UNINTERRUPTIBLE);
2261 schedule_timeout((delay1 * HZ) / 1000);
2264 outw(GPO_PRIMARY_AC97, io + GPIO_DATA);
2266 /* ok, bring back the ac-link */
2267 outw(IO_SRAM_ENABLE | SERIAL_AC_LINK_ENABLE, io + RING_BUS_CTRL_A);
2268 outw(~0, io + GPIO_MASK);
2273 set_current_state(TASK_UNINTERRUPTIBLE);
2274 schedule_timeout((delay2 * HZ) / 1000);
2276 if(! try_read_vendor(card))
2282 DPRINTK(DPMOD, "retrying codec reset with delays of %d and %d ms\n",
2287 /* more gung-ho reset that doesn't
2288 * seem to work anywhere :)
2290 tmp = inw(io + RING_BUS_CTRL_A);
2291 outw(RAC_SDFS_ENABLE|LAC_SDFS_ENABLE, io + RING_BUS_CTRL_A);
2293 outw(tmp, io + RING_BUS_CTRL_A);
2298 static int __devinit m3_codec_install(struct m3_card *card)
2300 struct ac97_codec *codec;
2302 if ((codec = ac97_alloc_codec()) == NULL)
2305 codec->private_data = card;
2306 codec->codec_read = m3_ac97_read;
2307 codec->codec_write = m3_ac97_write;
2308 /* someday we should support secondary codecs.. */
2311 if (ac97_probe_codec(codec) == 0) {
2312 printk(KERN_ERR PFX "codec probe failed\n");
2313 ac97_release_codec(codec);
2317 if ((codec->dev_mixer = register_sound_mixer(&m3_mixer_fops, -1)) < 0) {
2318 printk(KERN_ERR PFX "couldn't register mixer!\n");
2319 ac97_release_codec(codec);
2329 #define MINISRC_LPF_LEN 10
2330 static u16 minisrc_lpf[MINISRC_LPF_LEN] = {
2331 0X0743, 0X1104, 0X0A4C, 0XF88D, 0X242C,
2332 0X1023, 0X1AA9, 0X0B60, 0XEFDD, 0X186F
2334 static void m3_assp_init(struct m3_card *card)
2338 /* zero kernel data */
2339 for(i = 0 ; i < (REV_B_DATA_MEMORY_UNIT_LENGTH * NUM_UNITS_KERNEL_DATA) / 2; i++)
2340 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
2341 KDATA_BASE_ADDR + i, 0);
2343 /* zero mixer data? */
2344 for(i = 0 ; i < (REV_B_DATA_MEMORY_UNIT_LENGTH * NUM_UNITS_KERNEL_DATA) / 2; i++)
2345 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
2346 KDATA_BASE_ADDR2 + i, 0);
2348 /* init dma pointer */
2349 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
2353 /* write kernel into code memory.. */
2354 for(i = 0 ; i < sizeof(assp_kernel_image) / 2; i++) {
2355 m3_assp_write(card, MEMTYPE_INTERNAL_CODE,
2356 REV_B_CODE_MEMORY_BEGIN + i,
2357 assp_kernel_image[i]);
2361 * We only have this one client and we know that 0x400
2362 * is free in our kernel's mem map, so lets just
2363 * drop it there. It seems that the minisrc doesn't
2364 * need vectors, so we won't bother with them..
2366 for(i = 0 ; i < sizeof(assp_minisrc_image) / 2; i++) {
2367 m3_assp_write(card, MEMTYPE_INTERNAL_CODE,
2369 assp_minisrc_image[i]);
2373 * write the coefficients for the low pass filter?
2375 for(i = 0; i < MINISRC_LPF_LEN ; i++) {
2376 m3_assp_write(card, MEMTYPE_INTERNAL_CODE,
2377 0x400 + MINISRC_COEF_LOC + i,
2381 m3_assp_write(card, MEMTYPE_INTERNAL_CODE,
2382 0x400 + MINISRC_COEF_LOC + MINISRC_LPF_LEN,
2386 * the minisrc is the only thing on
2389 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
2394 * init the mixer number..
2397 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
2398 KDATA_MIXER_TASK_NUMBER,0);
2401 * EXTREME KERNEL MASTER VOLUME
2403 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
2404 KDATA_DAC_LEFT_VOLUME, ARB_VOLUME);
2405 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
2406 KDATA_DAC_RIGHT_VOLUME, ARB_VOLUME);
2408 card->mixer_list.mem_addr = KDATA_MIXER_XFER0;
2409 card->mixer_list.max = MAX_VIRTUAL_MIXER_CHANNELS;
2410 card->adc1_list.mem_addr = KDATA_ADC1_XFER0;
2411 card->adc1_list.max = MAX_VIRTUAL_ADC1_CHANNELS;
2412 card->dma_list.mem_addr = KDATA_DMA_XFER0;
2413 card->dma_list.max = MAX_VIRTUAL_DMA_CHANNELS;
2414 card->msrc_list.mem_addr = KDATA_INSTANCE0_MINISRC;
2415 card->msrc_list.max = MAX_INSTANCE_MINISRC;
2418 static int setup_msrc(struct m3_card *card,
2419 struct assp_instance *inst, int index)
2421 int data_bytes = 2 * ( MINISRC_TMP_BUFFER_SIZE / 2 +
2422 MINISRC_IN_BUFFER_SIZE / 2 +
2423 1 + MINISRC_OUT_BUFFER_SIZE / 2 + 1 );
2427 * the revb memory map has 0x1100 through 0x1c00
2432 * align instance address to 256 bytes so that it's
2433 * shifted list address is aligned.
2434 * list address = (mem address >> 1) >> 7;
2436 data_bytes = (data_bytes + 255) & ~255;
2437 address = 0x1100 + ((data_bytes/2) * index);
2439 if((address + (data_bytes/2)) >= 0x1c00) {
2440 printk(KERN_ERR PFX "no memory for %d bytes at ind %d (addr 0x%x)\n",
2441 data_bytes, index, address);
2445 for(i = 0; i < data_bytes/2 ; i++)
2446 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
2450 inst->data = address;
2455 static int m3_assp_client_init(struct m3_state *s)
2457 setup_msrc(s->card, &(s->dac_inst), s->index * 2);
2458 setup_msrc(s->card, &(s->adc_inst), (s->index * 2) + 1);
2463 static void m3_amp_enable(struct m3_card *card, int enable)
2466 * this works for the reference board, have to find
2469 * this needs more magic for 4 speaker, but..
2471 int io = card->iobase;
2472 u16 gpo, polarity_port, polarity;
2477 if (gpio_pin >= 0 && gpio_pin <= 15) {
2478 polarity_port = 0x1000 + (0x100 * gpio_pin);
2480 switch (card->card_type) {
2482 polarity_port = 0x1800;
2485 polarity_port = 0x1100;
2486 /* Panasonic toughbook CF72 has to be different... */
2487 if(card->pcidev->subsystem_vendor == 0x10F7 && card->pcidev->subsystem_device == 0x833D)
2488 polarity_port = 0x1D00;
2493 gpo = (polarity_port >> 8) & 0x0F;
2494 polarity = polarity_port >> 12;
2496 polarity = !polarity;
2497 polarity = polarity << gpo;
2500 outw(~gpo , io + GPIO_MASK);
2502 outw( inw(io + GPIO_DIRECTION) | gpo ,
2503 io + GPIO_DIRECTION);
2505 outw( (GPO_SECONDARY_AC97 | GPO_PRIMARY_AC97 | polarity) ,
2508 outw(0xffff , io + GPIO_MASK);
2512 maestro_config(struct m3_card *card)
2514 struct pci_dev *pcidev = card->pcidev;
2516 u8 t; /* makes as much sense as 'n', no? */
2518 pci_read_config_dword(pcidev, PCI_ALLEGRO_CONFIG, &n);
2519 n &= REDUCED_DEBOUNCE;
2520 n |= PM_CTRL_ENABLE | CLK_DIV_BY_49 | USE_PCI_TIMING;
2521 pci_write_config_dword(pcidev, PCI_ALLEGRO_CONFIG, n);
2523 outb(RESET_ASSP, card->iobase + ASSP_CONTROL_B);
2524 pci_read_config_dword(pcidev, PCI_ALLEGRO_CONFIG, &n);
2525 n &= ~INT_CLK_SELECT;
2526 if(card->card_type >= ESS_MAESTRO3) {
2527 n &= ~INT_CLK_MULT_ENABLE;
2528 n |= INT_CLK_SRC_NOT_PCI;
2530 n &= ~( CLK_MULT_MODE_SELECT | CLK_MULT_MODE_SELECT_2 );
2531 pci_write_config_dword(pcidev, PCI_ALLEGRO_CONFIG, n);
2533 if(card->card_type <= ESS_ALLEGRO) {
2534 pci_read_config_dword(pcidev, PCI_USER_CONFIG, &n);
2535 n |= IN_CLK_12MHZ_SELECT;
2536 pci_write_config_dword(pcidev, PCI_USER_CONFIG, n);
2539 t = inb(card->iobase + ASSP_CONTROL_A);
2540 t &= ~( DSP_CLK_36MHZ_SELECT | ASSP_CLK_49MHZ_SELECT);
2541 t |= ASSP_CLK_49MHZ_SELECT;
2542 t |= ASSP_0_WS_ENABLE;
2543 outb(t, card->iobase + ASSP_CONTROL_A);
2545 outb(RUN_ASSP, card->iobase + ASSP_CONTROL_B);
2550 static void m3_enable_ints(struct m3_card *card)
2552 unsigned long io = card->iobase;
2554 outw(ASSP_INT_ENABLE, io + HOST_INT_CTRL);
2555 outb(inb(io + ASSP_CONTROL_C) | ASSP_HOST_INT_ENABLE,
2556 io + ASSP_CONTROL_C);
2559 static struct file_operations m3_audio_fops = {
2560 .owner = THIS_MODULE,
2561 .llseek = no_llseek,
2568 .release = m3_release,
2572 int alloc_dsp_suspendmem(struct m3_card *card)
2574 int len = sizeof(u16) * (REV_B_CODE_MEMORY_LENGTH + REV_B_DATA_MEMORY_LENGTH);
2576 if( (card->suspend_mem = vmalloc(len)) == NULL)
2581 void free_dsp_suspendmem(struct m3_card *card)
2583 if(card->suspend_mem)
2584 vfree(card->suspend_mem);
2588 #define alloc_dsp_suspendmem(args...) 0
2589 #define free_dsp_suspendmem(args...)
2593 * great day! this function is ugly as hell.
2595 static int __devinit m3_probe(struct pci_dev *pci_dev, const struct pci_device_id *pci_id)
2599 struct m3_card *card = NULL;
2601 int card_type = pci_id->driver_data;
2603 DPRINTK(DPMOD, "in maestro_install\n");
2605 if (pci_enable_device(pci_dev))
2608 if (pci_set_dma_mask(pci_dev, M3_PCI_DMA_MASK)) {
2609 printk(KERN_ERR PFX "architecture does not support limiting to 28bit PCI bus addresses\n");
2613 pci_set_master(pci_dev);
2615 if( (card = kmalloc(sizeof(struct m3_card), GFP_KERNEL)) == NULL) {
2616 printk(KERN_WARNING PFX "out of memory\n");
2619 memset(card, 0, sizeof(struct m3_card));
2620 card->pcidev = pci_dev;
2621 init_waitqueue_head(&card->suspend_queue);
2623 if ( ! request_region(pci_resource_start(pci_dev, 0),
2624 pci_resource_len (pci_dev, 0), M3_MODULE_NAME)) {
2626 printk(KERN_WARNING PFX "unable to reserve I/O space.\n");
2631 card->iobase = pci_resource_start(pci_dev, 0);
2633 if(alloc_dsp_suspendmem(card)) {
2634 printk(KERN_WARNING PFX "couldn't alloc %d bytes for saving dsp state on suspend\n",
2635 REV_B_CODE_MEMORY_LENGTH + REV_B_DATA_MEMORY_LENGTH);
2640 card->card_type = card_type;
2641 card->irq = pci_dev->irq;
2643 card->magic = M3_CARD_MAGIC;
2644 spin_lock_init(&card->lock);
2645 spin_lock_init(&card->ac97_lock);
2647 for(i = 0; i<NR_DSPS; i++) {
2648 struct m3_state *s = &(card->channels[i]);
2652 printk(KERN_INFO PFX "Configuring ESS %s found at IO 0x%04X IRQ %d\n",
2653 card_names[card->card_type], card->iobase, card->irq);
2655 pci_read_config_dword(pci_dev, PCI_SUBSYSTEM_VENDOR_ID, &n);
2656 printk(KERN_INFO PFX " subvendor id: 0x%08x\n",n);
2658 maestro_config(card);
2661 m3_codec_reset(card, 0);
2663 if(m3_codec_install(card)) {
2669 m3_amp_enable(card, 1);
2671 for(i=0;i<NR_DSPS;i++) {
2672 struct m3_state *s=&card->channels[i];
2677 init_waitqueue_head(&s->dma_adc.wait);
2678 init_waitqueue_head(&s->dma_dac.wait);
2679 init_waitqueue_head(&s->open_wait);
2680 init_MUTEX(&(s->open_sem));
2681 s->magic = M3_STATE_MAGIC;
2683 m3_assp_client_init(s);
2685 if(s->dma_adc.ready || s->dma_dac.ready || s->dma_adc.rawbuf)
2686 printk(KERN_WARNING PFX "initing a dsp device that is already in use?\n");
2687 /* register devices */
2688 if ((s->dev_audio = register_sound_dsp(&m3_audio_fops, -1)) < 0) {
2692 if( allocate_dmabuf(card->pcidev, &(s->dma_adc)) ||
2693 allocate_dmabuf(card->pcidev, &(s->dma_dac))) {
2699 if(request_irq(card->irq, m3_interrupt, SA_SHIRQ, card_names[card->card_type], card)) {
2701 printk(KERN_ERR PFX "unable to allocate irq %d,\n", card->irq);
2707 pci_set_drvdata(pci_dev, card);
2709 m3_enable_ints(card);
2710 m3_assp_continue(card);
2715 release_region(pci_resource_start(pci_dev, 0), pci_resource_len(pci_dev, 0));
2716 free_dsp_suspendmem(card);
2718 unregister_sound_mixer(card->ac97->dev_mixer);
2721 for(i=0;i<NR_DSPS;i++)
2723 struct m3_state *s = &card->channels[i];
2724 if(s->dev_audio != -1)
2725 unregister_sound_dsp(s->dev_audio);
2733 static void m3_remove(struct pci_dev *pci_dev)
2735 struct m3_card *card;
2737 unregister_reboot_notifier(&m3_reboot_nb);
2739 while ((card = devs)) {
2743 free_irq(card->irq, card);
2744 unregister_sound_mixer(card->ac97->dev_mixer);
2747 for(i=0;i<NR_DSPS;i++)
2749 struct m3_state *s = &card->channels[i];
2750 if(s->dev_audio < 0)
2753 unregister_sound_dsp(s->dev_audio);
2754 free_dmabuf(card->pcidev, &s->dma_adc);
2755 free_dmabuf(card->pcidev, &s->dma_dac);
2758 release_region(card->iobase, 256);
2759 free_dsp_suspendmem(card);
2766 * some bioses like the sound chip to be powered down
2767 * at shutdown. We're just calling _suspend to
2770 static int m3_notifier(struct notifier_block *nb, unsigned long event, void *buf)
2772 struct m3_card *card;
2774 DPRINTK(DPMOD, "notifier suspending all cards\n");
2776 for(card = devs; card != NULL; card = card->next) {
2777 if(!card->in_suspend)
2778 m3_suspend(card->pcidev, 3); /* XXX legal? */
2783 static int m3_suspend(struct pci_dev *pci_dev, u32 state)
2785 unsigned long flags;
2787 struct m3_card *card = pci_get_drvdata(pci_dev);
2789 /* must be a better way.. */
2790 spin_lock_irqsave(&card->lock, flags);
2792 DPRINTK(DPMOD, "pm in dev %p\n",card);
2794 for(i=0;i<NR_DSPS;i++) {
2795 struct m3_state *s = &card->channels[i];
2797 if(s->dev_audio == -1)
2800 DPRINTK(DPMOD, "stop_adc/dac() device %d\n",i);
2805 mdelay(10); /* give the assp a chance to idle.. */
2809 if(card->suspend_mem) {
2812 DPRINTK(DPMOD, "saving code\n");
2813 for(i = REV_B_CODE_MEMORY_BEGIN ; i <= REV_B_CODE_MEMORY_END; i++)
2814 card->suspend_mem[index++] =
2815 m3_assp_read(card, MEMTYPE_INTERNAL_CODE, i);
2816 DPRINTK(DPMOD, "saving data\n");
2817 for(i = REV_B_DATA_MEMORY_BEGIN ; i <= REV_B_DATA_MEMORY_END; i++)
2818 card->suspend_mem[index++] =
2819 m3_assp_read(card, MEMTYPE_INTERNAL_DATA, i);
2822 DPRINTK(DPMOD, "powering down apci regs\n");
2823 m3_outw(card, 0xffff, 0x54);
2824 m3_outw(card, 0xffff, 0x56);
2826 card->in_suspend = 1;
2828 spin_unlock_irqrestore(&card->lock, flags);
2833 static int m3_resume(struct pci_dev *pci_dev)
2835 unsigned long flags;
2838 struct m3_card *card = pci_get_drvdata(pci_dev);
2840 spin_lock_irqsave(&card->lock, flags);
2841 card->in_suspend = 0;
2843 DPRINTK(DPMOD, "resuming\n");
2845 /* first lets just bring everything back. .*/
2847 DPRINTK(DPMOD, "bringing power back on card 0x%p\n",card);
2848 m3_outw(card, 0, 0x54);
2849 m3_outw(card, 0, 0x56);
2851 DPRINTK(DPMOD, "restoring pci configs and reseting codec\n");
2852 maestro_config(card);
2854 m3_codec_reset(card, 1);
2856 DPRINTK(DPMOD, "restoring dsp code card\n");
2858 for(i = REV_B_CODE_MEMORY_BEGIN ; i <= REV_B_CODE_MEMORY_END; i++)
2859 m3_assp_write(card, MEMTYPE_INTERNAL_CODE, i,
2860 card->suspend_mem[index++]);
2861 for(i = REV_B_DATA_MEMORY_BEGIN ; i <= REV_B_DATA_MEMORY_END; i++)
2862 m3_assp_write(card, MEMTYPE_INTERNAL_DATA, i,
2863 card->suspend_mem[index++]);
2865 /* tell the dma engine to restart itself */
2866 m3_assp_write(card, MEMTYPE_INTERNAL_DATA,
2867 KDATA_DMA_ACTIVE, 0);
2869 DPRINTK(DPMOD, "resuming dsp\n");
2870 m3_assp_continue(card);
2872 DPRINTK(DPMOD, "enabling ints\n");
2873 m3_enable_ints(card);
2875 /* bring back the old school flavor */
2876 for(i = 0; i < SOUND_MIXER_NRDEVICES ; i++) {
2877 int state = card->ac97->mixer_state[i];
2878 if (!supported_mixer(card->ac97, i))
2881 card->ac97->write_mixer(card->ac97, i,
2882 state & 0xff, (state >> 8) & 0xff);
2885 m3_amp_enable(card, 1);
2888 * now we flip on the music
2890 for(i=0;i<NR_DSPS;i++) {
2891 struct m3_state *s = &card->channels[i];
2892 if(s->dev_audio == -1)
2895 * db->ready makes it so these guys can be
2896 * called unconditionally..
2898 DPRINTK(DPMOD, "turning on dacs ind %d\n",i);
2903 spin_unlock_irqrestore(&card->lock, flags);
2906 * all right, we think things are ready,
2907 * wake up people who were using the device
2910 wake_up(&card->suspend_queue);
2915 MODULE_AUTHOR("Zach Brown <zab@zabbo.net>");
2916 MODULE_DESCRIPTION("ESS Maestro3/Allegro Driver");
2917 MODULE_LICENSE("GPL");
2920 MODULE_PARM(debug,"i");
2922 MODULE_PARM(external_amp,"i");
2923 MODULE_PARM(gpio_pin, "i");
2925 static struct pci_driver m3_pci_driver = {
2926 .name = "ess_m3_audio",
2927 .id_table = m3_id_table,
2929 .remove = m3_remove,
2930 .suspend = m3_suspend,
2931 .resume = m3_resume,
2934 static int __init m3_init_module(void)
2936 printk(KERN_INFO PFX "version " DRIVER_VERSION " built at " __TIME__ " " __DATE__ "\n");
2938 if (register_reboot_notifier(&m3_reboot_nb)) {
2939 printk(KERN_WARNING PFX "reboot notifier registration failed\n");
2940 return -ENODEV; /* ? */
2943 if (!pci_register_driver(&m3_pci_driver)) {
2944 pci_unregister_driver(&m3_pci_driver);
2945 unregister_reboot_notifier(&m3_reboot_nb);
2951 static void __exit m3_cleanup_module(void)
2953 pci_unregister_driver(&m3_pci_driver);
2956 module_init(m3_init_module);
2957 module_exit(m3_cleanup_module);
2959 void check_suspend(struct m3_card *card)
2961 DECLARE_WAITQUEUE(wait, current);
2963 if(!card->in_suspend)
2967 add_wait_queue(&card->suspend_queue, &wait);
2968 set_current_state(TASK_UNINTERRUPTIBLE);
2970 remove_wait_queue(&card->suspend_queue, &wait);
2971 set_current_state(TASK_RUNNING);