1 /***********************************************************************
2 * Copyright 2001 MontaVista Software Inc.
3 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
5 * drivers/sound/nec_vrc5477.c
6 * AC97 sound dirver for NEC Vrc5477 chip (an integrated,
7 * multi-function controller chip for MIPS CPUs)
9 * VRA support Copyright 2001 Bradley D. LaRonde <brad@ltc.com>
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 ***********************************************************************
19 * This code is derived from ite8172.c, which is written by Steve Longerbeam.
22 * Currently we only support the following capabilities:
23 * . mono output to PCM L/R (line out).
24 * . stereo output to PCM L/R (line out).
25 * . mono input from PCM L (line in).
26 * . stereo output from PCM (line in).
27 * . sampling rate at 48k or variable sampling rate
28 * . support /dev/dsp, /dev/mixer devices, standard OSS devices.
29 * . only support 16-bit PCM format (hardware limit, no software
31 * . support duplex, but no trigger or realtime.
33 * Specifically the following are not supported:
34 * . app-set frag size.
35 * . mmap'ed buffer access
39 * Original comments from ite8172.c file.
46 * 1. Much of the OSS buffer allocation, ioctl's, and mmap'ing are
47 * taken, slightly modified or not at all, from the ES1371 driver,
48 * so refer to the credits in es1371.c for those. The rest of the
49 * code (probe, open, read, write, the ISR, etc.) is new.
50 * 2. The following support is untested:
51 * * Memory mapping the audio buffers, and the ioctl controls that go
54 * 3. The following is not supported:
56 * * legacy audio mode.
57 * 4. Support for volume button interrupts is implemented but doesn't
61 * 02.08.2001 0.1 Initial release
64 #include <linux/module.h>
65 #include <linux/string.h>
66 #include <linux/kernel.h>
67 #include <linux/ioport.h>
68 #include <linux/sched.h>
69 #include <linux/delay.h>
70 #include <linux/sound.h>
71 #include <linux/slab.h>
72 #include <linux/soundcard.h>
73 #include <linux/pci.h>
74 #include <linux/init.h>
75 #include <linux/poll.h>
76 #include <linux/bitops.h>
77 #include <linux/proc_fs.h>
78 #include <linux/spinlock.h>
79 #include <linux/smp_lock.h>
80 #include <linux/ac97_codec.h>
81 #include <linux/interrupt.h>
84 #include <asm/uaccess.h>
86 /* -------------------debug macros -------------------------------------- */
87 /* #undef VRC5477_AC97_DEBUG */
88 #define VRC5477_AC97_DEBUG
90 #undef VRC5477_AC97_VERBOSE_DEBUG
91 /* #define VRC5477_AC97_VERBOSE_DEBUG */
93 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
94 #define VRC5477_AC97_DEBUG
97 #if defined(VRC5477_AC97_DEBUG)
98 #define ASSERT(x) if (!(x)) { \
99 panic("assertion failed at %s:%d: %s\n", __FILE__, __LINE__, #x); }
102 #endif /* VRC5477_AC97_DEBUG */
104 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
105 static u16 inTicket; /* check sync between intr & write */
106 static u16 outTicket;
109 /* --------------------------------------------------------------------- */
111 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
113 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
115 #define VRC5477_INT_CLR 0x0
116 #define VRC5477_INT_STATUS 0x0
117 #define VRC5477_CODEC_WR 0x4
118 #define VRC5477_CODEC_RD 0x8
119 #define VRC5477_CTRL 0x18
120 #define VRC5477_ACLINK_CTRL 0x1c
121 #define VRC5477_INT_MASK 0x24
123 #define VRC5477_DAC1_CTRL 0x30
124 #define VRC5477_DAC1L 0x34
125 #define VRC5477_DAC1_BADDR 0x38
126 #define VRC5477_DAC2_CTRL 0x3c
127 #define VRC5477_DAC2L 0x40
128 #define VRC5477_DAC2_BADDR 0x44
129 #define VRC5477_DAC3_CTRL 0x48
130 #define VRC5477_DAC3L 0x4c
131 #define VRC5477_DAC3_BADDR 0x50
133 #define VRC5477_ADC1_CTRL 0x54
134 #define VRC5477_ADC1L 0x58
135 #define VRC5477_ADC1_BADDR 0x5c
136 #define VRC5477_ADC2_CTRL 0x60
137 #define VRC5477_ADC2L 0x64
138 #define VRC5477_ADC2_BADDR 0x68
139 #define VRC5477_ADC3_CTRL 0x6c
140 #define VRC5477_ADC3L 0x70
141 #define VRC5477_ADC3_BADDR 0x74
143 #define VRC5477_CODEC_WR_RWC (1 << 23)
145 #define VRC5477_CODEC_RD_RRDYA (1 << 31)
146 #define VRC5477_CODEC_RD_RRDYD (1 << 30)
148 #define VRC5477_ACLINK_CTRL_RST_ON (1 << 15)
149 #define VRC5477_ACLINK_CTRL_RST_TIME 0x7f
150 #define VRC5477_ACLINK_CTRL_SYNC_ON (1 << 30)
151 #define VRC5477_ACLINK_CTRL_CK_STOP_ON (1 << 31)
153 #define VRC5477_CTRL_DAC2ENB (1 << 15)
154 #define VRC5477_CTRL_ADC2ENB (1 << 14)
155 #define VRC5477_CTRL_DAC1ENB (1 << 13)
156 #define VRC5477_CTRL_ADC1ENB (1 << 12)
158 #define VRC5477_INT_MASK_NMASK (1 << 31)
159 #define VRC5477_INT_MASK_DAC1END (1 << 5)
160 #define VRC5477_INT_MASK_DAC2END (1 << 4)
161 #define VRC5477_INT_MASK_DAC3END (1 << 3)
162 #define VRC5477_INT_MASK_ADC1END (1 << 2)
163 #define VRC5477_INT_MASK_ADC2END (1 << 1)
164 #define VRC5477_INT_MASK_ADC3END (1 << 0)
166 #define VRC5477_DMA_ACTIVATION (1 << 31)
167 #define VRC5477_DMA_WIP (1 << 30)
170 #define VRC5477_AC97_MODULE_NAME "NEC_Vrc5477_audio"
171 #define PFX VRC5477_AC97_MODULE_NAME ": "
173 /* --------------------------------------------------------------------- */
175 struct vrc5477_ac97_state {
176 /* list of vrc5477_ac97 devices */
177 struct list_head devs;
179 /* the corresponding pci_dev structure */
182 /* soundcore stuff */
185 /* hardware resources */
189 #ifdef VRC5477_AC97_DEBUG
190 /* debug /proc entry */
191 struct proc_dir_entry *ps;
192 struct proc_dir_entry *ac97_ps;
193 #endif /* VRC5477_AC97_DEBUG */
195 struct ac97_codec *codec;
197 unsigned dacChannels, adcChannels;
198 unsigned short dacRate, adcRate;
199 unsigned short extended_status;
202 struct semaphore open_sem;
204 wait_queue_head_t open_wait;
208 dma_addr_t lbufDma, rbufDma;
212 unsigned fragSize; /* redundant */
213 unsigned fragTotalSize; /* = numFrag * fragSize(real) */
217 unsigned error; /* over/underrun */
218 wait_queue_head_t wait;
224 #define WORK_BUF_SIZE 2048
228 } workBuf[WORK_BUF_SIZE/4];
231 /* --------------------------------------------------------------------- */
233 static LIST_HEAD(devs);
235 /* --------------------------------------------------------------------- */
237 static inline unsigned ld2(unsigned int x)
262 /* --------------------------------------------------------------------- */
264 static u16 rdcodec(struct ac97_codec *codec, u8 addr)
266 struct vrc5477_ac97_state *s =
267 (struct vrc5477_ac97_state *)codec->private_data;
271 spin_lock_irqsave(&s->lock, flags);
273 /* wait until we can access codec registers */
274 while (inl(s->io + VRC5477_CODEC_WR) & 0x80000000);
276 /* write the address and "read" command to codec */
278 outl((addr << 16) | VRC5477_CODEC_WR_RWC, s->io + VRC5477_CODEC_WR);
280 /* get the return result */
281 udelay(100); /* workaround hardware bug */
282 while ( (result = inl(s->io + VRC5477_CODEC_RD)) &
283 (VRC5477_CODEC_RD_RRDYA | VRC5477_CODEC_RD_RRDYD) ) {
284 /* we get either addr or data, or both */
285 if (result & VRC5477_CODEC_RD_RRDYA) {
286 ASSERT(addr == ((result >> 16) & 0x7f) );
288 if (result & VRC5477_CODEC_RD_RRDYD) {
293 spin_unlock_irqrestore(&s->lock, flags);
295 return result & 0xffff;
299 static void wrcodec(struct ac97_codec *codec, u8 addr, u16 data)
301 struct vrc5477_ac97_state *s =
302 (struct vrc5477_ac97_state *)codec->private_data;
305 spin_lock_irqsave(&s->lock, flags);
307 /* wait until we can access codec registers */
308 while (inl(s->io + VRC5477_CODEC_WR) & 0x80000000);
310 /* write the address and value to codec */
311 outl((addr << 16) | data, s->io + VRC5477_CODEC_WR);
313 spin_unlock_irqrestore(&s->lock, flags);
317 static void waitcodec(struct ac97_codec *codec)
319 struct vrc5477_ac97_state *s =
320 (struct vrc5477_ac97_state *)codec->private_data;
322 /* wait until we can access codec registers */
323 while (inl(s->io + VRC5477_CODEC_WR) & 0x80000000);
326 static int ac97_codec_not_present(struct ac97_codec *codec)
328 struct vrc5477_ac97_state *s =
329 (struct vrc5477_ac97_state *)codec->private_data;
331 unsigned short count = 0xffff;
333 spin_lock_irqsave(&s->lock, flags);
335 /* wait until we can access codec registers */
337 if (!(inl(s->io + VRC5477_CODEC_WR) & 0x80000000))
342 spin_unlock_irqrestore(&s->lock, flags);
346 /* write 0 to reset */
347 outl((AC97_RESET << 16) | 0, s->io + VRC5477_CODEC_WR);
349 /* test whether we get a response from ac97 chip */
352 if (!(inl(s->io + VRC5477_CODEC_WR) & 0x80000000))
357 spin_unlock_irqrestore(&s->lock, flags);
360 spin_unlock_irqrestore(&s->lock, flags);
364 /* --------------------------------------------------------------------- */
366 static void vrc5477_ac97_delay(int msec)
374 tmo = jiffies + (msec*HZ)/1000;
376 tmo2 = tmo - jiffies;
379 schedule_timeout(tmo2);
384 static void set_adc_rate(struct vrc5477_ac97_state *s, unsigned rate)
386 wrcodec(s->codec, AC97_PCM_LR_ADC_RATE, rate);
391 static void set_dac_rate(struct vrc5477_ac97_state *s, unsigned rate)
393 if(s->extended_status & AC97_EXTSTAT_VRA) {
394 wrcodec(s->codec, AC97_PCM_FRONT_DAC_RATE, rate);
395 s->dacRate = rdcodec(s->codec, AC97_PCM_FRONT_DAC_RATE);
400 /* --------------------------------------------------------------------- */
403 stop_dac(struct vrc5477_ac97_state *s)
405 struct dmabuf* db = &s->dma_dac;
409 spin_lock_irqsave(&s->lock, flags);
412 spin_unlock_irqrestore(&s->lock, flags);
416 /* deactivate the dma */
417 outl(0, s->io + VRC5477_DAC1_CTRL);
418 outl(0, s->io + VRC5477_DAC2_CTRL);
420 /* wait for DAM completely stop */
421 while (inl(s->io + VRC5477_DAC1_CTRL) & VRC5477_DMA_WIP);
422 while (inl(s->io + VRC5477_DAC2_CTRL) & VRC5477_DMA_WIP);
424 /* disable dac slots in aclink */
425 temp = inl(s->io + VRC5477_CTRL);
426 temp &= ~ (VRC5477_CTRL_DAC1ENB | VRC5477_CTRL_DAC2ENB);
427 outl (temp, s->io + VRC5477_CTRL);
429 /* disable interrupts */
430 temp = inl(s->io + VRC5477_INT_MASK);
431 temp &= ~ (VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END);
432 outl (temp, s->io + VRC5477_INT_MASK);
434 /* clear pending ones */
435 outl(VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END,
436 s->io + VRC5477_INT_CLR);
440 spin_unlock_irqrestore(&s->lock, flags);
443 static void start_dac(struct vrc5477_ac97_state *s)
445 struct dmabuf* db = &s->dma_dac;
450 spin_lock_irqsave(&s->lock, flags);
453 spin_unlock_irqrestore(&s->lock, flags);
457 /* we should have some data to do the DMA trasnfer */
458 ASSERT(db->count >= db->fragSize);
460 /* clear pending fales interrupts */
461 outl(VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END,
462 s->io + VRC5477_INT_CLR);
464 /* enable interrupts */
465 temp = inl(s->io + VRC5477_INT_MASK);
466 temp |= VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END;
467 outl(temp, s->io + VRC5477_INT_MASK);
469 /* setup dma base addr */
470 outl(db->lbufDma + db->nextOut, s->io + VRC5477_DAC1_BADDR);
471 if (s->dacChannels == 1) {
472 outl(db->lbufDma + db->nextOut, s->io + VRC5477_DAC2_BADDR);
474 outl(db->rbufDma + db->nextOut, s->io + VRC5477_DAC2_BADDR);
477 /* set dma length, in the unit of 0x10 bytes */
478 dmaLength = db->fragSize >> 4;
479 outl(dmaLength, s->io + VRC5477_DAC1L);
480 outl(dmaLength, s->io + VRC5477_DAC2L);
483 outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_DAC1_CTRL);
484 outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_DAC2_CTRL);
486 /* enable dac slots - we should hear the music now! */
487 temp = inl(s->io + VRC5477_CTRL);
488 temp |= (VRC5477_CTRL_DAC1ENB | VRC5477_CTRL_DAC2ENB);
489 outl (temp, s->io + VRC5477_CTRL);
491 /* it is time to setup next dma transfer */
492 ASSERT(inl(s->io + VRC5477_DAC1_CTRL) & VRC5477_DMA_WIP);
493 ASSERT(inl(s->io + VRC5477_DAC2_CTRL) & VRC5477_DMA_WIP);
495 temp = db->nextOut + db->fragSize;
496 if (temp >= db->fragTotalSize) {
497 ASSERT(temp == db->fragTotalSize);
501 outl(db->lbufDma + temp, s->io + VRC5477_DAC1_BADDR);
502 if (s->dacChannels == 1) {
503 outl(db->lbufDma + temp, s->io + VRC5477_DAC2_BADDR);
505 outl(db->rbufDma + temp, s->io + VRC5477_DAC2_BADDR);
510 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
511 outTicket = *(u16*)(db->lbuf+db->nextOut);
512 if (db->count > db->fragSize) {
513 ASSERT((u16)(outTicket+1) == *(u16*)(db->lbuf+temp));
517 spin_unlock_irqrestore(&s->lock, flags);
520 static inline void stop_adc(struct vrc5477_ac97_state *s)
522 struct dmabuf* db = &s->dma_adc;
526 spin_lock_irqsave(&s->lock, flags);
529 spin_unlock_irqrestore(&s->lock, flags);
533 /* deactivate the dma */
534 outl(0, s->io + VRC5477_ADC1_CTRL);
535 outl(0, s->io + VRC5477_ADC2_CTRL);
537 /* disable adc slots in aclink */
538 temp = inl(s->io + VRC5477_CTRL);
539 temp &= ~ (VRC5477_CTRL_ADC1ENB | VRC5477_CTRL_ADC2ENB);
540 outl (temp, s->io + VRC5477_CTRL);
542 /* disable interrupts */
543 temp = inl(s->io + VRC5477_INT_MASK);
544 temp &= ~ (VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END);
545 outl (temp, s->io + VRC5477_INT_MASK);
547 /* clear pending ones */
548 outl(VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END,
549 s->io + VRC5477_INT_CLR);
553 spin_unlock_irqrestore(&s->lock, flags);
556 static void start_adc(struct vrc5477_ac97_state *s)
558 struct dmabuf* db = &s->dma_adc;
563 spin_lock_irqsave(&s->lock, flags);
566 spin_unlock_irqrestore(&s->lock, flags);
570 /* we should at least have some free space in the buffer */
571 ASSERT(db->count < db->fragTotalSize - db->fragSize * 2);
573 /* clear pending ones */
574 outl(VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END,
575 s->io + VRC5477_INT_CLR);
577 /* enable interrupts */
578 temp = inl(s->io + VRC5477_INT_MASK);
579 temp |= VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END;
580 outl(temp, s->io + VRC5477_INT_MASK);
582 /* setup dma base addr */
583 outl(db->lbufDma + db->nextIn, s->io + VRC5477_ADC1_BADDR);
584 outl(db->rbufDma + db->nextIn, s->io + VRC5477_ADC2_BADDR);
586 /* setup dma length */
587 dmaLength = db->fragSize >> 4;
588 outl(dmaLength, s->io + VRC5477_ADC1L);
589 outl(dmaLength, s->io + VRC5477_ADC2L);
592 outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_ADC1_CTRL);
593 outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_ADC2_CTRL);
595 /* enable adc slots */
596 temp = inl(s->io + VRC5477_CTRL);
597 temp |= (VRC5477_CTRL_ADC1ENB | VRC5477_CTRL_ADC2ENB);
598 outl (temp, s->io + VRC5477_CTRL);
600 /* it is time to setup next dma transfer */
601 temp = db->nextIn + db->fragSize;
602 if (temp >= db->fragTotalSize) {
603 ASSERT(temp == db->fragTotalSize);
606 outl(db->lbufDma + temp, s->io + VRC5477_ADC1_BADDR);
607 outl(db->rbufDma + temp, s->io + VRC5477_ADC2_BADDR);
611 spin_unlock_irqrestore(&s->lock, flags);
614 /* --------------------------------------------------------------------- */
616 #define DMABUF_DEFAULTORDER (16-PAGE_SHIFT)
617 #define DMABUF_MINORDER 1
619 static inline void dealloc_dmabuf(struct vrc5477_ac97_state *s,
624 pci_free_consistent(s->dev, PAGE_SIZE << db->bufOrder,
625 db->lbuf, db->lbufDma);
626 pci_free_consistent(s->dev, PAGE_SIZE << db->bufOrder,
627 db->rbuf, db->rbufDma);
628 db->lbuf = db->rbuf = NULL;
630 db->nextIn = db->nextOut = 0;
634 static int prog_dmabuf(struct vrc5477_ac97_state *s,
645 for (order = DMABUF_DEFAULTORDER;
646 order >= DMABUF_MINORDER;
648 db->lbuf = pci_alloc_consistent(s->dev,
651 db->rbuf = pci_alloc_consistent(s->dev,
654 if (db->lbuf && db->rbuf) break;
657 pci_free_consistent(s->dev,
668 db->bufOrder = order;
672 db->nextIn = db->nextOut = 0;
674 bufsize = PAGE_SIZE << db->bufOrder;
675 db->fragShift = ld2(rate * 2 / 100);
676 if (db->fragShift < 4) db->fragShift = 4;
678 db->numFrag = bufsize >> db->fragShift;
679 while (db->numFrag < 4 && db->fragShift > 4) {
681 db->numFrag = bufsize >> db->fragShift;
683 db->fragSize = 1 << db->fragShift;
684 db->fragTotalSize = db->numFrag << db->fragShift;
685 memset(db->lbuf, 0, db->fragTotalSize);
686 memset(db->rbuf, 0, db->fragTotalSize);
693 static inline int prog_dmabuf_adc(struct vrc5477_ac97_state *s)
696 return prog_dmabuf(s, &s->dma_adc, s->adcRate);
699 static inline int prog_dmabuf_dac(struct vrc5477_ac97_state *s)
702 return prog_dmabuf(s, &s->dma_dac, s->dacRate);
706 /* --------------------------------------------------------------------- */
707 /* hold spinlock for the following! */
709 static inline void vrc5477_ac97_adc_interrupt(struct vrc5477_ac97_state *s)
711 struct dmabuf* adc = &s->dma_adc;
714 /* we need two frags avaiable because one is already being used
715 * and the other will be used when next interrupt happens.
717 if (adc->count >= adc->fragTotalSize - adc->fragSize) {
720 printk(KERN_INFO PFX "adc overrun\n");
724 /* set the base addr for next DMA transfer */
725 temp = adc->nextIn + 2*adc->fragSize;
726 if (temp >= adc->fragTotalSize) {
727 ASSERT( (temp == adc->fragTotalSize) ||
728 (temp == adc->fragTotalSize + adc->fragSize) );
729 temp -= adc->fragTotalSize;
731 outl(adc->lbufDma + temp, s->io + VRC5477_ADC1_BADDR);
732 outl(adc->rbufDma + temp, s->io + VRC5477_ADC2_BADDR);
735 adc->nextIn += adc->fragSize;
736 if (adc->nextIn >= adc->fragTotalSize) {
737 ASSERT(adc->nextIn == adc->fragTotalSize);
742 adc->count += adc->fragSize;
744 /* wake up anybody listening */
745 if (waitqueue_active(&adc->wait)) {
746 wake_up_interruptible(&adc->wait);
750 static inline void vrc5477_ac97_dac_interrupt(struct vrc5477_ac97_state *s)
752 struct dmabuf* dac = &s->dma_dac;
755 /* next DMA transfer should already started */
756 // ASSERT(inl(s->io + VRC5477_DAC1_CTRL) & VRC5477_DMA_WIP);
757 // ASSERT(inl(s->io + VRC5477_DAC2_CTRL) & VRC5477_DMA_WIP);
759 /* let us set for next next DMA transfer */
760 temp = dac->nextOut + dac->fragSize*2;
761 if (temp >= dac->fragTotalSize) {
762 ASSERT( (temp == dac->fragTotalSize) ||
763 (temp == dac->fragTotalSize + dac->fragSize) );
764 temp -= dac->fragTotalSize;
766 outl(dac->lbufDma + temp, s->io + VRC5477_DAC1_BADDR);
767 if (s->dacChannels == 1) {
768 outl(dac->lbufDma + temp, s->io + VRC5477_DAC2_BADDR);
770 outl(dac->rbufDma + temp, s->io + VRC5477_DAC2_BADDR);
773 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
774 if (*(u16*)(dac->lbuf + dac->nextOut) != outTicket) {
775 printk("assert fail: - %d vs %d\n",
776 *(u16*)(dac->lbuf + dac->nextOut),
782 /* adjust nextOut pointer */
783 dac->nextOut += dac->fragSize;
784 if (dac->nextOut >= dac->fragTotalSize) {
785 ASSERT(dac->nextOut == dac->fragTotalSize);
790 dac->count -= dac->fragSize;
791 if (dac->count <=0 ) {
792 /* buffer under run */
794 dac->nextIn = dac->nextOut;
798 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
801 ASSERT(*(u16*)(dac->lbuf + dac->nextOut) == outTicket);
805 /* we cannot have both under run and someone is waiting on us */
806 ASSERT(! (waitqueue_active(&dac->wait) && (dac->count <= 0)) );
808 /* wake up anybody listening */
809 if (waitqueue_active(&dac->wait))
810 wake_up_interruptible(&dac->wait);
813 static irqreturn_t vrc5477_ac97_interrupt(int irq, void *dev_id, struct pt_regs *regs)
815 struct vrc5477_ac97_state *s = (struct vrc5477_ac97_state *)dev_id;
817 u32 adcInterrupts, dacInterrupts;
821 /* get irqStatus and clear the detected ones */
822 irqStatus = inl(s->io + VRC5477_INT_STATUS);
823 outl(irqStatus, s->io + VRC5477_INT_CLR);
825 /* let us see what we get */
826 dacInterrupts = VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END;
827 adcInterrupts = VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END;
828 if (irqStatus & dacInterrupts) {
829 /* we should get both interrupts, but just in case ... */
830 if (irqStatus & VRC5477_INT_MASK_DAC1END) {
831 vrc5477_ac97_dac_interrupt(s);
833 if ( (irqStatus & dacInterrupts) != dacInterrupts ) {
834 printk(KERN_WARNING "vrc5477_ac97 : dac interrupts not in sync!!!\n");
838 } else if (irqStatus & adcInterrupts) {
839 /* we should get both interrupts, but just in case ... */
840 if(irqStatus & VRC5477_INT_MASK_ADC1END) {
841 vrc5477_ac97_adc_interrupt(s);
843 if ( (irqStatus & adcInterrupts) != adcInterrupts ) {
844 printk(KERN_WARNING "vrc5477_ac97 : adc interrupts not in sync!!!\n");
850 spin_unlock(&s->lock);
854 /* --------------------------------------------------------------------- */
856 static int vrc5477_ac97_open_mixdev(struct inode *inode, struct file *file)
858 int minor = iminor(inode);
859 struct list_head *list;
860 struct vrc5477_ac97_state *s;
862 for (list = devs.next; ; list = list->next) {
865 s = list_entry(list, struct vrc5477_ac97_state, devs);
866 if (s->codec->dev_mixer == minor)
869 file->private_data = s;
870 return nonseekable_open(inode, file);
873 static int vrc5477_ac97_release_mixdev(struct inode *inode, struct file *file)
879 static int mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd,
882 return codec->mixer_ioctl(codec, cmd, arg);
885 static int vrc5477_ac97_ioctl_mixdev(struct inode *inode, struct file *file,
886 unsigned int cmd, unsigned long arg)
888 struct vrc5477_ac97_state *s =
889 (struct vrc5477_ac97_state *)file->private_data;
890 struct ac97_codec *codec = s->codec;
892 return mixdev_ioctl(codec, cmd, arg);
895 static /*const*/ struct file_operations vrc5477_ac97_mixer_fops = {
896 .owner = THIS_MODULE,
898 .ioctl = vrc5477_ac97_ioctl_mixdev,
899 .open = vrc5477_ac97_open_mixdev,
900 .release = vrc5477_ac97_release_mixdev,
903 /* --------------------------------------------------------------------- */
905 static int drain_dac(struct vrc5477_ac97_state *s, int nonblock)
910 if (!s->dma_dac.ready)
914 spin_lock_irqsave(&s->lock, flags);
915 count = s->dma_dac.count;
916 spin_unlock_irqrestore(&s->lock, flags);
919 if (signal_pending(current))
923 tmo = 1000 * count / s->dacRate / 2;
924 vrc5477_ac97_delay(tmo);
926 if (signal_pending(current))
931 /* --------------------------------------------------------------------- */
934 copy_two_channel_adc_to_user(struct vrc5477_ac97_state *s,
938 struct dmabuf *db = &s->dma_adc;
939 int bufStart = db->nextOut;
940 for (; copyCount > 0; ) {
942 int count = copyCount;
943 if (count > WORK_BUF_SIZE/2) count = WORK_BUF_SIZE/2;
944 for (i=0; i< count/2; i++) {
945 s->workBuf[i].lchannel =
946 *(u16*)(db->lbuf + bufStart + i*2);
947 s->workBuf[i].rchannel =
948 *(u16*)(db->rbuf + bufStart + i*2);
950 if (copy_to_user(buffer, s->workBuf, count*2)) {
956 ASSERT(bufStart <= db->fragTotalSize);
962 /* return the total bytes that is copied */
964 copy_adc_to_user(struct vrc5477_ac97_state *s,
969 struct dmabuf *db = &s->dma_adc;
972 int totalCopyCount = 0;
973 int totalCopyFragCount = 0;
976 /* adjust count to signel channel byte count */
977 count >>= s->adcChannels - 1;
979 /* we may have to "copy" twice as ring buffer wraps around */
980 for (; (avail > 0) && (count > 0); ) {
981 /* determine max possible copy count for single channel */
983 if (copyCount > avail) {
986 if (copyCount + db->nextOut > db->fragTotalSize) {
987 copyCount = db->fragTotalSize - db->nextOut;
988 ASSERT((copyCount % db->fragSize) == 0);
991 copyFragCount = (copyCount-1) >> db->fragShift;
992 copyFragCount = (copyFragCount+1) << db->fragShift;
993 ASSERT(copyFragCount >= copyCount);
995 /* we copy differently based on adc channels */
996 if (s->adcChannels == 1) {
997 if (copy_to_user(buffer,
998 db->lbuf + db->nextOut,
1002 /* *sigh* we have to mix two streams into one */
1003 if (copy_two_channel_adc_to_user(s, buffer, copyCount))
1008 totalCopyCount += copyCount;
1009 avail -= copyFragCount;
1010 totalCopyFragCount += copyFragCount;
1012 buffer += copyCount << (s->adcChannels-1);
1014 db->nextOut += copyFragCount;
1015 if (db->nextOut >= db->fragTotalSize) {
1016 ASSERT(db->nextOut == db->fragTotalSize);
1020 ASSERT((copyFragCount % db->fragSize) == 0);
1021 ASSERT( (count == 0) || (copyCount == copyFragCount));
1024 spin_lock_irqsave(&s->lock, flags);
1025 db->count -= totalCopyFragCount;
1026 spin_unlock_irqrestore(&s->lock, flags);
1028 return totalCopyCount << (s->adcChannels-1);
1032 vrc5477_ac97_read(struct file *file,
1037 struct vrc5477_ac97_state *s =
1038 (struct vrc5477_ac97_state *)file->private_data;
1039 struct dmabuf *db = &s->dma_adc;
1041 unsigned long flags;
1045 if (!access_ok(VERIFY_WRITE, buffer, count))
1051 // wait for samples in capture buffer
1053 spin_lock_irqsave(&s->lock, flags);
1057 spin_unlock_irqrestore(&s->lock, flags);
1059 if (file->f_flags & O_NONBLOCK) {
1064 interruptible_sleep_on(&db->wait);
1065 if (signal_pending(current)) {
1071 } while (avail <= 0);
1073 ASSERT( (avail % db->fragSize) == 0);
1074 copyCount = copy_adc_to_user(s, buffer, count, avail);
1075 if (copyCount <=0 ) {
1076 if (!ret) ret = -EFAULT;
1081 buffer += copyCount;
1083 } // while (count > 0)
1089 copy_two_channel_dac_from_user(struct vrc5477_ac97_state *s,
1093 struct dmabuf *db = &s->dma_dac;
1094 int bufStart = db->nextIn;
1098 for (; copyCount > 0; ) {
1100 int count = copyCount;
1101 if (count > WORK_BUF_SIZE/2) count = WORK_BUF_SIZE/2;
1102 if (copy_from_user(s->workBuf, buffer, count*2)) {
1105 for (i=0; i< count/2; i++) {
1106 *(u16*)(db->lbuf + bufStart + i*2) =
1107 s->workBuf[i].lchannel;
1108 *(u16*)(db->rbuf + bufStart + i*2) =
1109 s->workBuf[i].rchannel;
1114 ASSERT(bufStart <= db->fragTotalSize);
1121 /* return the total bytes that is copied */
1123 copy_dac_from_user(struct vrc5477_ac97_state *s,
1128 struct dmabuf *db = &s->dma_dac;
1130 int copyFragCount=0;
1131 int totalCopyCount = 0;
1132 int totalCopyFragCount = 0;
1133 unsigned long flags;
1134 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
1138 /* adjust count to signel channel byte count */
1139 count >>= s->dacChannels - 1;
1141 /* we may have to "copy" twice as ring buffer wraps around */
1142 for (; (avail > 0) && (count > 0); ) {
1143 /* determine max possible copy count for single channel */
1145 if (copyCount > avail) {
1148 if (copyCount + db->nextIn > db->fragTotalSize) {
1149 copyCount = db->fragTotalSize - db->nextIn;
1150 ASSERT(copyCount > 0);
1153 copyFragCount = copyCount;
1154 ASSERT(copyFragCount >= copyCount);
1156 /* we copy differently based on the number channels */
1157 if (s->dacChannels == 1) {
1158 if (copy_from_user(db->lbuf + db->nextIn,
1162 /* fill gaps with 0 */
1163 memset(db->lbuf + db->nextIn + copyCount,
1165 copyFragCount - copyCount);
1167 /* we have demux the stream into two separate ones */
1168 if (copy_two_channel_dac_from_user(s, buffer, copyCount))
1170 /* fill gaps with 0 */
1171 memset(db->lbuf + db->nextIn + copyCount,
1173 copyFragCount - copyCount);
1174 memset(db->rbuf + db->nextIn + copyCount,
1176 copyFragCount - copyCount);
1179 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
1180 for (i=0; i< copyFragCount; i+= db->fragSize) {
1181 *(u16*)(db->lbuf + db->nextIn + i) = inTicket ++;
1186 totalCopyCount += copyCount;
1187 avail -= copyFragCount;
1188 totalCopyFragCount += copyFragCount;
1190 buffer += copyCount << (s->dacChannels - 1);
1192 db->nextIn += copyFragCount;
1193 if (db->nextIn >= db->fragTotalSize) {
1194 ASSERT(db->nextIn == db->fragTotalSize);
1198 ASSERT( (count == 0) || (copyCount == copyFragCount));
1201 spin_lock_irqsave(&s->lock, flags);
1202 db->count += totalCopyFragCount;
1207 /* nextIn should not be equal to nextOut unless we are full */
1208 ASSERT( ( (db->count == db->fragTotalSize) &&
1209 (db->nextIn == db->nextOut) ) ||
1210 ( (db->count < db->fragTotalSize) &&
1211 (db->nextIn != db->nextOut) ) );
1213 spin_unlock_irqrestore(&s->lock, flags);
1215 return totalCopyCount << (s->dacChannels-1);
1219 static ssize_t vrc5477_ac97_write(struct file *file, const char *buffer,
1220 size_t count, loff_t *ppos)
1222 struct vrc5477_ac97_state *s =
1223 (struct vrc5477_ac97_state *)file->private_data;
1224 struct dmabuf *db = &s->dma_dac;
1226 unsigned long flags;
1227 int copyCount, avail;
1229 if (!access_ok(VERIFY_READ, buffer, count))
1234 // wait for space in playback buffer
1236 spin_lock_irqsave(&s->lock, flags);
1237 avail = db->fragTotalSize - db->count;
1238 spin_unlock_irqrestore(&s->lock, flags);
1240 if (file->f_flags & O_NONBLOCK) {
1245 interruptible_sleep_on(&db->wait);
1246 if (signal_pending(current)) {
1252 } while (avail <= 0);
1254 copyCount = copy_dac_from_user(s, buffer, count, avail);
1255 if (copyCount < 0) {
1256 if (!ret) ret = -EFAULT;
1261 buffer += copyCount;
1263 } // while (count > 0)
1268 /* No kernel lock - we have our own spinlock */
1269 static unsigned int vrc5477_ac97_poll(struct file *file,
1270 struct poll_table_struct *wait)
1272 struct vrc5477_ac97_state *s = (struct vrc5477_ac97_state *)file->private_data;
1273 unsigned long flags;
1274 unsigned int mask = 0;
1276 if (file->f_mode & FMODE_WRITE)
1277 poll_wait(file, &s->dma_dac.wait, wait);
1278 if (file->f_mode & FMODE_READ)
1279 poll_wait(file, &s->dma_adc.wait, wait);
1280 spin_lock_irqsave(&s->lock, flags);
1281 if (file->f_mode & FMODE_READ) {
1282 if (s->dma_adc.count >= (signed)s->dma_adc.fragSize)
1283 mask |= POLLIN | POLLRDNORM;
1285 if (file->f_mode & FMODE_WRITE) {
1286 if ((signed)s->dma_dac.fragTotalSize >=
1287 s->dma_dac.count + (signed)s->dma_dac.fragSize)
1288 mask |= POLLOUT | POLLWRNORM;
1290 spin_unlock_irqrestore(&s->lock, flags);
1294 #ifdef VRC5477_AC97_DEBUG
1295 static struct ioctl_str_t {
1299 {SNDCTL_DSP_RESET, "SNDCTL_DSP_RESET"},
1300 {SNDCTL_DSP_SYNC, "SNDCTL_DSP_SYNC"},
1301 {SNDCTL_DSP_SPEED, "SNDCTL_DSP_SPEED"},
1302 {SNDCTL_DSP_STEREO, "SNDCTL_DSP_STEREO"},
1303 {SNDCTL_DSP_GETBLKSIZE, "SNDCTL_DSP_GETBLKSIZE"},
1304 {SNDCTL_DSP_SETFMT, "SNDCTL_DSP_SETFMT"},
1305 {SNDCTL_DSP_SAMPLESIZE, "SNDCTL_DSP_SAMPLESIZE"},
1306 {SNDCTL_DSP_CHANNELS, "SNDCTL_DSP_CHANNELS"},
1307 {SOUND_PCM_WRITE_CHANNELS, "SOUND_PCM_WRITE_CHANNELS"},
1308 {SOUND_PCM_WRITE_FILTER, "SOUND_PCM_WRITE_FILTER"},
1309 {SNDCTL_DSP_POST, "SNDCTL_DSP_POST"},
1310 {SNDCTL_DSP_SUBDIVIDE, "SNDCTL_DSP_SUBDIVIDE"},
1311 {SNDCTL_DSP_SETFRAGMENT, "SNDCTL_DSP_SETFRAGMENT"},
1312 {SNDCTL_DSP_GETFMTS, "SNDCTL_DSP_GETFMTS"},
1313 {SNDCTL_DSP_GETOSPACE, "SNDCTL_DSP_GETOSPACE"},
1314 {SNDCTL_DSP_GETISPACE, "SNDCTL_DSP_GETISPACE"},
1315 {SNDCTL_DSP_NONBLOCK, "SNDCTL_DSP_NONBLOCK"},
1316 {SNDCTL_DSP_GETCAPS, "SNDCTL_DSP_GETCAPS"},
1317 {SNDCTL_DSP_GETTRIGGER, "SNDCTL_DSP_GETTRIGGER"},
1318 {SNDCTL_DSP_SETTRIGGER, "SNDCTL_DSP_SETTRIGGER"},
1319 {SNDCTL_DSP_GETIPTR, "SNDCTL_DSP_GETIPTR"},
1320 {SNDCTL_DSP_GETOPTR, "SNDCTL_DSP_GETOPTR"},
1321 {SNDCTL_DSP_MAPINBUF, "SNDCTL_DSP_MAPINBUF"},
1322 {SNDCTL_DSP_MAPOUTBUF, "SNDCTL_DSP_MAPOUTBUF"},
1323 {SNDCTL_DSP_SETSYNCRO, "SNDCTL_DSP_SETSYNCRO"},
1324 {SNDCTL_DSP_SETDUPLEX, "SNDCTL_DSP_SETDUPLEX"},
1325 {SNDCTL_DSP_GETODELAY, "SNDCTL_DSP_GETODELAY"},
1326 {SNDCTL_DSP_GETCHANNELMASK, "SNDCTL_DSP_GETCHANNELMASK"},
1327 {SNDCTL_DSP_BIND_CHANNEL, "SNDCTL_DSP_BIND_CHANNEL"},
1328 {OSS_GETVERSION, "OSS_GETVERSION"},
1329 {SOUND_PCM_READ_RATE, "SOUND_PCM_READ_RATE"},
1330 {SOUND_PCM_READ_CHANNELS, "SOUND_PCM_READ_CHANNELS"},
1331 {SOUND_PCM_READ_BITS, "SOUND_PCM_READ_BITS"},
1332 {SOUND_PCM_READ_FILTER, "SOUND_PCM_READ_FILTER"}
1336 static int vrc5477_ac97_ioctl(struct inode *inode, struct file *file,
1337 unsigned int cmd, unsigned long arg)
1339 struct vrc5477_ac97_state *s = (struct vrc5477_ac97_state *)file->private_data;
1340 unsigned long flags;
1341 audio_buf_info abinfo;
1345 #ifdef VRC5477_AC97_DEBUG
1346 for (count=0; count<sizeof(ioctl_str)/sizeof(ioctl_str[0]); count++) {
1347 if (ioctl_str[count].cmd == cmd)
1350 if (count < sizeof(ioctl_str)/sizeof(ioctl_str[0]))
1351 printk(KERN_INFO PFX "ioctl %s\n", ioctl_str[count].str);
1353 printk(KERN_INFO PFX "ioctl unknown, 0x%x\n", cmd);
1357 case OSS_GETVERSION:
1358 return put_user(SOUND_VERSION, (int *)arg);
1360 case SNDCTL_DSP_SYNC:
1361 if (file->f_mode & FMODE_WRITE)
1362 return drain_dac(s, file->f_flags & O_NONBLOCK);
1365 case SNDCTL_DSP_SETDUPLEX:
1368 case SNDCTL_DSP_GETCAPS:
1369 return put_user(DSP_CAP_DUPLEX, (int *)arg);
1371 case SNDCTL_DSP_RESET:
1372 if (file->f_mode & FMODE_WRITE) {
1374 synchronize_irq(s->irq);
1375 s->dma_dac.count = 0;
1376 s->dma_dac.nextIn = s->dma_dac.nextOut = 0;
1378 if (file->f_mode & FMODE_READ) {
1380 synchronize_irq(s->irq);
1381 s->dma_adc.count = 0;
1382 s->dma_adc.nextIn = s->dma_adc.nextOut = 0;
1386 case SNDCTL_DSP_SPEED:
1387 if (get_user(val, (int *)arg))
1390 if (file->f_mode & FMODE_READ) {
1392 set_adc_rate(s, val);
1393 if ((ret = prog_dmabuf_adc(s)))
1396 if (file->f_mode & FMODE_WRITE) {
1398 set_dac_rate(s, val);
1399 if ((ret = prog_dmabuf_dac(s)))
1403 return put_user((file->f_mode & FMODE_READ) ?
1404 s->adcRate : s->dacRate, (int *)arg);
1406 case SNDCTL_DSP_STEREO:
1407 if (get_user(val, (int *)arg))
1409 if (file->f_mode & FMODE_READ) {
1415 if ((ret = prog_dmabuf_adc(s)))
1418 if (file->f_mode & FMODE_WRITE) {
1424 if ((ret = prog_dmabuf_dac(s)))
1429 case SNDCTL_DSP_CHANNELS:
1430 if (get_user(val, (int *)arg))
1433 if ( (val != 1) && (val != 2)) val = 2;
1435 if (file->f_mode & FMODE_READ) {
1437 s->dacChannels = val;
1438 if ((ret = prog_dmabuf_adc(s)))
1441 if (file->f_mode & FMODE_WRITE) {
1443 s->dacChannels = val;
1444 if ((ret = prog_dmabuf_dac(s)))
1448 return put_user(val, (int *)arg);
1450 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1451 return put_user(AFMT_S16_LE, (int *)arg);
1453 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1454 if (get_user(val, (int *)arg))
1456 if (val != AFMT_QUERY) {
1457 if (val != AFMT_S16_LE) return -EINVAL;
1458 if (file->f_mode & FMODE_READ) {
1460 if ((ret = prog_dmabuf_adc(s)))
1463 if (file->f_mode & FMODE_WRITE) {
1465 if ((ret = prog_dmabuf_dac(s)))
1471 return put_user(val, (int *)arg);
1473 case SNDCTL_DSP_POST:
1476 case SNDCTL_DSP_GETTRIGGER:
1477 case SNDCTL_DSP_SETTRIGGER:
1481 case SNDCTL_DSP_GETOSPACE:
1482 if (!(file->f_mode & FMODE_WRITE))
1484 abinfo.fragsize = s->dma_dac.fragSize << (s->dacChannels-1);
1485 spin_lock_irqsave(&s->lock, flags);
1486 count = s->dma_dac.count;
1487 spin_unlock_irqrestore(&s->lock, flags);
1488 abinfo.bytes = (s->dma_dac.fragTotalSize - count) <<
1490 abinfo.fragstotal = s->dma_dac.numFrag;
1491 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragShift >>
1493 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1495 case SNDCTL_DSP_GETISPACE:
1496 if (!(file->f_mode & FMODE_READ))
1498 abinfo.fragsize = s->dma_adc.fragSize << (s->adcChannels-1);
1499 spin_lock_irqsave(&s->lock, flags);
1500 count = s->dma_adc.count;
1501 spin_unlock_irqrestore(&s->lock, flags);
1504 abinfo.bytes = count << (s->adcChannels-1);
1505 abinfo.fragstotal = s->dma_adc.numFrag;
1506 abinfo.fragments = (abinfo.bytes >> s->dma_adc.fragShift) >>
1508 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1510 case SNDCTL_DSP_NONBLOCK:
1511 file->f_flags |= O_NONBLOCK;
1514 case SNDCTL_DSP_GETODELAY:
1515 if (!(file->f_mode & FMODE_WRITE))
1517 spin_lock_irqsave(&s->lock, flags);
1518 count = s->dma_dac.count;
1519 spin_unlock_irqrestore(&s->lock, flags);
1520 return put_user(count, (int *)arg);
1522 case SNDCTL_DSP_GETIPTR:
1523 case SNDCTL_DSP_GETOPTR:
1524 /* we cannot get DMA ptr */
1527 case SNDCTL_DSP_GETBLKSIZE:
1528 if (file->f_mode & FMODE_WRITE)
1529 return put_user(s->dma_dac.fragSize << (s->dacChannels-1), (int *)arg);
1531 return put_user(s->dma_adc.fragSize << (s->adcChannels-1), (int *)arg);
1533 case SNDCTL_DSP_SETFRAGMENT:
1534 /* we ignore fragment size request */
1537 case SNDCTL_DSP_SUBDIVIDE:
1538 /* what is this for? [jsun] */
1541 case SOUND_PCM_READ_RATE:
1542 return put_user((file->f_mode & FMODE_READ) ?
1543 s->adcRate : s->dacRate, (int *)arg);
1545 case SOUND_PCM_READ_CHANNELS:
1546 if (file->f_mode & FMODE_READ)
1547 return put_user(s->adcChannels, (int *)arg);
1549 return put_user(s->dacChannels ? 2 : 1, (int *)arg);
1551 case SOUND_PCM_READ_BITS:
1552 return put_user(16, (int *)arg);
1554 case SOUND_PCM_WRITE_FILTER:
1555 case SNDCTL_DSP_SETSYNCRO:
1556 case SOUND_PCM_READ_FILTER:
1560 return mixdev_ioctl(s->codec, cmd, arg);
1564 static int vrc5477_ac97_open(struct inode *inode, struct file *file)
1566 int minor = iminor(inode);
1567 DECLARE_WAITQUEUE(wait, current);
1568 unsigned long flags;
1569 struct list_head *list;
1570 struct vrc5477_ac97_state *s;
1573 nonseekable_open(inode, file);
1574 for (list = devs.next; ; list = list->next) {
1577 s = list_entry(list, struct vrc5477_ac97_state, devs);
1578 if (!((s->dev_audio ^ minor) & ~0xf))
1581 file->private_data = s;
1583 /* wait for device to become free */
1585 while (s->open_mode & file->f_mode) {
1587 if (file->f_flags & O_NONBLOCK) {
1591 add_wait_queue(&s->open_wait, &wait);
1592 __set_current_state(TASK_INTERRUPTIBLE);
1595 remove_wait_queue(&s->open_wait, &wait);
1596 set_current_state(TASK_RUNNING);
1597 if (signal_pending(current))
1598 return -ERESTARTSYS;
1602 spin_lock_irqsave(&s->lock, flags);
1604 if (file->f_mode & FMODE_READ) {
1605 /* set default settings */
1606 set_adc_rate(s, 48000);
1609 ret = prog_dmabuf_adc(s);
1610 if (ret) goto bailout;
1612 if (file->f_mode & FMODE_WRITE) {
1613 /* set default settings */
1614 set_dac_rate(s, 48000);
1617 ret = prog_dmabuf_dac(s);
1618 if (ret) goto bailout;
1621 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1624 spin_unlock_irqrestore(&s->lock, flags);
1630 static int vrc5477_ac97_release(struct inode *inode, struct file *file)
1632 struct vrc5477_ac97_state *s =
1633 (struct vrc5477_ac97_state *)file->private_data;
1636 if (file->f_mode & FMODE_WRITE)
1637 drain_dac(s, file->f_flags & O_NONBLOCK);
1639 if (file->f_mode & FMODE_WRITE) {
1641 dealloc_dmabuf(s, &s->dma_dac);
1643 if (file->f_mode & FMODE_READ) {
1645 dealloc_dmabuf(s, &s->dma_adc);
1647 s->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
1649 wake_up(&s->open_wait);
1654 static /*const*/ struct file_operations vrc5477_ac97_audio_fops = {
1655 .owner = THIS_MODULE,
1656 .llseek = no_llseek,
1657 .read = vrc5477_ac97_read,
1658 .write = vrc5477_ac97_write,
1659 .poll = vrc5477_ac97_poll,
1660 .ioctl = vrc5477_ac97_ioctl,
1661 // .mmap = vrc5477_ac97_mmap,
1662 .open = vrc5477_ac97_open,
1663 .release = vrc5477_ac97_release,
1667 /* --------------------------------------------------------------------- */
1670 /* --------------------------------------------------------------------- */
1673 * for debugging purposes, we'll create a proc device that dumps the
1677 #ifdef VRC5477_AC97_DEBUG
1680 const char *regname;
1682 } vrc5477_ac97_regs[] = {
1683 {"VRC5477_INT_STATUS", VRC5477_INT_STATUS},
1684 {"VRC5477_CODEC_WR", VRC5477_CODEC_WR},
1685 {"VRC5477_CODEC_RD", VRC5477_CODEC_RD},
1686 {"VRC5477_CTRL", VRC5477_CTRL},
1687 {"VRC5477_ACLINK_CTRL", VRC5477_ACLINK_CTRL},
1688 {"VRC5477_INT_MASK", VRC5477_INT_MASK},
1689 {"VRC5477_DAC1_CTRL", VRC5477_DAC1_CTRL},
1690 {"VRC5477_DAC1L", VRC5477_DAC1L},
1691 {"VRC5477_DAC1_BADDR", VRC5477_DAC1_BADDR},
1692 {"VRC5477_DAC2_CTRL", VRC5477_DAC2_CTRL},
1693 {"VRC5477_DAC2L", VRC5477_DAC2L},
1694 {"VRC5477_DAC2_BADDR", VRC5477_DAC2_BADDR},
1695 {"VRC5477_DAC3_CTRL", VRC5477_DAC3_CTRL},
1696 {"VRC5477_DAC3L", VRC5477_DAC3L},
1697 {"VRC5477_DAC3_BADDR", VRC5477_DAC3_BADDR},
1698 {"VRC5477_ADC1_CTRL", VRC5477_ADC1_CTRL},
1699 {"VRC5477_ADC1L", VRC5477_ADC1L},
1700 {"VRC5477_ADC1_BADDR", VRC5477_ADC1_BADDR},
1701 {"VRC5477_ADC2_CTRL", VRC5477_ADC2_CTRL},
1702 {"VRC5477_ADC2L", VRC5477_ADC2L},
1703 {"VRC5477_ADC2_BADDR", VRC5477_ADC2_BADDR},
1704 {"VRC5477_ADC3_CTRL", VRC5477_ADC3_CTRL},
1705 {"VRC5477_ADC3L", VRC5477_ADC3L},
1706 {"VRC5477_ADC3_BADDR", VRC5477_ADC3_BADDR},
1710 static int proc_vrc5477_ac97_dump (char *buf, char **start, off_t fpos,
1711 int length, int *eof, void *data)
1713 struct vrc5477_ac97_state *s;
1716 if (list_empty(&devs))
1718 s = list_entry(devs.next, struct vrc5477_ac97_state, devs);
1720 /* print out header */
1721 len += sprintf(buf + len, "\n\t\tVrc5477 Audio Debug\n\n");
1723 // print out digital controller state
1724 len += sprintf (buf + len, "NEC Vrc5477 Audio Controller registers\n");
1725 len += sprintf (buf + len, "---------------------------------\n");
1726 for (cnt=0; vrc5477_ac97_regs[cnt].regname != NULL; cnt++) {
1727 len+= sprintf (buf + len, "%-20s = %08x\n",
1728 vrc5477_ac97_regs[cnt].regname,
1729 inl(s->io + vrc5477_ac97_regs[cnt].regaddr));
1732 /* print out driver state */
1733 len += sprintf (buf + len, "NEC Vrc5477 Audio driver states\n");
1734 len += sprintf (buf + len, "---------------------------------\n");
1735 len += sprintf (buf + len, "dacChannels = %d\n", s->dacChannels);
1736 len += sprintf (buf + len, "adcChannels = %d\n", s->adcChannels);
1737 len += sprintf (buf + len, "dacRate = %d\n", s->dacRate);
1738 len += sprintf (buf + len, "adcRate = %d\n", s->adcRate);
1740 len += sprintf (buf + len, "dma_dac is %s ready\n",
1741 s->dma_dac.ready? "" : "not");
1742 if (s->dma_dac.ready) {
1743 len += sprintf (buf + len, "dma_dac is %s stopped.\n",
1744 s->dma_dac.stopped? "" : "not");
1745 len += sprintf (buf + len, "dma_dac.fragSize = %x\n",
1746 s->dma_dac.fragSize);
1747 len += sprintf (buf + len, "dma_dac.fragShift = %x\n",
1748 s->dma_dac.fragShift);
1749 len += sprintf (buf + len, "dma_dac.numFrag = %x\n",
1750 s->dma_dac.numFrag);
1751 len += sprintf (buf + len, "dma_dac.fragTotalSize = %x\n",
1752 s->dma_dac.fragTotalSize);
1753 len += sprintf (buf + len, "dma_dac.nextIn = %x\n",
1755 len += sprintf (buf + len, "dma_dac.nextOut = %x\n",
1756 s->dma_dac.nextOut);
1757 len += sprintf (buf + len, "dma_dac.count = %x\n",
1761 len += sprintf (buf + len, "dma_adc is %s ready\n",
1762 s->dma_adc.ready? "" : "not");
1763 if (s->dma_adc.ready) {
1764 len += sprintf (buf + len, "dma_adc is %s stopped.\n",
1765 s->dma_adc.stopped? "" : "not");
1766 len += sprintf (buf + len, "dma_adc.fragSize = %x\n",
1767 s->dma_adc.fragSize);
1768 len += sprintf (buf + len, "dma_adc.fragShift = %x\n",
1769 s->dma_adc.fragShift);
1770 len += sprintf (buf + len, "dma_adc.numFrag = %x\n",
1771 s->dma_adc.numFrag);
1772 len += sprintf (buf + len, "dma_adc.fragTotalSize = %x\n",
1773 s->dma_adc.fragTotalSize);
1774 len += sprintf (buf + len, "dma_adc.nextIn = %x\n",
1776 len += sprintf (buf + len, "dma_adc.nextOut = %x\n",
1777 s->dma_adc.nextOut);
1778 len += sprintf (buf + len, "dma_adc.count = %x\n",
1782 /* print out CODEC state */
1783 len += sprintf (buf + len, "\nAC97 CODEC registers\n");
1784 len += sprintf (buf + len, "----------------------\n");
1785 for (cnt=0; cnt <= 0x7e; cnt = cnt +2)
1786 len+= sprintf (buf + len, "reg %02x = %04x\n",
1787 cnt, rdcodec(s->codec, cnt));
1794 *start = buf + fpos;
1795 if ((len -= fpos) > length)
1801 #endif /* VRC5477_AC97_DEBUG */
1803 /* --------------------------------------------------------------------- */
1805 /* maximum number of devices; only used for command line params */
1808 static unsigned int devindex;
1810 MODULE_AUTHOR("Monta Vista Software, jsun@mvista.com or jsun@junsun.net");
1811 MODULE_DESCRIPTION("NEC Vrc5477 audio (AC97) Driver");
1812 MODULE_LICENSE("GPL");
1814 static int __devinit vrc5477_ac97_probe(struct pci_dev *pcidev,
1815 const struct pci_device_id *pciid)
1817 struct vrc5477_ac97_state *s;
1818 #ifdef VRC5477_AC97_DEBUG
1822 if (pcidev->irq == 0)
1825 if (!(s = kmalloc(sizeof(struct vrc5477_ac97_state), GFP_KERNEL))) {
1826 printk(KERN_ERR PFX "alloc of device struct failed\n");
1829 memset(s, 0, sizeof(struct vrc5477_ac97_state));
1831 init_waitqueue_head(&s->dma_adc.wait);
1832 init_waitqueue_head(&s->dma_dac.wait);
1833 init_waitqueue_head(&s->open_wait);
1834 init_MUTEX(&s->open_sem);
1835 spin_lock_init(&s->lock);
1838 s->io = pci_resource_start(pcidev, 0);
1839 s->irq = pcidev->irq;
1841 s->codec = ac97_alloc_codec();
1843 s->codec->private_data = s;
1845 s->codec->codec_read = rdcodec;
1846 s->codec->codec_write = wrcodec;
1847 s->codec->codec_wait = waitcodec;
1849 /* setting some other default values such as
1850 * adcChannels, adcRate is done in open() so that
1851 * no persistent state across file opens.
1854 /* test if get response from ac97, if not return */
1855 if (ac97_codec_not_present(s->codec)) {
1856 printk(KERN_ERR PFX "no ac97 codec\n");
1861 if (!request_region(s->io, pci_resource_len(pcidev,0),
1862 VRC5477_AC97_MODULE_NAME)) {
1863 printk(KERN_ERR PFX "io ports %#lx->%#lx in use\n",
1864 s->io, s->io + pci_resource_len(pcidev,0)-1);
1867 if (request_irq(s->irq, vrc5477_ac97_interrupt, SA_INTERRUPT,
1868 VRC5477_AC97_MODULE_NAME, s)) {
1869 printk(KERN_ERR PFX "irq %u in use\n", s->irq);
1873 printk(KERN_INFO PFX "IO at %#lx, IRQ %d\n", s->io, s->irq);
1875 /* register devices */
1876 if ((s->dev_audio = register_sound_dsp(&vrc5477_ac97_audio_fops, -1)) < 0)
1878 if ((s->codec->dev_mixer =
1879 register_sound_mixer(&vrc5477_ac97_mixer_fops, -1)) < 0)
1882 #ifdef VRC5477_AC97_DEBUG
1883 /* initialize the debug proc device */
1884 s->ps = create_proc_read_entry(VRC5477_AC97_MODULE_NAME, 0, NULL,
1885 proc_vrc5477_ac97_dump, NULL);
1886 #endif /* VRC5477_AC97_DEBUG */
1888 /* enable pci io and bus mastering */
1889 if (pci_enable_device(pcidev))
1891 pci_set_master(pcidev);
1893 /* cold reset the AC97 */
1894 outl(VRC5477_ACLINK_CTRL_RST_ON | VRC5477_ACLINK_CTRL_RST_TIME,
1895 s->io + VRC5477_ACLINK_CTRL);
1896 while (inl(s->io + VRC5477_ACLINK_CTRL) & VRC5477_ACLINK_CTRL_RST_ON);
1899 if (!ac97_probe_codec(s->codec))
1902 #ifdef VRC5477_AC97_DEBUG
1903 sprintf(proc_str, "driver/%s/%d/ac97",
1904 VRC5477_AC97_MODULE_NAME, s->codec->id);
1905 s->ac97_ps = create_proc_read_entry (proc_str, 0, NULL,
1906 ac97_read_proc, s->codec);
1907 /* TODO : why this proc file does not show up? */
1910 /* Try to enable variable rate audio mode. */
1911 wrcodec(s->codec, AC97_EXTENDED_STATUS,
1912 rdcodec(s->codec, AC97_EXTENDED_STATUS) | AC97_EXTSTAT_VRA);
1913 /* Did we enable it? */
1914 if(rdcodec(s->codec, AC97_EXTENDED_STATUS) & AC97_EXTSTAT_VRA)
1915 s->extended_status |= AC97_EXTSTAT_VRA;
1918 printk(KERN_INFO PFX "VRA mode not enabled; rate fixed at %d.",
1922 /* let us get the default volumne louder */
1923 wrcodec(s->codec, 0x2, 0x1010); /* master volume, middle */
1924 wrcodec(s->codec, 0xc, 0x10); /* phone volume, middle */
1925 // wrcodec(s->codec, 0xe, 0x10); /* misc volume, middle */
1926 wrcodec(s->codec, 0x10, 0x8000); /* line-in 2 line-out disable */
1927 wrcodec(s->codec, 0x18, 0x0707); /* PCM out (line out) middle */
1930 /* by default we select line in the input */
1931 wrcodec(s->codec, 0x1a, 0x0404);
1932 wrcodec(s->codec, 0x1c, 0x0f0f);
1933 wrcodec(s->codec, 0x1e, 0x07);
1935 /* enable the master interrupt but disable all others */
1936 outl(VRC5477_INT_MASK_NMASK, s->io + VRC5477_INT_MASK);
1938 /* store it in the driver field */
1939 pci_set_drvdata(pcidev, s);
1940 pcidev->dma_mask = 0xffffffff;
1941 /* put it into driver list */
1942 list_add_tail(&s->devs, &devs);
1943 /* increment devindex */
1944 if (devindex < NR_DEVICE-1)
1949 unregister_sound_mixer(s->codec->dev_mixer);
1951 unregister_sound_dsp(s->dev_audio);
1953 printk(KERN_ERR PFX "cannot register misc device\n");
1954 free_irq(s->irq, s);
1956 release_region(s->io, pci_resource_len(pcidev,0));
1958 ac97_release_codec(codec);
1963 static void __devexit vrc5477_ac97_remove(struct pci_dev *dev)
1965 struct vrc5477_ac97_state *s = pci_get_drvdata(dev);
1971 #ifdef VRC5477_AC97_DEBUG
1973 remove_proc_entry(VRC5477_AC97_MODULE_NAME, NULL);
1974 #endif /* VRC5477_AC97_DEBUG */
1976 synchronize_irq(s->irq);
1977 free_irq(s->irq, s);
1978 release_region(s->io, pci_resource_len(dev,0));
1979 unregister_sound_dsp(s->dev_audio);
1980 unregister_sound_mixer(s->codec->dev_mixer);
1981 ac97_release_codec(s->codec);
1983 pci_set_drvdata(dev, NULL);
1987 static struct pci_device_id id_table[] = {
1988 { PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_VRC5477_AC97,
1989 PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
1993 MODULE_DEVICE_TABLE(pci, id_table);
1995 static struct pci_driver vrc5477_ac97_driver = {
1996 .name = VRC5477_AC97_MODULE_NAME,
1997 .id_table = id_table,
1998 .probe = vrc5477_ac97_probe,
1999 .remove = __devexit_p(vrc5477_ac97_remove),
2002 static int __init init_vrc5477_ac97(void)
2004 printk("Vrc5477 AC97 driver: version v0.2 time " __TIME__ " " __DATE__ " by Jun Sun\n");
2005 return pci_module_init(&vrc5477_ac97_driver);
2008 static void __exit cleanup_vrc5477_ac97(void)
2010 printk(KERN_INFO PFX "unloading\n");
2011 pci_unregister_driver(&vrc5477_ac97_driver);
2014 module_init(init_vrc5477_ac97);
2015 module_exit(cleanup_vrc5477_ac97);