1 /*****************************************************************************/
4 * sonicvibes.c -- S3 Sonic Vibes audio driver.
6 * Copyright (C) 1998-2001, 2003 Thomas Sailer (t.sailer@alumni.ethz.ch)
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 * Special thanks to David C. Niemi
25 * Module command line parameters:
30 * /dev/dsp standard /dev/dsp device, (mostly) OSS compatible
31 * /dev/mixer standard /dev/mixer device, (mostly) OSS compatible
32 * /dev/midi simple MIDI UART interface, no ioctl
34 * The card has both an FM and a Wavetable synth, but I have to figure
35 * out first how to drive them...
38 * 06.05.1998 0.1 Initial release
39 * 10.05.1998 0.2 Fixed many bugs, esp. ADC rate calculation
40 * First stab at a simple midi interface (no bells&whistles)
41 * 13.05.1998 0.3 Fix stupid cut&paste error: set_adc_rate was called instead of
42 * set_dac_rate in the FMODE_WRITE case in sv_open
43 * Fix hwptr out of bounds (now mpg123 works)
44 * 14.05.1998 0.4 Don't allow excessive interrupt rates
45 * 08.06.1998 0.5 First release using Alan Cox' soundcore instead of miscdevice
46 * 03.08.1998 0.6 Do not include modversions.h
47 * Now mixer behaviour can basically be selected between
48 * "OSS documented" and "OSS actual" behaviour
49 * 31.08.1998 0.7 Fix realplayer problems - dac.count issues
50 * 10.12.1998 0.8 Fix drain_dac trying to wait on not yet initialized DMA
51 * 16.12.1998 0.9 Fix a few f_file & FMODE_ bugs
52 * 06.01.1999 0.10 remove the silly SA_INTERRUPT flag.
53 * hopefully killed the egcs section type conflict
54 * 12.03.1999 0.11 cinfo.blocks should be reset after GETxPTR ioctl.
55 * reported by Johan Maes <joma@telindus.be>
56 * 22.03.1999 0.12 return EAGAIN instead of EBUSY when O_NONBLOCK
57 * read/write cannot be executed
58 * 05.04.1999 0.13 added code to sv_read and sv_write which should detect
59 * lockups of the sound chip and revive it. This is basically
60 * an ugly hack, but at least applications using this driver
61 * won't hang forever. I don't know why these lockups happen,
62 * it might well be the motherboard chipset (an early 486 PCI
63 * board with ALI chipset), since every busmastering 100MB
64 * ethernet card I've tried (Realtek 8139 and Macronix tulip clone)
65 * exhibit similar behaviour (they work for a couple of packets
66 * and then lock up and can be revived by ifconfig down/up).
67 * 07.04.1999 0.14 implemented the following ioctl's: SOUND_PCM_READ_RATE,
68 * SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS;
69 * Alpha fixes reported by Peter Jones <pjones@redhat.com>
70 * Note: dmaio hack might still be wrong on archs other than i386
71 * 15.06.1999 0.15 Fix bad allocation bug.
72 * Thanks to Deti Fliegl <fliegl@in.tum.de>
73 * 28.06.1999 0.16 Add pci_set_master
74 * 03.08.1999 0.17 adapt to Linus' new __setup/__initcall
75 * added kernel command line options "sonicvibes=reverb" and "sonicvibesdmaio=dmaioaddr"
76 * 12.08.1999 0.18 module_init/__setup fixes
77 * 24.08.1999 0.19 get rid of the dmaio kludge, replace with allocate_resource
78 * 31.08.1999 0.20 add spin_lock_init
79 * use new resource allocation to allocate DDMA IO space
80 * replaced current->state = x with set_current_state(x)
81 * 03.09.1999 0.21 change read semantics for MIDI to match
82 * OSS more closely; remove possible wakeup race
83 * 28.10.1999 0.22 More waitqueue races fixed
84 * 01.12.1999 0.23 New argument to allocate_resource
85 * 07.12.1999 0.24 More allocate_resource semantics change
86 * 08.01.2000 0.25 Prevent some ioctl's from returning bad count values on underrun/overrun;
87 * Tim Janik's BSE (Bedevilled Sound Engine) found this
88 * use Martin Mares' pci_assign_resource
89 * 07.02.2000 0.26 Use pci_alloc_consistent and pci_register_driver
90 * 21.11.2000 0.27 Initialize dma buffers in poll, otherwise poll may return a bogus mask
91 * 12.12.2000 0.28 More dma buffer initializations, patch from
92 * Tjeerd Mulder <tjeerd.mulder@fujitsu-siemens.com>
93 * 31.01.2001 0.29 Register/Unregister gameport
94 * Fix SETTRIGGER non OSS API conformity
95 * 18.05.2001 0.30 PCI probing and error values cleaned up by Marcus
96 * Meissner <mm@caldera.de>
97 * 03.01.2003 0.31 open_mode fixes from Georg Acher <acher@in.tum.de>
101 /*****************************************************************************/
103 #include <linux/module.h>
104 #include <linux/string.h>
105 #include <linux/ioport.h>
106 #include <linux/interrupt.h>
107 #include <linux/wait.h>
108 #include <linux/mm.h>
109 #include <linux/delay.h>
110 #include <linux/sound.h>
111 #include <linux/slab.h>
112 #include <linux/soundcard.h>
113 #include <linux/pci.h>
114 #include <linux/init.h>
115 #include <linux/poll.h>
116 #include <linux/spinlock.h>
117 #include <linux/smp_lock.h>
118 #include <linux/gameport.h>
121 #include <asm/uaccess.h>
126 /* --------------------------------------------------------------------- */
128 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
130 /* --------------------------------------------------------------------- */
132 #ifndef PCI_VENDOR_ID_S3
133 #define PCI_VENDOR_ID_S3 0x5333
135 #ifndef PCI_DEVICE_ID_S3_SONICVIBES
136 #define PCI_DEVICE_ID_S3_SONICVIBES 0xca00
139 #define SV_MAGIC ((PCI_VENDOR_ID_S3<<16)|PCI_DEVICE_ID_S3_SONICVIBES)
141 #define SV_EXTENT_SB 0x10
142 #define SV_EXTENT_ENH 0x10
143 #define SV_EXTENT_SYNTH 0x4
144 #define SV_EXTENT_MIDI 0x4
145 #define SV_EXTENT_GAME 0x8
146 #define SV_EXTENT_DMA 0x10
149 * we are not a bridge and thus use a resource for DDMA that is used for bridges but
150 * left empty for normal devices
152 #define RESOURCE_SB 0
153 #define RESOURCE_ENH 1
154 #define RESOURCE_SYNTH 2
155 #define RESOURCE_MIDI 3
156 #define RESOURCE_GAME 4
157 #define RESOURCE_DDMA 7
159 #define SV_MIDI_DATA 0
160 #define SV_MIDI_COMMAND 1
161 #define SV_MIDI_STATUS 1
163 #define SV_DMA_ADDR0 0
164 #define SV_DMA_ADDR1 1
165 #define SV_DMA_ADDR2 2
166 #define SV_DMA_ADDR3 3
167 #define SV_DMA_COUNT0 4
168 #define SV_DMA_COUNT1 5
169 #define SV_DMA_COUNT2 6
170 #define SV_DMA_MODE 0xb
171 #define SV_DMA_RESET 0xd
172 #define SV_DMA_MASK 0xf
175 * DONT reset the DMA controllers unless you understand
176 * the reset semantics. Assuming reset semantics as in
177 * the 8237 does not work.
180 #define DMA_MODE_AUTOINIT 0x10
181 #define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
182 #define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
184 #define SV_CODEC_CONTROL 0
185 #define SV_CODEC_INTMASK 1
186 #define SV_CODEC_STATUS 2
187 #define SV_CODEC_IADDR 4
188 #define SV_CODEC_IDATA 5
190 #define SV_CCTRL_RESET 0x80
191 #define SV_CCTRL_INTADRIVE 0x20
192 #define SV_CCTRL_WAVETABLE 0x08
193 #define SV_CCTRL_REVERB 0x04
194 #define SV_CCTRL_ENHANCED 0x01
196 #define SV_CINTMASK_DMAA 0x01
197 #define SV_CINTMASK_DMAC 0x04
198 #define SV_CINTMASK_SPECIAL 0x08
199 #define SV_CINTMASK_UPDOWN 0x40
200 #define SV_CINTMASK_MIDI 0x80
202 #define SV_CSTAT_DMAA 0x01
203 #define SV_CSTAT_DMAC 0x04
204 #define SV_CSTAT_SPECIAL 0x08
205 #define SV_CSTAT_UPDOWN 0x40
206 #define SV_CSTAT_MIDI 0x80
208 #define SV_CIADDR_TRD 0x80
209 #define SV_CIADDR_MCE 0x40
211 /* codec indirect registers */
212 #define SV_CIMIX_ADCINL 0x00
213 #define SV_CIMIX_ADCINR 0x01
214 #define SV_CIMIX_AUX1INL 0x02
215 #define SV_CIMIX_AUX1INR 0x03
216 #define SV_CIMIX_CDINL 0x04
217 #define SV_CIMIX_CDINR 0x05
218 #define SV_CIMIX_LINEINL 0x06
219 #define SV_CIMIX_LINEINR 0x07
220 #define SV_CIMIX_MICIN 0x08
221 #define SV_CIMIX_SYNTHINL 0x0A
222 #define SV_CIMIX_SYNTHINR 0x0B
223 #define SV_CIMIX_AUX2INL 0x0C
224 #define SV_CIMIX_AUX2INR 0x0D
225 #define SV_CIMIX_ANALOGINL 0x0E
226 #define SV_CIMIX_ANALOGINR 0x0F
227 #define SV_CIMIX_PCMINL 0x10
228 #define SV_CIMIX_PCMINR 0x11
230 #define SV_CIGAMECONTROL 0x09
231 #define SV_CIDATAFMT 0x12
232 #define SV_CIENABLE 0x13
233 #define SV_CIUPDOWN 0x14
234 #define SV_CIREVISION 0x15
235 #define SV_CIADCOUTPUT 0x16
236 #define SV_CIDMAABASECOUNT1 0x18
237 #define SV_CIDMAABASECOUNT0 0x19
238 #define SV_CIDMACBASECOUNT1 0x1c
239 #define SV_CIDMACBASECOUNT0 0x1d
240 #define SV_CIPCMSR0 0x1e
241 #define SV_CIPCMSR1 0x1f
242 #define SV_CISYNTHSR0 0x20
243 #define SV_CISYNTHSR1 0x21
244 #define SV_CIADCCLKSOURCE 0x22
245 #define SV_CIADCALTSR 0x23
246 #define SV_CIADCPLLM 0x24
247 #define SV_CIADCPLLN 0x25
248 #define SV_CISYNTHPLLM 0x26
249 #define SV_CISYNTHPLLN 0x27
250 #define SV_CIUARTCONTROL 0x2a
251 #define SV_CIDRIVECONTROL 0x2b
252 #define SV_CISRSSPACE 0x2c
253 #define SV_CISRSCENTER 0x2d
254 #define SV_CIWAVETABLESRC 0x2e
255 #define SV_CIANALOGPWRDOWN 0x30
256 #define SV_CIDIGITALPWRDOWN 0x31
259 #define SV_CIMIX_ADCSRC_CD 0x20
260 #define SV_CIMIX_ADCSRC_DAC 0x40
261 #define SV_CIMIX_ADCSRC_AUX2 0x60
262 #define SV_CIMIX_ADCSRC_LINE 0x80
263 #define SV_CIMIX_ADCSRC_AUX1 0xa0
264 #define SV_CIMIX_ADCSRC_MIC 0xc0
265 #define SV_CIMIX_ADCSRC_MIXOUT 0xe0
266 #define SV_CIMIX_ADCSRC_MASK 0xe0
268 #define SV_CFMT_STEREO 0x01
269 #define SV_CFMT_16BIT 0x02
270 #define SV_CFMT_MASK 0x03
271 #define SV_CFMT_ASHIFT 0
272 #define SV_CFMT_CSHIFT 4
274 static const unsigned sample_size[] = { 1, 2, 2, 4 };
275 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
277 #define SV_CENABLE_PPE 0x4
278 #define SV_CENABLE_RE 0x2
279 #define SV_CENABLE_PE 0x1
282 /* MIDI buffer sizes */
284 #define MIDIINBUF 256
285 #define MIDIOUTBUF 256
287 #define FMODE_MIDI_SHIFT 2
288 #define FMODE_MIDI_READ (FMODE_READ << FMODE_MIDI_SHIFT)
289 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
291 #define FMODE_DMFM 0x10
293 /* --------------------------------------------------------------------- */
299 /* list of sonicvibes devices */
300 struct list_head devs;
302 /* the corresponding pci_dev structure */
305 /* soundcore stuff */
311 /* hardware resources */
312 unsigned long iosb, ioenh, iosynth, iomidi; /* long for SPARC */
313 unsigned int iodmaa, iodmac, irq;
318 #ifndef OSS_DOCUMENTED_MIXER_SEMANTICS
319 unsigned short vol[13];
320 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
324 unsigned int rateadc, ratedac;
325 unsigned char fmt, enable;
328 struct semaphore open_sem;
330 wait_queue_head_t open_wait;
338 unsigned hwptr, swptr;
339 unsigned total_bytes;
341 unsigned error; /* over/underrun */
342 wait_queue_head_t wait;
343 /* redundant, but makes calculations easier */
346 unsigned fragsamples;
350 unsigned endcleared:1;
352 unsigned ossfragshift;
354 unsigned subdivision;
359 unsigned ird, iwr, icnt;
360 unsigned ord, owr, ocnt;
361 wait_queue_head_t iwait;
362 wait_queue_head_t owait;
363 struct timer_list timer;
364 unsigned char ibuf[MIDIINBUF];
365 unsigned char obuf[MIDIOUTBUF];
368 struct gameport gameport;
371 /* --------------------------------------------------------------------- */
373 static LIST_HEAD(devs);
374 static unsigned long wavetable_mem;
376 /* --------------------------------------------------------------------- */
378 static inline unsigned ld2(unsigned int x)
404 * hweightN: returns the hamming weight (i.e. the number
405 * of bits set) of a N-bit word
412 static inline unsigned int hweight32(unsigned int w)
414 unsigned int res = (w & 0x55555555) + ((w >> 1) & 0x55555555);
415 res = (res & 0x33333333) + ((res >> 2) & 0x33333333);
416 res = (res & 0x0F0F0F0F) + ((res >> 4) & 0x0F0F0F0F);
417 res = (res & 0x00FF00FF) + ((res >> 8) & 0x00FF00FF);
418 return (res & 0x0000FFFF) + ((res >> 16) & 0x0000FFFF);
421 /* --------------------------------------------------------------------- */
424 * Why use byte IO? Nobody knows, but S3 does it also in their Windows driver.
429 static void set_dmaa(struct sv_state *s, unsigned int addr, unsigned int count)
432 unsigned io = s->iodmaa, u;
435 for (u = 4; u > 0; u--, addr >>= 8, io++)
436 outb(addr & 0xff, io);
437 for (u = 3; u > 0; u--, count >>= 8, io++)
438 outb(count & 0xff, io);
439 #else /* DMABYTEIO */
441 outl(addr, s->iodmaa + SV_DMA_ADDR0);
442 outl(count, s->iodmaa + SV_DMA_COUNT0);
443 #endif /* DMABYTEIO */
444 outb(0x18, s->iodmaa + SV_DMA_MODE);
447 static void set_dmac(struct sv_state *s, unsigned int addr, unsigned int count)
450 unsigned io = s->iodmac, u;
454 for (u = 4; u > 0; u--, addr >>= 8, io++)
455 outb(addr & 0xff, io);
456 for (u = 3; u > 0; u--, count >>= 8, io++)
457 outb(count & 0xff, io);
458 #else /* DMABYTEIO */
461 outl(addr, s->iodmac + SV_DMA_ADDR0);
462 outl(count, s->iodmac + SV_DMA_COUNT0);
463 #endif /* DMABYTEIO */
464 outb(0x14, s->iodmac + SV_DMA_MODE);
467 static inline unsigned get_dmaa(struct sv_state *s)
470 unsigned io = s->iodmaa+6, v = 0, u;
472 for (u = 3; u > 0; u--, io--) {
477 #else /* DMABYTEIO */
478 return (inl(s->iodmaa + SV_DMA_COUNT0) & 0xffffff) + 1;
479 #endif /* DMABYTEIO */
482 static inline unsigned get_dmac(struct sv_state *s)
485 unsigned io = s->iodmac+6, v = 0, u;
487 for (u = 3; u > 0; u--, io--) {
492 #else /* DMABYTEIO */
493 return ((inl(s->iodmac + SV_DMA_COUNT0) & 0xffffff) + 1) << 1;
494 #endif /* DMABYTEIO */
497 static void wrindir(struct sv_state *s, unsigned char idx, unsigned char data)
499 outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
501 outb(data, s->ioenh + SV_CODEC_IDATA);
505 static unsigned char rdindir(struct sv_state *s, unsigned char idx)
509 outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
511 v = inb(s->ioenh + SV_CODEC_IDATA);
516 static void set_fmt(struct sv_state *s, unsigned char mask, unsigned char data)
520 spin_lock_irqsave(&s->lock, flags);
521 outb(SV_CIDATAFMT | SV_CIADDR_MCE, s->ioenh + SV_CODEC_IADDR);
523 s->fmt = inb(s->ioenh + SV_CODEC_IDATA);
526 s->fmt = (s->fmt & mask) | data;
527 outb(s->fmt, s->ioenh + SV_CODEC_IDATA);
529 outb(0, s->ioenh + SV_CODEC_IADDR);
530 spin_unlock_irqrestore(&s->lock, flags);
534 static void frobindir(struct sv_state *s, unsigned char idx, unsigned char mask, unsigned char data)
536 outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
538 outb((inb(s->ioenh + SV_CODEC_IDATA) & mask) ^ data, s->ioenh + SV_CODEC_IDATA);
542 #define REFFREQUENCY 24576000
544 #define FULLRATE 48000
546 static unsigned setpll(struct sv_state *s, unsigned char reg, unsigned rate)
549 unsigned char r, m=0, n=0;
550 unsigned xm, xn, xr, xd, metric = ~0U;
551 /* the warnings about m and n used uninitialized are bogus and may safely be ignored */
553 if (rate < 625000/ADCMULT)
554 rate = 625000/ADCMULT;
555 if (rate > 150000000/ADCMULT)
556 rate = 150000000/ADCMULT;
557 /* slight violation of specs, needed for continuous sampling rates */
558 for (r = 0; rate < 75000000/ADCMULT; r += 0x20, rate <<= 1);
559 for (xn = 3; xn < 35; xn++)
560 for (xm = 3; xm < 130; xm++) {
561 xr = REFFREQUENCY/ADCMULT * xm / xn;
562 xd = abs((signed)(xr - rate));
570 spin_lock_irqsave(&s->lock, flags);
571 outb(reg, s->ioenh + SV_CODEC_IADDR);
573 outb(m, s->ioenh + SV_CODEC_IDATA);
575 outb(reg+1, s->ioenh + SV_CODEC_IADDR);
577 outb(r | n, s->ioenh + SV_CODEC_IDATA);
578 spin_unlock_irqrestore(&s->lock, flags);
580 return (REFFREQUENCY/ADCMULT * (m + 2) / (n + 2)) >> ((r >> 5) & 7);
585 static unsigned getpll(struct sv_state *s, unsigned char reg)
591 spin_lock_irqsave(&s->lock, flags);
592 outb(reg, s->ioenh + SV_CODEC_IADDR);
594 m = inb(s->ioenh + SV_CODEC_IDATA);
596 outb(reg+1, s->ioenh + SV_CODEC_IADDR);
598 n = inb(s->ioenh + SV_CODEC_IDATA);
599 spin_unlock_irqrestore(&s->lock, flags);
601 return (REFFREQUENCY/ADCMULT * (m + 2) / ((n & 0x1f) + 2)) >> ((n >> 5) & 7);
606 static void set_dac_rate(struct sv_state *s, unsigned rate)
615 div = (rate * 65536 + FULLRATE/2) / FULLRATE;
618 spin_lock_irqsave(&s->lock, flags);
619 wrindir(s, SV_CIPCMSR1, div >> 8);
620 wrindir(s, SV_CIPCMSR0, div);
621 spin_unlock_irqrestore(&s->lock, flags);
622 s->ratedac = (div * FULLRATE + 32768) / 65536;
625 static void set_adc_rate(struct sv_state *s, unsigned rate)
628 unsigned rate1, rate2, div;
634 rate1 = setpll(s, SV_CIADCPLLM, rate);
635 div = (48000 + rate/2) / rate;
638 rate2 = (48000 + div/2) / div;
639 spin_lock_irqsave(&s->lock, flags);
640 wrindir(s, SV_CIADCALTSR, (div-1) << 4);
641 if (abs((signed)(rate-rate2)) <= abs((signed)(rate-rate1))) {
642 wrindir(s, SV_CIADCCLKSOURCE, 0x10);
645 wrindir(s, SV_CIADCCLKSOURCE, 0x00);
648 spin_unlock_irqrestore(&s->lock, flags);
651 /* --------------------------------------------------------------------- */
653 static inline void stop_adc(struct sv_state *s)
657 spin_lock_irqsave(&s->lock, flags);
658 s->enable &= ~SV_CENABLE_RE;
659 wrindir(s, SV_CIENABLE, s->enable);
660 spin_unlock_irqrestore(&s->lock, flags);
663 static inline void stop_dac(struct sv_state *s)
667 spin_lock_irqsave(&s->lock, flags);
668 s->enable &= ~(SV_CENABLE_PPE | SV_CENABLE_PE);
669 wrindir(s, SV_CIENABLE, s->enable);
670 spin_unlock_irqrestore(&s->lock, flags);
673 static void start_dac(struct sv_state *s)
677 spin_lock_irqsave(&s->lock, flags);
678 if ((s->dma_dac.mapped || s->dma_dac.count > 0) && s->dma_dac.ready) {
679 s->enable = (s->enable & ~SV_CENABLE_PPE) | SV_CENABLE_PE;
680 wrindir(s, SV_CIENABLE, s->enable);
682 spin_unlock_irqrestore(&s->lock, flags);
685 static void start_adc(struct sv_state *s)
689 spin_lock_irqsave(&s->lock, flags);
690 if ((s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
691 && s->dma_adc.ready) {
692 s->enable |= SV_CENABLE_RE;
693 wrindir(s, SV_CIENABLE, s->enable);
695 spin_unlock_irqrestore(&s->lock, flags);
698 /* --------------------------------------------------------------------- */
700 #define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
701 #define DMABUF_MINORDER 1
703 static void dealloc_dmabuf(struct sv_state *s, struct dmabuf *db)
705 struct page *page, *pend;
708 /* undo marking the pages as reserved */
709 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
710 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
711 ClearPageReserved(page);
712 pci_free_consistent(s->dev, PAGE_SIZE << db->buforder, db->rawbuf, db->dmaaddr);
715 db->mapped = db->ready = 0;
719 /* DMAA is used for playback, DMAC is used for recording */
721 static int prog_dmabuf(struct sv_state *s, unsigned rec)
723 struct dmabuf *db = rec ? &s->dma_adc : &s->dma_dac;
724 unsigned rate = rec ? s->rateadc : s->ratedac;
728 struct page *page, *pend;
732 spin_lock_irqsave(&s->lock, flags);
735 s->enable &= ~SV_CENABLE_RE;
736 fmt >>= SV_CFMT_CSHIFT;
738 s->enable &= ~SV_CENABLE_PE;
739 fmt >>= SV_CFMT_ASHIFT;
741 wrindir(s, SV_CIENABLE, s->enable);
742 spin_unlock_irqrestore(&s->lock, flags);
744 db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
746 db->ready = db->mapped = 0;
747 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
748 if ((db->rawbuf = pci_alloc_consistent(s->dev, PAGE_SIZE << order, &db->dmaaddr)))
752 db->buforder = order;
753 if ((virt_to_bus(db->rawbuf) ^ (virt_to_bus(db->rawbuf) + (PAGE_SIZE << db->buforder) - 1)) & ~0xffff)
754 printk(KERN_DEBUG "sv: DMA buffer crosses 64k boundary: busaddr 0x%lx size %ld\n",
755 virt_to_bus(db->rawbuf), PAGE_SIZE << db->buforder);
756 if ((virt_to_bus(db->rawbuf) + (PAGE_SIZE << db->buforder) - 1) & ~0xffffff)
757 printk(KERN_DEBUG "sv: DMA buffer beyond 16MB: busaddr 0x%lx size %ld\n",
758 virt_to_bus(db->rawbuf), PAGE_SIZE << db->buforder);
759 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
760 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
761 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
762 SetPageReserved(page);
764 bytepersec = rate << sample_shift[fmt];
765 bufs = PAGE_SIZE << db->buforder;
766 if (db->ossfragshift) {
767 if ((1000 << db->ossfragshift) < bytepersec)
768 db->fragshift = ld2(bytepersec/1000);
770 db->fragshift = db->ossfragshift;
772 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
773 if (db->fragshift < 3)
776 db->numfrag = bufs >> db->fragshift;
777 while (db->numfrag < 4 && db->fragshift > 3) {
779 db->numfrag = bufs >> db->fragshift;
781 db->fragsize = 1 << db->fragshift;
782 if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
783 db->numfrag = db->ossmaxfrags;
784 db->fragsamples = db->fragsize >> sample_shift[fmt];
785 db->dmasize = db->numfrag << db->fragshift;
786 memset(db->rawbuf, (fmt & SV_CFMT_16BIT) ? 0 : 0x80, db->dmasize);
787 spin_lock_irqsave(&s->lock, flags);
789 set_dmac(s, db->dmaaddr, db->numfrag << db->fragshift);
790 /* program enhanced mode registers */
791 wrindir(s, SV_CIDMACBASECOUNT1, (db->fragsamples-1) >> 8);
792 wrindir(s, SV_CIDMACBASECOUNT0, db->fragsamples-1);
794 set_dmaa(s, db->dmaaddr, db->numfrag << db->fragshift);
795 /* program enhanced mode registers */
796 wrindir(s, SV_CIDMAABASECOUNT1, (db->fragsamples-1) >> 8);
797 wrindir(s, SV_CIDMAABASECOUNT0, db->fragsamples-1);
799 spin_unlock_irqrestore(&s->lock, flags);
805 static inline void clear_advance(struct sv_state *s)
807 unsigned char c = (s->fmt & (SV_CFMT_16BIT << SV_CFMT_ASHIFT)) ? 0 : 0x80;
808 unsigned char *buf = s->dma_dac.rawbuf;
809 unsigned bsize = s->dma_dac.dmasize;
810 unsigned bptr = s->dma_dac.swptr;
811 unsigned len = s->dma_dac.fragsize;
813 if (bptr + len > bsize) {
814 unsigned x = bsize - bptr;
815 memset(buf + bptr, c, x);
819 memset(buf + bptr, c, len);
822 /* call with spinlock held! */
823 static void sv_update_ptr(struct sv_state *s)
828 /* update ADC pointer */
829 if (s->dma_adc.ready) {
830 hwptr = (s->dma_adc.dmasize - get_dmac(s)) % s->dma_adc.dmasize;
831 diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
832 s->dma_adc.hwptr = hwptr;
833 s->dma_adc.total_bytes += diff;
834 s->dma_adc.count += diff;
835 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
836 wake_up(&s->dma_adc.wait);
837 if (!s->dma_adc.mapped) {
838 if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
839 s->enable &= ~SV_CENABLE_RE;
840 wrindir(s, SV_CIENABLE, s->enable);
845 /* update DAC pointer */
846 if (s->dma_dac.ready) {
847 hwptr = (s->dma_dac.dmasize - get_dmaa(s)) % s->dma_dac.dmasize;
848 diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
849 s->dma_dac.hwptr = hwptr;
850 s->dma_dac.total_bytes += diff;
851 if (s->dma_dac.mapped) {
852 s->dma_dac.count += diff;
853 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
854 wake_up(&s->dma_dac.wait);
856 s->dma_dac.count -= diff;
857 if (s->dma_dac.count <= 0) {
858 s->enable &= ~SV_CENABLE_PE;
859 wrindir(s, SV_CIENABLE, s->enable);
861 } else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
863 s->dma_dac.endcleared = 1;
865 if (s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize)
866 wake_up(&s->dma_dac.wait);
871 /* hold spinlock for the following! */
872 static void sv_handle_midi(struct sv_state *s)
878 while (!(inb(s->iomidi+1) & 0x80)) {
880 if (s->midi.icnt < MIDIINBUF) {
881 s->midi.ibuf[s->midi.iwr] = ch;
882 s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
888 wake_up(&s->midi.iwait);
890 while (!(inb(s->iomidi+1) & 0x40) && s->midi.ocnt > 0) {
891 outb(s->midi.obuf[s->midi.ord], s->iomidi);
892 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
894 if (s->midi.ocnt < MIDIOUTBUF-16)
898 wake_up(&s->midi.owait);
901 static irqreturn_t sv_interrupt(int irq, void *dev_id, struct pt_regs *regs)
903 struct sv_state *s = (struct sv_state *)dev_id;
906 /* fastpath out, to ease interrupt sharing */
907 intsrc = inb(s->ioenh + SV_CODEC_STATUS);
908 if (!(intsrc & (SV_CSTAT_DMAA | SV_CSTAT_DMAC | SV_CSTAT_MIDI)))
913 spin_unlock(&s->lock);
917 static void sv_midi_timer(unsigned long data)
919 struct sv_state *s = (struct sv_state *)data;
922 spin_lock_irqsave(&s->lock, flags);
924 spin_unlock_irqrestore(&s->lock, flags);
925 s->midi.timer.expires = jiffies+1;
926 add_timer(&s->midi.timer);
929 /* --------------------------------------------------------------------- */
931 static const char invalid_magic[] = KERN_CRIT "sv: invalid magic value\n";
933 #define VALIDATE_STATE(s) \
935 if (!(s) || (s)->magic != SV_MAGIC) { \
936 printk(invalid_magic); \
941 /* --------------------------------------------------------------------- */
945 #define MT_4MUTEMONO 3
948 static const struct {
953 } mixtable[SOUND_MIXER_NRDEVICES] = {
954 [SOUND_MIXER_RECLEV] = { SV_CIMIX_ADCINL, SV_CIMIX_ADCINR, MT_4, 0 },
955 [SOUND_MIXER_LINE1] = { SV_CIMIX_AUX1INL, SV_CIMIX_AUX1INR, MT_5MUTE, 5 },
956 [SOUND_MIXER_CD] = { SV_CIMIX_CDINL, SV_CIMIX_CDINR, MT_5MUTE, 1 },
957 [SOUND_MIXER_LINE] = { SV_CIMIX_LINEINL, SV_CIMIX_LINEINR, MT_5MUTE, 4 },
958 [SOUND_MIXER_MIC] = { SV_CIMIX_MICIN, SV_CIMIX_ADCINL, MT_4MUTEMONO, 6 },
959 [SOUND_MIXER_SYNTH] = { SV_CIMIX_SYNTHINL, SV_CIMIX_SYNTHINR, MT_5MUTE, 2 },
960 [SOUND_MIXER_LINE2] = { SV_CIMIX_AUX2INL, SV_CIMIX_AUX2INR, MT_5MUTE, 3 },
961 [SOUND_MIXER_VOLUME] = { SV_CIMIX_ANALOGINL, SV_CIMIX_ANALOGINR, MT_5MUTE, 7 },
962 [SOUND_MIXER_PCM] = { SV_CIMIX_PCMINL, SV_CIMIX_PCMINR, MT_6MUTE, 0 }
965 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
967 static int return_mixval(struct sv_state *s, unsigned i, int *arg)
970 unsigned char l, r, rl, rr;
972 spin_lock_irqsave(&s->lock, flags);
973 l = rdindir(s, mixtable[i].left);
974 r = rdindir(s, mixtable[i].right);
975 spin_unlock_irqrestore(&s->lock, flags);
976 switch (mixtable[i].type) {
980 rl = 10 + 6 * (l & 15);
981 rr = 10 + 6 * (r & 15);
985 rl = 55 - 3 * (l & 15);
994 rl = 100 - 3 * (l & 31);
995 rr = 100 - 3 * (r & 31);
999 rl = 100 - 3 * (l & 63) / 2;
1000 rr = 100 - 3 * (r & 63) / 2;
1007 return put_user((rr << 8) | rl, arg);
1010 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1012 static const unsigned char volidx[SOUND_MIXER_NRDEVICES] =
1014 [SOUND_MIXER_RECLEV] = 1,
1015 [SOUND_MIXER_LINE1] = 2,
1016 [SOUND_MIXER_CD] = 3,
1017 [SOUND_MIXER_LINE] = 4,
1018 [SOUND_MIXER_MIC] = 5,
1019 [SOUND_MIXER_SYNTH] = 6,
1020 [SOUND_MIXER_LINE2] = 7,
1021 [SOUND_MIXER_VOLUME] = 8,
1022 [SOUND_MIXER_PCM] = 9
1025 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1027 static unsigned mixer_recmask(struct sv_state *s)
1029 unsigned long flags;
1032 spin_lock_irqsave(&s->lock, flags);
1033 j = rdindir(s, SV_CIMIX_ADCINL) >> 5;
1034 spin_unlock_irqrestore(&s->lock, flags);
1036 for (i = 0; i < SOUND_MIXER_NRDEVICES && mixtable[i].rec != j; i++);
1040 static int mixer_ioctl(struct sv_state *s, unsigned int cmd, unsigned long arg)
1042 unsigned long flags;
1044 unsigned char l, r, rl, rr;
1045 int __user *p = (int __user *)arg;
1048 if (cmd == SOUND_MIXER_INFO) {
1050 memset(&info, 0, sizeof(info));
1051 strlcpy(info.id, "SonicVibes", sizeof(info.id));
1052 strlcpy(info.name, "S3 SonicVibes", sizeof(info.name));
1053 info.modify_counter = s->mix.modcnt;
1054 if (copy_to_user((void __user *)arg, &info, sizeof(info)))
1058 if (cmd == SOUND_OLD_MIXER_INFO) {
1059 _old_mixer_info info;
1060 memset(&info, 0, sizeof(info));
1061 strlcpy(info.id, "SonicVibes", sizeof(info.id));
1062 strlcpy(info.name, "S3 SonicVibes", sizeof(info.name));
1063 if (copy_to_user((void __user *)arg, &info, sizeof(info)))
1067 if (cmd == OSS_GETVERSION)
1068 return put_user(SOUND_VERSION, p);
1069 if (cmd == SOUND_MIXER_PRIVATE1) { /* SRS settings */
1070 if (get_user(val, p))
1072 spin_lock_irqsave(&s->lock, flags);
1075 l = 4 - ((val >> 2) & 7);
1078 r = 4 - ((val >> 5) & 7);
1081 wrindir(s, SV_CISRSSPACE, l);
1082 wrindir(s, SV_CISRSCENTER, r);
1084 wrindir(s, SV_CISRSSPACE, 0x80);
1086 l = rdindir(s, SV_CISRSSPACE);
1087 r = rdindir(s, SV_CISRSCENTER);
1088 spin_unlock_irqrestore(&s->lock, flags);
1090 return put_user(0, p);
1091 return put_user(((4 - (l & 7)) << 2) | ((4 - (r & 7)) << 5) | 2, p);
1093 if (_IOC_TYPE(cmd) != 'M' || _SIOC_SIZE(cmd) != sizeof(int))
1095 if (_SIOC_DIR(cmd) == _SIOC_READ) {
1096 switch (_IOC_NR(cmd)) {
1097 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1098 return put_user(mixer_recmask(s), p);
1100 case SOUND_MIXER_DEVMASK: /* Arg contains a bit for each supported device */
1101 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1102 if (mixtable[i].type)
1104 return put_user(val, p);
1106 case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
1107 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1108 if (mixtable[i].rec)
1110 return put_user(val, p);
1112 case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
1113 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1114 if (mixtable[i].type && mixtable[i].type != MT_4MUTEMONO)
1116 return put_user(val, p);
1118 case SOUND_MIXER_CAPS:
1119 return put_user(SOUND_CAP_EXCL_INPUT, p);
1123 if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
1125 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1126 return return_mixval(s, i, p);
1127 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1130 return put_user(s->mix.vol[volidx[i]-1], p);
1131 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1134 if (_SIOC_DIR(cmd) != (_SIOC_READ|_SIOC_WRITE))
1137 switch (_IOC_NR(cmd)) {
1138 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1139 if (get_user(val, p))
1143 return 0; /*val = mixer_recmask(s);*/
1145 val &= ~mixer_recmask(s);
1146 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
1147 if (!(val & (1 << i)))
1149 if (mixtable[i].rec)
1152 if (!mixtable[i].rec)
1154 spin_lock_irqsave(&s->lock, flags);
1155 frobindir(s, SV_CIMIX_ADCINL, 0x1f, mixtable[i].rec << 5);
1156 frobindir(s, SV_CIMIX_ADCINR, 0x1f, mixtable[i].rec << 5);
1157 spin_unlock_irqrestore(&s->lock, flags);
1162 if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
1164 if (get_user(val, p))
1167 r = (val >> 8) & 0xff;
1168 if (mixtable[i].type == MT_4MUTEMONO)
1174 spin_lock_irqsave(&s->lock, flags);
1175 switch (mixtable[i].type) {
1181 frobindir(s, mixtable[i].left, 0xf0, l / 6);
1182 frobindir(s, mixtable[i].right, 0xf0, l / 6);
1196 wrindir(s, mixtable[i].left, rl);
1197 frobindir(s, mixtable[i].right, ~0x10, rr);
1209 wrindir(s, mixtable[i].left, rl);
1210 wrindir(s, mixtable[i].right, rr);
1217 rl = (100 - l) * 2 / 3;
1221 rr = (100 - r) * 2 / 3;
1222 wrindir(s, mixtable[i].left, rl);
1223 wrindir(s, mixtable[i].right, rr);
1226 spin_unlock_irqrestore(&s->lock, flags);
1227 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1228 return return_mixval(s, i, p);
1229 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1232 s->mix.vol[volidx[i]-1] = val;
1233 return put_user(s->mix.vol[volidx[i]-1], p);
1234 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1238 /* --------------------------------------------------------------------- */
1240 static int sv_open_mixdev(struct inode *inode, struct file *file)
1242 int minor = iminor(inode);
1243 struct list_head *list;
1246 for (list = devs.next; ; list = list->next) {
1249 s = list_entry(list, struct sv_state, devs);
1250 if (s->dev_mixer == minor)
1254 file->private_data = s;
1258 static int sv_release_mixdev(struct inode *inode, struct file *file)
1260 struct sv_state *s = (struct sv_state *)file->private_data;
1266 static int sv_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1268 return mixer_ioctl((struct sv_state *)file->private_data, cmd, arg);
1271 static /*const*/ struct file_operations sv_mixer_fops = {
1272 .owner = THIS_MODULE,
1273 .llseek = no_llseek,
1274 .ioctl = sv_ioctl_mixdev,
1275 .open = sv_open_mixdev,
1276 .release = sv_release_mixdev,
1279 /* --------------------------------------------------------------------- */
1281 static int drain_dac(struct sv_state *s, int nonblock)
1283 DECLARE_WAITQUEUE(wait, current);
1284 unsigned long flags;
1287 if (s->dma_dac.mapped || !s->dma_dac.ready)
1289 add_wait_queue(&s->dma_dac.wait, &wait);
1291 __set_current_state(TASK_INTERRUPTIBLE);
1292 spin_lock_irqsave(&s->lock, flags);
1293 count = s->dma_dac.count;
1294 spin_unlock_irqrestore(&s->lock, flags);
1297 if (signal_pending(current))
1300 remove_wait_queue(&s->dma_dac.wait, &wait);
1301 set_current_state(TASK_RUNNING);
1304 tmo = 3 * HZ * (count + s->dma_dac.fragsize) / 2 / s->ratedac;
1305 tmo >>= sample_shift[(s->fmt >> SV_CFMT_ASHIFT) & SV_CFMT_MASK];
1306 if (!schedule_timeout(tmo + 1))
1307 printk(KERN_DEBUG "sv: dma timed out??\n");
1309 remove_wait_queue(&s->dma_dac.wait, &wait);
1310 set_current_state(TASK_RUNNING);
1311 if (signal_pending(current))
1312 return -ERESTARTSYS;
1316 /* --------------------------------------------------------------------- */
1318 static ssize_t sv_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1320 struct sv_state *s = (struct sv_state *)file->private_data;
1321 DECLARE_WAITQUEUE(wait, current);
1323 unsigned long flags;
1328 if (ppos != &file->f_pos)
1330 if (s->dma_adc.mapped)
1332 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1334 if (!access_ok(VERIFY_WRITE, buffer, count))
1338 spin_lock_irqsave(&s->lock, flags);
1340 spin_unlock_irqrestore(&s->lock, flags);
1342 add_wait_queue(&s->dma_adc.wait, &wait);
1344 spin_lock_irqsave(&s->lock, flags);
1345 swptr = s->dma_adc.swptr;
1346 cnt = s->dma_adc.dmasize-swptr;
1347 if (s->dma_adc.count < cnt)
1348 cnt = s->dma_adc.count;
1350 __set_current_state(TASK_INTERRUPTIBLE);
1351 spin_unlock_irqrestore(&s->lock, flags);
1355 if (s->dma_adc.enabled)
1357 if (file->f_flags & O_NONBLOCK) {
1362 if (!schedule_timeout(HZ)) {
1363 printk(KERN_DEBUG "sv: read: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1364 s->dma_adc.dmasize, s->dma_adc.fragsize, s->dma_adc.count,
1365 s->dma_adc.hwptr, s->dma_adc.swptr);
1367 spin_lock_irqsave(&s->lock, flags);
1368 set_dmac(s, virt_to_bus(s->dma_adc.rawbuf), s->dma_adc.numfrag << s->dma_adc.fragshift);
1369 /* program enhanced mode registers */
1370 wrindir(s, SV_CIDMACBASECOUNT1, (s->dma_adc.fragsamples-1) >> 8);
1371 wrindir(s, SV_CIDMACBASECOUNT0, s->dma_adc.fragsamples-1);
1372 s->dma_adc.count = s->dma_adc.hwptr = s->dma_adc.swptr = 0;
1373 spin_unlock_irqrestore(&s->lock, flags);
1375 if (signal_pending(current)) {
1382 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
1387 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1388 spin_lock_irqsave(&s->lock, flags);
1389 s->dma_adc.swptr = swptr;
1390 s->dma_adc.count -= cnt;
1391 spin_unlock_irqrestore(&s->lock, flags);
1395 if (s->dma_adc.enabled)
1398 remove_wait_queue(&s->dma_adc.wait, &wait);
1399 set_current_state(TASK_RUNNING);
1403 static ssize_t sv_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1405 struct sv_state *s = (struct sv_state *)file->private_data;
1406 DECLARE_WAITQUEUE(wait, current);
1408 unsigned long flags;
1413 if (ppos != &file->f_pos)
1415 if (s->dma_dac.mapped)
1417 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1419 if (!access_ok(VERIFY_READ, buffer, count))
1423 spin_lock_irqsave(&s->lock, flags);
1425 spin_unlock_irqrestore(&s->lock, flags);
1427 add_wait_queue(&s->dma_dac.wait, &wait);
1429 spin_lock_irqsave(&s->lock, flags);
1430 if (s->dma_dac.count < 0) {
1431 s->dma_dac.count = 0;
1432 s->dma_dac.swptr = s->dma_dac.hwptr;
1434 swptr = s->dma_dac.swptr;
1435 cnt = s->dma_dac.dmasize-swptr;
1436 if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
1437 cnt = s->dma_dac.dmasize - s->dma_dac.count;
1439 __set_current_state(TASK_INTERRUPTIBLE);
1440 spin_unlock_irqrestore(&s->lock, flags);
1444 if (s->dma_dac.enabled)
1446 if (file->f_flags & O_NONBLOCK) {
1451 if (!schedule_timeout(HZ)) {
1452 printk(KERN_DEBUG "sv: write: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1453 s->dma_dac.dmasize, s->dma_dac.fragsize, s->dma_dac.count,
1454 s->dma_dac.hwptr, s->dma_dac.swptr);
1456 spin_lock_irqsave(&s->lock, flags);
1457 set_dmaa(s, virt_to_bus(s->dma_dac.rawbuf), s->dma_dac.numfrag << s->dma_dac.fragshift);
1458 /* program enhanced mode registers */
1459 wrindir(s, SV_CIDMAABASECOUNT1, (s->dma_dac.fragsamples-1) >> 8);
1460 wrindir(s, SV_CIDMAABASECOUNT0, s->dma_dac.fragsamples-1);
1461 s->dma_dac.count = s->dma_dac.hwptr = s->dma_dac.swptr = 0;
1462 spin_unlock_irqrestore(&s->lock, flags);
1464 if (signal_pending(current)) {
1471 if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt)) {
1476 swptr = (swptr + cnt) % s->dma_dac.dmasize;
1477 spin_lock_irqsave(&s->lock, flags);
1478 s->dma_dac.swptr = swptr;
1479 s->dma_dac.count += cnt;
1480 s->dma_dac.endcleared = 0;
1481 spin_unlock_irqrestore(&s->lock, flags);
1485 if (s->dma_dac.enabled)
1488 remove_wait_queue(&s->dma_dac.wait, &wait);
1489 set_current_state(TASK_RUNNING);
1493 /* No kernel lock - we have our own spinlock */
1494 static unsigned int sv_poll(struct file *file, struct poll_table_struct *wait)
1496 struct sv_state *s = (struct sv_state *)file->private_data;
1497 unsigned long flags;
1498 unsigned int mask = 0;
1501 if (file->f_mode & FMODE_WRITE) {
1502 if (!s->dma_dac.ready && prog_dmabuf(s, 1))
1504 poll_wait(file, &s->dma_dac.wait, wait);
1506 if (file->f_mode & FMODE_READ) {
1507 if (!s->dma_adc.ready && prog_dmabuf(s, 0))
1509 poll_wait(file, &s->dma_adc.wait, wait);
1511 spin_lock_irqsave(&s->lock, flags);
1513 if (file->f_mode & FMODE_READ) {
1514 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1515 mask |= POLLIN | POLLRDNORM;
1517 if (file->f_mode & FMODE_WRITE) {
1518 if (s->dma_dac.mapped) {
1519 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
1520 mask |= POLLOUT | POLLWRNORM;
1522 if ((signed)s->dma_dac.dmasize >= s->dma_dac.count + (signed)s->dma_dac.fragsize)
1523 mask |= POLLOUT | POLLWRNORM;
1526 spin_unlock_irqrestore(&s->lock, flags);
1530 static int sv_mmap(struct file *file, struct vm_area_struct *vma)
1532 struct sv_state *s = (struct sv_state *)file->private_data;
1539 if (vma->vm_flags & VM_WRITE) {
1540 if ((ret = prog_dmabuf(s, 1)) != 0)
1543 } else if (vma->vm_flags & VM_READ) {
1544 if ((ret = prog_dmabuf(s, 0)) != 0)
1550 if (vma->vm_pgoff != 0)
1552 size = vma->vm_end - vma->vm_start;
1553 if (size > (PAGE_SIZE << db->buforder))
1556 if (remap_page_range(vma, vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot))
1565 static int sv_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1567 struct sv_state *s = (struct sv_state *)file->private_data;
1568 unsigned long flags;
1569 audio_buf_info abinfo;
1572 int val, mapped, ret;
1573 unsigned char fmtm, fmtd;
1574 void __user *argp = (void __user *)arg;
1575 int __user *p = argp;
1578 mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1579 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1581 case OSS_GETVERSION:
1582 return put_user(SOUND_VERSION, p);
1584 case SNDCTL_DSP_SYNC:
1585 if (file->f_mode & FMODE_WRITE)
1586 return drain_dac(s, 0/*file->f_flags & O_NONBLOCK*/);
1589 case SNDCTL_DSP_SETDUPLEX:
1592 case SNDCTL_DSP_GETCAPS:
1593 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
1595 case SNDCTL_DSP_RESET:
1596 if (file->f_mode & FMODE_WRITE) {
1598 synchronize_irq(s->irq);
1599 s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
1601 if (file->f_mode & FMODE_READ) {
1603 synchronize_irq(s->irq);
1604 s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1608 case SNDCTL_DSP_SPEED:
1609 if (get_user(val, p))
1612 if (file->f_mode & FMODE_READ) {
1614 s->dma_adc.ready = 0;
1615 set_adc_rate(s, val);
1617 if (file->f_mode & FMODE_WRITE) {
1619 s->dma_dac.ready = 0;
1620 set_dac_rate(s, val);
1623 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, p);
1625 case SNDCTL_DSP_STEREO:
1626 if (get_user(val, p))
1630 if (file->f_mode & FMODE_READ) {
1632 s->dma_adc.ready = 0;
1634 fmtd |= SV_CFMT_STEREO << SV_CFMT_CSHIFT;
1636 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_CSHIFT);
1638 if (file->f_mode & FMODE_WRITE) {
1640 s->dma_dac.ready = 0;
1642 fmtd |= SV_CFMT_STEREO << SV_CFMT_ASHIFT;
1644 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_ASHIFT);
1646 set_fmt(s, fmtm, fmtd);
1649 case SNDCTL_DSP_CHANNELS:
1650 if (get_user(val, p))
1655 if (file->f_mode & FMODE_READ) {
1657 s->dma_adc.ready = 0;
1659 fmtd |= SV_CFMT_STEREO << SV_CFMT_CSHIFT;
1661 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_CSHIFT);
1663 if (file->f_mode & FMODE_WRITE) {
1665 s->dma_dac.ready = 0;
1667 fmtd |= SV_CFMT_STEREO << SV_CFMT_ASHIFT;
1669 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_ASHIFT);
1671 set_fmt(s, fmtm, fmtd);
1673 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_STEREO << SV_CFMT_CSHIFT)
1674 : (SV_CFMT_STEREO << SV_CFMT_ASHIFT))) ? 2 : 1, p);
1676 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1677 return put_user(AFMT_S16_LE|AFMT_U8, p);
1679 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1680 if (get_user(val, p))
1682 if (val != AFMT_QUERY) {
1685 if (file->f_mode & FMODE_READ) {
1687 s->dma_adc.ready = 0;
1688 if (val == AFMT_S16_LE)
1689 fmtd |= SV_CFMT_16BIT << SV_CFMT_CSHIFT;
1691 fmtm &= ~(SV_CFMT_16BIT << SV_CFMT_CSHIFT);
1693 if (file->f_mode & FMODE_WRITE) {
1695 s->dma_dac.ready = 0;
1696 if (val == AFMT_S16_LE)
1697 fmtd |= SV_CFMT_16BIT << SV_CFMT_ASHIFT;
1699 fmtm &= ~(SV_CFMT_16BIT << SV_CFMT_ASHIFT);
1701 set_fmt(s, fmtm, fmtd);
1703 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_16BIT << SV_CFMT_CSHIFT)
1704 : (SV_CFMT_16BIT << SV_CFMT_ASHIFT))) ? AFMT_S16_LE : AFMT_U8, p);
1706 case SNDCTL_DSP_POST:
1709 case SNDCTL_DSP_GETTRIGGER:
1711 if (file->f_mode & FMODE_READ && s->enable & SV_CENABLE_RE)
1712 val |= PCM_ENABLE_INPUT;
1713 if (file->f_mode & FMODE_WRITE && s->enable & SV_CENABLE_PE)
1714 val |= PCM_ENABLE_OUTPUT;
1715 return put_user(val, p);
1717 case SNDCTL_DSP_SETTRIGGER:
1718 if (get_user(val, p))
1720 if (file->f_mode & FMODE_READ) {
1721 if (val & PCM_ENABLE_INPUT) {
1722 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1724 s->dma_adc.enabled = 1;
1727 s->dma_adc.enabled = 0;
1731 if (file->f_mode & FMODE_WRITE) {
1732 if (val & PCM_ENABLE_OUTPUT) {
1733 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1735 s->dma_dac.enabled = 1;
1738 s->dma_dac.enabled = 0;
1744 case SNDCTL_DSP_GETOSPACE:
1745 if (!(file->f_mode & FMODE_WRITE))
1747 if (!s->dma_dac.ready && (val = prog_dmabuf(s, 0)) != 0)
1749 spin_lock_irqsave(&s->lock, flags);
1751 abinfo.fragsize = s->dma_dac.fragsize;
1752 count = s->dma_dac.count;
1755 abinfo.bytes = s->dma_dac.dmasize - count;
1756 abinfo.fragstotal = s->dma_dac.numfrag;
1757 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1758 spin_unlock_irqrestore(&s->lock, flags);
1759 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1761 case SNDCTL_DSP_GETISPACE:
1762 if (!(file->f_mode & FMODE_READ))
1764 if (!s->dma_adc.ready && (val = prog_dmabuf(s, 1)) != 0)
1766 spin_lock_irqsave(&s->lock, flags);
1768 abinfo.fragsize = s->dma_adc.fragsize;
1769 count = s->dma_adc.count;
1772 abinfo.bytes = count;
1773 abinfo.fragstotal = s->dma_adc.numfrag;
1774 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1775 spin_unlock_irqrestore(&s->lock, flags);
1776 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1778 case SNDCTL_DSP_NONBLOCK:
1779 file->f_flags |= O_NONBLOCK;
1782 case SNDCTL_DSP_GETODELAY:
1783 if (!(file->f_mode & FMODE_WRITE))
1785 if (!s->dma_dac.ready && (val = prog_dmabuf(s, 0)) != 0)
1787 spin_lock_irqsave(&s->lock, flags);
1789 count = s->dma_dac.count;
1790 spin_unlock_irqrestore(&s->lock, flags);
1793 return put_user(count, p);
1795 case SNDCTL_DSP_GETIPTR:
1796 if (!(file->f_mode & FMODE_READ))
1798 if (!s->dma_adc.ready && (val = prog_dmabuf(s, 1)) != 0)
1800 spin_lock_irqsave(&s->lock, flags);
1802 cinfo.bytes = s->dma_adc.total_bytes;
1803 count = s->dma_adc.count;
1806 cinfo.blocks = count >> s->dma_adc.fragshift;
1807 cinfo.ptr = s->dma_adc.hwptr;
1808 if (s->dma_adc.mapped)
1809 s->dma_adc.count &= s->dma_adc.fragsize-1;
1810 spin_unlock_irqrestore(&s->lock, flags);
1811 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1815 case SNDCTL_DSP_GETOPTR:
1816 if (!(file->f_mode & FMODE_WRITE))
1818 if (!s->dma_dac.ready && (val = prog_dmabuf(s, 0)) != 0)
1820 spin_lock_irqsave(&s->lock, flags);
1822 cinfo.bytes = s->dma_dac.total_bytes;
1823 count = s->dma_dac.count;
1826 cinfo.blocks = count >> s->dma_dac.fragshift;
1827 cinfo.ptr = s->dma_dac.hwptr;
1828 if (s->dma_dac.mapped)
1829 s->dma_dac.count &= s->dma_dac.fragsize-1;
1830 spin_unlock_irqrestore(&s->lock, flags);
1831 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1835 case SNDCTL_DSP_GETBLKSIZE:
1836 if (file->f_mode & FMODE_WRITE) {
1837 if ((val = prog_dmabuf(s, 0)))
1839 return put_user(s->dma_dac.fragsize, p);
1841 if ((val = prog_dmabuf(s, 1)))
1843 return put_user(s->dma_adc.fragsize, p);
1845 case SNDCTL_DSP_SETFRAGMENT:
1846 if (get_user(val, p))
1848 if (file->f_mode & FMODE_READ) {
1849 s->dma_adc.ossfragshift = val & 0xffff;
1850 s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1851 if (s->dma_adc.ossfragshift < 4)
1852 s->dma_adc.ossfragshift = 4;
1853 if (s->dma_adc.ossfragshift > 15)
1854 s->dma_adc.ossfragshift = 15;
1855 if (s->dma_adc.ossmaxfrags < 4)
1856 s->dma_adc.ossmaxfrags = 4;
1858 if (file->f_mode & FMODE_WRITE) {
1859 s->dma_dac.ossfragshift = val & 0xffff;
1860 s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
1861 if (s->dma_dac.ossfragshift < 4)
1862 s->dma_dac.ossfragshift = 4;
1863 if (s->dma_dac.ossfragshift > 15)
1864 s->dma_dac.ossfragshift = 15;
1865 if (s->dma_dac.ossmaxfrags < 4)
1866 s->dma_dac.ossmaxfrags = 4;
1870 case SNDCTL_DSP_SUBDIVIDE:
1871 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1872 (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1874 if (get_user(val, p))
1876 if (val != 1 && val != 2 && val != 4)
1878 if (file->f_mode & FMODE_READ)
1879 s->dma_adc.subdivision = val;
1880 if (file->f_mode & FMODE_WRITE)
1881 s->dma_dac.subdivision = val;
1884 case SOUND_PCM_READ_RATE:
1885 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, p);
1887 case SOUND_PCM_READ_CHANNELS:
1888 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_STEREO << SV_CFMT_CSHIFT)
1889 : (SV_CFMT_STEREO << SV_CFMT_ASHIFT))) ? 2 : 1, p);
1891 case SOUND_PCM_READ_BITS:
1892 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_16BIT << SV_CFMT_CSHIFT)
1893 : (SV_CFMT_16BIT << SV_CFMT_ASHIFT))) ? 16 : 8, p);
1895 case SOUND_PCM_WRITE_FILTER:
1896 case SNDCTL_DSP_SETSYNCRO:
1897 case SOUND_PCM_READ_FILTER:
1901 return mixer_ioctl(s, cmd, arg);
1904 static int sv_open(struct inode *inode, struct file *file)
1906 int minor = iminor(inode);
1907 DECLARE_WAITQUEUE(wait, current);
1908 unsigned char fmtm = ~0, fmts = 0;
1909 struct list_head *list;
1912 for (list = devs.next; ; list = list->next) {
1915 s = list_entry(list, struct sv_state, devs);
1916 if (!((s->dev_audio ^ minor) & ~0xf))
1920 file->private_data = s;
1921 /* wait for device to become free */
1923 while (s->open_mode & file->f_mode) {
1924 if (file->f_flags & O_NONBLOCK) {
1928 add_wait_queue(&s->open_wait, &wait);
1929 __set_current_state(TASK_INTERRUPTIBLE);
1932 remove_wait_queue(&s->open_wait, &wait);
1933 set_current_state(TASK_RUNNING);
1934 if (signal_pending(current))
1935 return -ERESTARTSYS;
1938 if (file->f_mode & FMODE_READ) {
1939 fmtm &= ~((SV_CFMT_STEREO | SV_CFMT_16BIT) << SV_CFMT_CSHIFT);
1940 if ((minor & 0xf) == SND_DEV_DSP16)
1941 fmts |= SV_CFMT_16BIT << SV_CFMT_CSHIFT;
1942 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
1943 s->dma_adc.enabled = 1;
1944 set_adc_rate(s, 8000);
1946 if (file->f_mode & FMODE_WRITE) {
1947 fmtm &= ~((SV_CFMT_STEREO | SV_CFMT_16BIT) << SV_CFMT_ASHIFT);
1948 if ((minor & 0xf) == SND_DEV_DSP16)
1949 fmts |= SV_CFMT_16BIT << SV_CFMT_ASHIFT;
1950 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
1951 s->dma_dac.enabled = 1;
1952 set_dac_rate(s, 8000);
1954 set_fmt(s, fmtm, fmts);
1955 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1960 static int sv_release(struct inode *inode, struct file *file)
1962 struct sv_state *s = (struct sv_state *)file->private_data;
1966 if (file->f_mode & FMODE_WRITE)
1967 drain_dac(s, file->f_flags & O_NONBLOCK);
1969 if (file->f_mode & FMODE_WRITE) {
1971 dealloc_dmabuf(s, &s->dma_dac);
1973 if (file->f_mode & FMODE_READ) {
1975 dealloc_dmabuf(s, &s->dma_adc);
1977 s->open_mode &= ~(file->f_mode & (FMODE_READ|FMODE_WRITE));
1978 wake_up(&s->open_wait);
1984 static /*const*/ struct file_operations sv_audio_fops = {
1985 .owner = THIS_MODULE,
1986 .llseek = no_llseek,
1993 .release = sv_release,
1996 /* --------------------------------------------------------------------- */
1998 static ssize_t sv_midi_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
2000 struct sv_state *s = (struct sv_state *)file->private_data;
2001 DECLARE_WAITQUEUE(wait, current);
2003 unsigned long flags;
2008 if (ppos != &file->f_pos)
2010 if (!access_ok(VERIFY_WRITE, buffer, count))
2015 add_wait_queue(&s->midi.iwait, &wait);
2017 spin_lock_irqsave(&s->lock, flags);
2019 cnt = MIDIINBUF - ptr;
2020 if (s->midi.icnt < cnt)
2023 __set_current_state(TASK_INTERRUPTIBLE);
2024 spin_unlock_irqrestore(&s->lock, flags);
2028 if (file->f_flags & O_NONBLOCK) {
2034 if (signal_pending(current)) {
2041 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt)) {
2046 ptr = (ptr + cnt) % MIDIINBUF;
2047 spin_lock_irqsave(&s->lock, flags);
2049 s->midi.icnt -= cnt;
2050 spin_unlock_irqrestore(&s->lock, flags);
2056 __set_current_state(TASK_RUNNING);
2057 remove_wait_queue(&s->midi.iwait, &wait);
2061 static ssize_t sv_midi_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
2063 struct sv_state *s = (struct sv_state *)file->private_data;
2064 DECLARE_WAITQUEUE(wait, current);
2066 unsigned long flags;
2071 if (ppos != &file->f_pos)
2073 if (!access_ok(VERIFY_READ, buffer, count))
2078 add_wait_queue(&s->midi.owait, &wait);
2080 spin_lock_irqsave(&s->lock, flags);
2082 cnt = MIDIOUTBUF - ptr;
2083 if (s->midi.ocnt + cnt > MIDIOUTBUF)
2084 cnt = MIDIOUTBUF - s->midi.ocnt;
2086 __set_current_state(TASK_INTERRUPTIBLE);
2089 spin_unlock_irqrestore(&s->lock, flags);
2093 if (file->f_flags & O_NONBLOCK) {
2099 if (signal_pending(current)) {
2106 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt)) {
2111 ptr = (ptr + cnt) % MIDIOUTBUF;
2112 spin_lock_irqsave(&s->lock, flags);
2114 s->midi.ocnt += cnt;
2115 spin_unlock_irqrestore(&s->lock, flags);
2119 spin_lock_irqsave(&s->lock, flags);
2121 spin_unlock_irqrestore(&s->lock, flags);
2123 __set_current_state(TASK_RUNNING);
2124 remove_wait_queue(&s->midi.owait, &wait);
2128 /* No kernel lock - we have our own spinlock */
2129 static unsigned int sv_midi_poll(struct file *file, struct poll_table_struct *wait)
2131 struct sv_state *s = (struct sv_state *)file->private_data;
2132 unsigned long flags;
2133 unsigned int mask = 0;
2136 if (file->f_mode & FMODE_WRITE)
2137 poll_wait(file, &s->midi.owait, wait);
2138 if (file->f_mode & FMODE_READ)
2139 poll_wait(file, &s->midi.iwait, wait);
2140 spin_lock_irqsave(&s->lock, flags);
2141 if (file->f_mode & FMODE_READ) {
2142 if (s->midi.icnt > 0)
2143 mask |= POLLIN | POLLRDNORM;
2145 if (file->f_mode & FMODE_WRITE) {
2146 if (s->midi.ocnt < MIDIOUTBUF)
2147 mask |= POLLOUT | POLLWRNORM;
2149 spin_unlock_irqrestore(&s->lock, flags);
2153 static int sv_midi_open(struct inode *inode, struct file *file)
2155 int minor = iminor(inode);
2156 DECLARE_WAITQUEUE(wait, current);
2157 unsigned long flags;
2158 struct list_head *list;
2161 for (list = devs.next; ; list = list->next) {
2164 s = list_entry(list, struct sv_state, devs);
2165 if (s->dev_midi == minor)
2169 file->private_data = s;
2170 /* wait for device to become free */
2172 while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
2173 if (file->f_flags & O_NONBLOCK) {
2177 add_wait_queue(&s->open_wait, &wait);
2178 __set_current_state(TASK_INTERRUPTIBLE);
2181 remove_wait_queue(&s->open_wait, &wait);
2182 set_current_state(TASK_RUNNING);
2183 if (signal_pending(current))
2184 return -ERESTARTSYS;
2187 spin_lock_irqsave(&s->lock, flags);
2188 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2189 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2190 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2191 //outb(inb(s->ioenh + SV_CODEC_CONTROL) | SV_CCTRL_WAVETABLE, s->ioenh + SV_CODEC_CONTROL);
2192 outb(inb(s->ioenh + SV_CODEC_INTMASK) | SV_CINTMASK_MIDI, s->ioenh + SV_CODEC_INTMASK);
2193 wrindir(s, SV_CIUARTCONTROL, 5); /* output MIDI data to external and internal synth */
2194 wrindir(s, SV_CIWAVETABLESRC, 1); /* Wavetable in PC RAM */
2195 outb(0xff, s->iomidi+1); /* reset command */
2196 outb(0x3f, s->iomidi+1); /* uart command */
2197 if (!(inb(s->iomidi+1) & 0x80))
2199 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2200 init_timer(&s->midi.timer);
2201 s->midi.timer.expires = jiffies+1;
2202 s->midi.timer.data = (unsigned long)s;
2203 s->midi.timer.function = sv_midi_timer;
2204 add_timer(&s->midi.timer);
2206 if (file->f_mode & FMODE_READ) {
2207 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2209 if (file->f_mode & FMODE_WRITE) {
2210 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2212 spin_unlock_irqrestore(&s->lock, flags);
2213 s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
2218 static int sv_midi_release(struct inode *inode, struct file *file)
2220 struct sv_state *s = (struct sv_state *)file->private_data;
2221 DECLARE_WAITQUEUE(wait, current);
2222 unsigned long flags;
2223 unsigned count, tmo;
2228 if (file->f_mode & FMODE_WRITE) {
2229 add_wait_queue(&s->midi.owait, &wait);
2231 __set_current_state(TASK_INTERRUPTIBLE);
2232 spin_lock_irqsave(&s->lock, flags);
2233 count = s->midi.ocnt;
2234 spin_unlock_irqrestore(&s->lock, flags);
2237 if (signal_pending(current))
2239 if (file->f_flags & O_NONBLOCK) {
2240 remove_wait_queue(&s->midi.owait, &wait);
2241 set_current_state(TASK_RUNNING);
2245 tmo = (count * HZ) / 3100;
2246 if (!schedule_timeout(tmo ? : 1) && tmo)
2247 printk(KERN_DEBUG "sv: midi timed out??\n");
2249 remove_wait_queue(&s->midi.owait, &wait);
2250 set_current_state(TASK_RUNNING);
2253 s->open_mode &= ~((file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE));
2254 spin_lock_irqsave(&s->lock, flags);
2255 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2256 outb(inb(s->ioenh + SV_CODEC_INTMASK) & ~SV_CINTMASK_MIDI, s->ioenh + SV_CODEC_INTMASK);
2257 del_timer(&s->midi.timer);
2259 spin_unlock_irqrestore(&s->lock, flags);
2260 wake_up(&s->open_wait);
2266 static /*const*/ struct file_operations sv_midi_fops = {
2267 .owner = THIS_MODULE,
2268 .llseek = no_llseek,
2269 .read = sv_midi_read,
2270 .write = sv_midi_write,
2271 .poll = sv_midi_poll,
2272 .open = sv_midi_open,
2273 .release = sv_midi_release,
2276 /* --------------------------------------------------------------------- */
2278 static int sv_dmfm_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2280 static const unsigned char op_offset[18] = {
2281 0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
2282 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D,
2283 0x10, 0x11, 0x12, 0x13, 0x14, 0x15
2285 struct sv_state *s = (struct sv_state *)file->private_data;
2286 struct dm_fm_voice v;
2287 struct dm_fm_note n;
2288 struct dm_fm_params p;
2293 case FM_IOCTL_RESET:
2294 for (regb = 0xb0; regb < 0xb9; regb++) {
2295 outb(regb, s->iosynth);
2296 outb(0, s->iosynth+1);
2297 outb(regb, s->iosynth+2);
2298 outb(0, s->iosynth+3);
2302 case FM_IOCTL_PLAY_NOTE:
2303 if (copy_from_user(&n, (void __user *)arg, sizeof(n)))
2314 outb(0xa0 + regb, io);
2315 outb(n.fnum & 0xff, io+1);
2316 outb(0xb0 + regb, io);
2317 outb(((n.fnum >> 8) & 3) | ((n.octave & 7) << 2) | ((n.key_on & 1) << 5), io+1);
2320 case FM_IOCTL_SET_VOICE:
2321 if (copy_from_user(&v, (void __user *)arg, sizeof(v)))
2325 regb = op_offset[v.voice];
2326 io = s->iosynth + ((v.op & 1) << 1);
2327 outb(0x20 + regb, io);
2328 outb(((v.am & 1) << 7) | ((v.vibrato & 1) << 6) | ((v.do_sustain & 1) << 5) |
2329 ((v.kbd_scale & 1) << 4) | (v.harmonic & 0xf), io+1);
2330 outb(0x40 + regb, io);
2331 outb(((v.scale_level & 0x3) << 6) | (v.volume & 0x3f), io+1);
2332 outb(0x60 + regb, io);
2333 outb(((v.attack & 0xf) << 4) | (v.decay & 0xf), io+1);
2334 outb(0x80 + regb, io);
2335 outb(((v.sustain & 0xf) << 4) | (v.release & 0xf), io+1);
2336 outb(0xe0 + regb, io);
2337 outb(v.waveform & 0x7, io+1);
2345 outb(0xc0 + regb, io);
2346 outb(((v.right & 1) << 5) | ((v.left & 1) << 4) | ((v.feedback & 7) << 1) |
2347 (v.connection & 1), io+1);
2350 case FM_IOCTL_SET_PARAMS:
2351 if (copy_from_user(&p, (void *__user )arg, sizeof(p)))
2353 outb(0x08, s->iosynth);
2354 outb((p.kbd_split & 1) << 6, s->iosynth+1);
2355 outb(0xbd, s->iosynth);
2356 outb(((p.am_depth & 1) << 7) | ((p.vib_depth & 1) << 6) | ((p.rhythm & 1) << 5) | ((p.bass & 1) << 4) |
2357 ((p.snare & 1) << 3) | ((p.tomtom & 1) << 2) | ((p.cymbal & 1) << 1) | (p.hihat & 1), s->iosynth+1);
2360 case FM_IOCTL_SET_OPL:
2361 outb(4, s->iosynth+2);
2362 outb(arg, s->iosynth+3);
2365 case FM_IOCTL_SET_MODE:
2366 outb(5, s->iosynth+2);
2367 outb(arg & 1, s->iosynth+3);
2375 static int sv_dmfm_open(struct inode *inode, struct file *file)
2377 int minor = iminor(inode);
2378 DECLARE_WAITQUEUE(wait, current);
2379 struct list_head *list;
2382 for (list = devs.next; ; list = list->next) {
2385 s = list_entry(list, struct sv_state, devs);
2386 if (s->dev_dmfm == minor)
2390 file->private_data = s;
2391 /* wait for device to become free */
2393 while (s->open_mode & FMODE_DMFM) {
2394 if (file->f_flags & O_NONBLOCK) {
2398 add_wait_queue(&s->open_wait, &wait);
2399 __set_current_state(TASK_INTERRUPTIBLE);
2402 remove_wait_queue(&s->open_wait, &wait);
2403 set_current_state(TASK_RUNNING);
2404 if (signal_pending(current))
2405 return -ERESTARTSYS;
2408 /* init the stuff */
2409 outb(1, s->iosynth);
2410 outb(0x20, s->iosynth+1); /* enable waveforms */
2411 outb(4, s->iosynth+2);
2412 outb(0, s->iosynth+3); /* no 4op enabled */
2413 outb(5, s->iosynth+2);
2414 outb(1, s->iosynth+3); /* enable OPL3 */
2415 s->open_mode |= FMODE_DMFM;
2420 static int sv_dmfm_release(struct inode *inode, struct file *file)
2422 struct sv_state *s = (struct sv_state *)file->private_data;
2428 s->open_mode &= ~FMODE_DMFM;
2429 for (regb = 0xb0; regb < 0xb9; regb++) {
2430 outb(regb, s->iosynth);
2431 outb(0, s->iosynth+1);
2432 outb(regb, s->iosynth+2);
2433 outb(0, s->iosynth+3);
2435 wake_up(&s->open_wait);
2441 static /*const*/ struct file_operations sv_dmfm_fops = {
2442 .owner = THIS_MODULE,
2443 .llseek = no_llseek,
2444 .ioctl = sv_dmfm_ioctl,
2445 .open = sv_dmfm_open,
2446 .release = sv_dmfm_release,
2449 /* --------------------------------------------------------------------- */
2451 /* maximum number of devices; only used for command line params */
2454 static int reverb[NR_DEVICE];
2457 static int wavetable[NR_DEVICE];
2460 static unsigned int devindex;
2462 MODULE_PARM(reverb, "1-" __MODULE_STRING(NR_DEVICE) "i");
2463 MODULE_PARM_DESC(reverb, "if 1 enables the reverb circuitry. NOTE: your card must have the reverb RAM");
2465 MODULE_PARM(wavetable, "1-" __MODULE_STRING(NR_DEVICE) "i");
2466 MODULE_PARM_DESC(wavetable, "if 1 the wavetable synth is enabled");
2469 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2470 MODULE_DESCRIPTION("S3 SonicVibes Driver");
2471 MODULE_LICENSE("GPL");
2474 /* --------------------------------------------------------------------- */
2476 static struct initvol {
2479 } initvol[] __initdata = {
2480 { SOUND_MIXER_WRITE_RECLEV, 0x4040 },
2481 { SOUND_MIXER_WRITE_LINE1, 0x4040 },
2482 { SOUND_MIXER_WRITE_CD, 0x4040 },
2483 { SOUND_MIXER_WRITE_LINE, 0x4040 },
2484 { SOUND_MIXER_WRITE_MIC, 0x4040 },
2485 { SOUND_MIXER_WRITE_SYNTH, 0x4040 },
2486 { SOUND_MIXER_WRITE_LINE2, 0x4040 },
2487 { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
2488 { SOUND_MIXER_WRITE_PCM, 0x4040 }
2491 #define RSRCISIOREGION(dev,num) (pci_resource_start((dev), (num)) != 0 && \
2492 (pci_resource_flags((dev), (num)) & IORESOURCE_IO))
2494 static int __devinit sv_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
2496 static char __initdata sv_ddma_name[] = "S3 Inc. SonicVibes DDMA Controller";
2501 unsigned ddmanamelen;
2503 if ((ret=pci_enable_device(pcidev)))
2506 if (!RSRCISIOREGION(pcidev, RESOURCE_SB) ||
2507 !RSRCISIOREGION(pcidev, RESOURCE_ENH) ||
2508 !RSRCISIOREGION(pcidev, RESOURCE_SYNTH) ||
2509 !RSRCISIOREGION(pcidev, RESOURCE_MIDI) ||
2510 !RSRCISIOREGION(pcidev, RESOURCE_GAME))
2512 if (pcidev->irq == 0)
2514 if (pci_set_dma_mask(pcidev, 0x00ffffff)) {
2515 printk(KERN_WARNING "sonicvibes: architecture does not support 24bit PCI busmaster DMA\n");
2518 /* try to allocate a DDMA resource if not already available */
2519 if (!RSRCISIOREGION(pcidev, RESOURCE_DDMA)) {
2520 pcidev->resource[RESOURCE_DDMA].start = 0;
2521 pcidev->resource[RESOURCE_DDMA].end = 2*SV_EXTENT_DMA-1;
2522 pcidev->resource[RESOURCE_DDMA].flags = PCI_BASE_ADDRESS_SPACE_IO | IORESOURCE_IO;
2523 ddmanamelen = strlen(sv_ddma_name)+1;
2524 if (!(ddmaname = kmalloc(ddmanamelen, GFP_KERNEL)))
2526 memcpy(ddmaname, sv_ddma_name, ddmanamelen);
2527 pcidev->resource[RESOURCE_DDMA].name = ddmaname;
2528 if (pci_assign_resource(pcidev, RESOURCE_DDMA)) {
2529 pcidev->resource[RESOURCE_DDMA].name = NULL;
2531 printk(KERN_ERR "sv: cannot allocate DDMA controller io ports\n");
2535 if (!(s = kmalloc(sizeof(struct sv_state), GFP_KERNEL))) {
2536 printk(KERN_WARNING "sv: out of memory\n");
2539 memset(s, 0, sizeof(struct sv_state));
2540 init_waitqueue_head(&s->dma_adc.wait);
2541 init_waitqueue_head(&s->dma_dac.wait);
2542 init_waitqueue_head(&s->open_wait);
2543 init_waitqueue_head(&s->midi.iwait);
2544 init_waitqueue_head(&s->midi.owait);
2545 init_MUTEX(&s->open_sem);
2546 spin_lock_init(&s->lock);
2547 s->magic = SV_MAGIC;
2549 s->iosb = pci_resource_start(pcidev, RESOURCE_SB);
2550 s->ioenh = pci_resource_start(pcidev, RESOURCE_ENH);
2551 s->iosynth = pci_resource_start(pcidev, RESOURCE_SYNTH);
2552 s->iomidi = pci_resource_start(pcidev, RESOURCE_MIDI);
2553 s->iodmaa = pci_resource_start(pcidev, RESOURCE_DDMA);
2554 s->iodmac = pci_resource_start(pcidev, RESOURCE_DDMA) + SV_EXTENT_DMA;
2555 s->gameport.io = pci_resource_start(pcidev, RESOURCE_GAME);
2556 pci_write_config_dword(pcidev, 0x40, s->iodmaa | 9); /* enable and use extended mode */
2557 pci_write_config_dword(pcidev, 0x48, s->iodmac | 9); /* enable */
2558 printk(KERN_DEBUG "sv: io ports: %#lx %#lx %#lx %#lx %#x %#x %#x\n",
2559 s->iosb, s->ioenh, s->iosynth, s->iomidi, s->gameport.io, s->iodmaa, s->iodmac);
2560 s->irq = pcidev->irq;
2563 pci_write_config_dword(pcidev, 0x60, wavetable_mem >> 12); /* wavetable base address */
2566 if (!request_region(s->ioenh, SV_EXTENT_ENH, "S3 SonicVibes PCM")) {
2567 printk(KERN_ERR "sv: io ports %#lx-%#lx in use\n", s->ioenh, s->ioenh+SV_EXTENT_ENH-1);
2570 if (!request_region(s->iodmaa, SV_EXTENT_DMA, "S3 SonicVibes DMAA")) {
2571 printk(KERN_ERR "sv: io ports %#x-%#x in use\n", s->iodmaa, s->iodmaa+SV_EXTENT_DMA-1);
2574 if (!request_region(s->iodmac, SV_EXTENT_DMA, "S3 SonicVibes DMAC")) {
2575 printk(KERN_ERR "sv: io ports %#x-%#x in use\n", s->iodmac, s->iodmac+SV_EXTENT_DMA-1);
2578 if (!request_region(s->iomidi, SV_EXTENT_MIDI, "S3 SonicVibes Midi")) {
2579 printk(KERN_ERR "sv: io ports %#lx-%#lx in use\n", s->iomidi, s->iomidi+SV_EXTENT_MIDI-1);
2582 if (!request_region(s->iosynth, SV_EXTENT_SYNTH, "S3 SonicVibes Synth")) {
2583 printk(KERN_ERR "sv: io ports %#lx-%#lx in use\n", s->iosynth, s->iosynth+SV_EXTENT_SYNTH-1);
2586 if (s->gameport.io && !request_region(s->gameport.io, SV_EXTENT_GAME, "ESS Solo1")) {
2587 printk(KERN_ERR "sv: gameport io ports in use\n");
2590 /* initialize codec registers */
2591 outb(0x80, s->ioenh + SV_CODEC_CONTROL); /* assert reset */
2593 outb(0x00, s->ioenh + SV_CODEC_CONTROL); /* deassert reset */
2595 outb(SV_CCTRL_INTADRIVE | SV_CCTRL_ENHANCED /*| SV_CCTRL_WAVETABLE */
2596 | (reverb[devindex] ? SV_CCTRL_REVERB : 0), s->ioenh + SV_CODEC_CONTROL);
2597 inb(s->ioenh + SV_CODEC_STATUS); /* clear ints */
2598 wrindir(s, SV_CIDRIVECONTROL, 0); /* drive current 16mA */
2599 wrindir(s, SV_CIENABLE, s->enable = 0); /* disable DMAA and DMAC */
2600 outb(~(SV_CINTMASK_DMAA | SV_CINTMASK_DMAC), s->ioenh + SV_CODEC_INTMASK);
2601 /* outb(0xff, s->iodmaa + SV_DMA_RESET); */
2602 /* outb(0xff, s->iodmac + SV_DMA_RESET); */
2603 inb(s->ioenh + SV_CODEC_STATUS); /* ack interrupts */
2604 wrindir(s, SV_CIADCCLKSOURCE, 0); /* use pll as ADC clock source */
2605 wrindir(s, SV_CIANALOGPWRDOWN, 0); /* power up the analog parts of the device */
2606 wrindir(s, SV_CIDIGITALPWRDOWN, 0); /* power up the digital parts of the device */
2607 setpll(s, SV_CIADCPLLM, 8000);
2608 wrindir(s, SV_CISRSSPACE, 0x80); /* SRS off */
2609 wrindir(s, SV_CIPCMSR0, (8000 * 65536 / FULLRATE) & 0xff);
2610 wrindir(s, SV_CIPCMSR1, ((8000 * 65536 / FULLRATE) >> 8) & 0xff);
2611 wrindir(s, SV_CIADCOUTPUT, 0);
2613 if ((ret=request_irq(s->irq,sv_interrupt,SA_SHIRQ,"S3 SonicVibes",s))) {
2614 printk(KERN_ERR "sv: irq %u in use\n", s->irq);
2617 printk(KERN_INFO "sv: found adapter at io %#lx irq %u dmaa %#06x dmac %#06x revision %u\n",
2618 s->ioenh, s->irq, s->iodmaa, s->iodmac, rdindir(s, SV_CIREVISION));
2619 /* register devices */
2620 if ((s->dev_audio = register_sound_dsp(&sv_audio_fops, -1)) < 0) {
2624 if ((s->dev_mixer = register_sound_mixer(&sv_mixer_fops, -1)) < 0) {
2628 if ((s->dev_midi = register_sound_midi(&sv_midi_fops, -1)) < 0) {
2632 if ((s->dev_dmfm = register_sound_special(&sv_dmfm_fops, 15 /* ?? */)) < 0) {
2636 pci_set_master(pcidev); /* enable bus mastering */
2637 /* initialize the chips */
2640 val = SOUND_MASK_LINE|SOUND_MASK_SYNTH;
2641 mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2642 for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
2643 val = initvol[i].vol;
2644 mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
2647 /* register gameport */
2648 gameport_register_port(&s->gameport);
2649 /* store it in the driver field */
2650 pci_set_drvdata(pcidev, s);
2651 /* put it into driver list */
2652 list_add_tail(&s->devs, &devs);
2653 /* increment devindex */
2654 if (devindex < NR_DEVICE-1)
2659 unregister_sound_midi(s->dev_midi);
2661 unregister_sound_mixer(s->dev_mixer);
2663 unregister_sound_dsp(s->dev_audio);
2665 printk(KERN_ERR "sv: cannot register misc device\n");
2666 free_irq(s->irq, s);
2669 release_region(s->gameport.io, SV_EXTENT_GAME);
2670 release_region(s->iosynth, SV_EXTENT_SYNTH);
2672 release_region(s->iomidi, SV_EXTENT_MIDI);
2674 release_region(s->iodmac, SV_EXTENT_DMA);
2676 release_region(s->iodmaa, SV_EXTENT_DMA);
2678 release_region(s->ioenh, SV_EXTENT_ENH);
2684 static void __devexit sv_remove(struct pci_dev *dev)
2686 struct sv_state *s = pci_get_drvdata(dev);
2691 outb(~0, s->ioenh + SV_CODEC_INTMASK); /* disable ints */
2692 synchronize_irq(s->irq);
2693 inb(s->ioenh + SV_CODEC_STATUS); /* ack interrupts */
2694 wrindir(s, SV_CIENABLE, 0); /* disable DMAA and DMAC */
2695 /*outb(0, s->iodmaa + SV_DMA_RESET);*/
2696 /*outb(0, s->iodmac + SV_DMA_RESET);*/
2697 free_irq(s->irq, s);
2698 if (s->gameport.io) {
2699 gameport_unregister_port(&s->gameport);
2700 release_region(s->gameport.io, SV_EXTENT_GAME);
2702 release_region(s->iodmac, SV_EXTENT_DMA);
2703 release_region(s->iodmaa, SV_EXTENT_DMA);
2704 release_region(s->ioenh, SV_EXTENT_ENH);
2705 release_region(s->iomidi, SV_EXTENT_MIDI);
2706 release_region(s->iosynth, SV_EXTENT_SYNTH);
2707 unregister_sound_dsp(s->dev_audio);
2708 unregister_sound_mixer(s->dev_mixer);
2709 unregister_sound_midi(s->dev_midi);
2710 unregister_sound_special(s->dev_dmfm);
2712 pci_set_drvdata(dev, NULL);
2715 static struct pci_device_id id_table[] = {
2716 { PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_SONICVIBES, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
2720 MODULE_DEVICE_TABLE(pci, id_table);
2722 static struct pci_driver sv_driver = {
2723 .name = "sonicvibes",
2724 .id_table = id_table,
2726 .remove = __devexit_p(sv_remove),
2729 static int __init init_sonicvibes(void)
2731 printk(KERN_INFO "sv: version v0.31 time " __TIME__ " " __DATE__ "\n");
2733 if (!(wavetable_mem = __get_free_pages(GFP_KERNEL, 20-PAGE_SHIFT)))
2734 printk(KERN_INFO "sv: cannot allocate 1MB of contiguous nonpageable memory for wavetable data\n");
2736 return pci_module_init(&sv_driver);
2739 static void __exit cleanup_sonicvibes(void)
2741 printk(KERN_INFO "sv: unloading\n");
2742 pci_unregister_driver(&sv_driver);
2744 free_pages(wavetable_mem, 20-PAGE_SHIFT);
2747 module_init(init_sonicvibes);
2748 module_exit(cleanup_sonicvibes);
2750 /* --------------------------------------------------------------------- */
2754 /* format is: sonicvibes=[reverb] sonicvibesdmaio=dmaioaddr */
2756 static int __init sonicvibes_setup(char *str)
2758 static unsigned __initdata nr_dev = 0;
2760 if (nr_dev >= NR_DEVICE)
2763 if (get_option(&str, &reverb[nr_dev]) == 2)
2764 (void)get_option(&str, &wavetable[nr_dev]);
2766 (void)get_option(&str, &reverb[nr_dev]);
2773 __setup("sonicvibes=", sonicvibes_setup);