2 * ALSA driver for ATI IXP 150/200/250/300 AC97 controllers
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <sound/driver.h>
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
26 #include <linux/init.h>
27 #include <linux/pci.h>
28 #include <linux/slab.h>
29 #include <linux/moduleparam.h>
30 #include <sound/core.h>
31 #include <sound/pcm.h>
32 #include <sound/pcm_params.h>
33 #include <sound/info.h>
34 #include <sound/ac97_codec.h>
35 #include <sound/initval.h>
37 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
38 MODULE_DESCRIPTION("ATI IXP AC97 controller");
39 MODULE_LICENSE("GPL");
40 MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250/300/400}}");
42 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
43 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
44 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
45 static int ac97_clock[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 48000};
46 static int spdif_aclink[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1};
48 module_param_array(index, int, NULL, 0444);
49 MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
50 module_param_array(id, charp, NULL, 0444);
51 MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
52 module_param_array(enable, bool, NULL, 0444);
53 MODULE_PARM_DESC(enable, "Enable audio part of ATI IXP controller.");
54 module_param_array(ac97_clock, int, NULL, 0444);
55 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
56 module_param_array(spdif_aclink, bool, NULL, 0444);
57 MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link.");
63 #define ATI_REG_ISR 0x00 /* interrupt source */
64 #define ATI_REG_ISR_IN_XRUN (1U<<0)
65 #define ATI_REG_ISR_IN_STATUS (1U<<1)
66 #define ATI_REG_ISR_OUT_XRUN (1U<<2)
67 #define ATI_REG_ISR_OUT_STATUS (1U<<3)
68 #define ATI_REG_ISR_SPDF_XRUN (1U<<4)
69 #define ATI_REG_ISR_SPDF_STATUS (1U<<5)
70 #define ATI_REG_ISR_PHYS_INTR (1U<<8)
71 #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
72 #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
73 #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
74 #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
75 #define ATI_REG_ISR_NEW_FRAME (1U<<13)
77 #define ATI_REG_IER 0x04 /* interrupt enable */
78 #define ATI_REG_IER_IN_XRUN_EN (1U<<0)
79 #define ATI_REG_IER_IO_STATUS_EN (1U<<1)
80 #define ATI_REG_IER_OUT_XRUN_EN (1U<<2)
81 #define ATI_REG_IER_OUT_XRUN_COND (1U<<3)
82 #define ATI_REG_IER_SPDF_XRUN_EN (1U<<4)
83 #define ATI_REG_IER_SPDF_STATUS_EN (1U<<5)
84 #define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
85 #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
86 #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
87 #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
88 #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
89 #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
90 #define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */
92 #define ATI_REG_CMD 0x08 /* command */
93 #define ATI_REG_CMD_POWERDOWN (1U<<0)
94 #define ATI_REG_CMD_RECEIVE_EN (1U<<1)
95 #define ATI_REG_CMD_SEND_EN (1U<<2)
96 #define ATI_REG_CMD_STATUS_MEM (1U<<3)
97 #define ATI_REG_CMD_SPDF_OUT_EN (1U<<4)
98 #define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5)
99 #define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6)
100 #define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6
101 #define ATI_REG_CMD_IN_DMA_EN (1U<<8)
102 #define ATI_REG_CMD_OUT_DMA_EN (1U<<9)
103 #define ATI_REG_CMD_SPDF_DMA_EN (1U<<10)
104 #define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11)
105 #define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12)
106 #define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12)
107 #define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12)
108 #define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12)
109 #define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12)
110 #define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16)
111 #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
112 #define ATI_REG_CMD_INTERLEAVE_IN (1U<<21)
113 #define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22)
114 #define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
115 #define ATI_REG_CMD_PACKED_DIS (1U<<24)
116 #define ATI_REG_CMD_BURST_EN (1U<<25)
117 #define ATI_REG_CMD_PANIC_EN (1U<<26)
118 #define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
119 #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
120 #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
121 #define ATI_REG_CMD_AC_SYNC (1U<<30)
122 #define ATI_REG_CMD_AC_RESET (1U<<31)
124 #define ATI_REG_PHYS_OUT_ADDR 0x0c
125 #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
126 #define ATI_REG_PHYS_OUT_RW (1U<<2)
127 #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
128 #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
129 #define ATI_REG_PHYS_OUT_DATA_SHIFT 16
131 #define ATI_REG_PHYS_IN_ADDR 0x10
132 #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
133 #define ATI_REG_PHYS_IN_ADDR_SHIFT 9
134 #define ATI_REG_PHYS_IN_DATA_SHIFT 16
136 #define ATI_REG_SLOTREQ 0x14
138 #define ATI_REG_COUNTER 0x18
139 #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
140 #define ATI_REG_COUNTER_BITCLOCK (31U<<8)
142 #define ATI_REG_IN_FIFO_THRESHOLD 0x1c
144 #define ATI_REG_IN_DMA_LINKPTR 0x20
145 #define ATI_REG_IN_DMA_DT_START 0x24 /* RO */
146 #define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */
147 #define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */
148 #define ATI_REG_IN_DMA_DT_SIZE 0x30
150 #define ATI_REG_OUT_DMA_SLOT 0x34
151 #define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3))
152 #define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff
153 #define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800
154 #define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11
156 #define ATI_REG_OUT_DMA_LINKPTR 0x38
157 #define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */
158 #define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */
159 #define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */
160 #define ATI_REG_OUT_DMA_DT_SIZE 0x48
162 #define ATI_REG_SPDF_CMD 0x4c
163 #define ATI_REG_SPDF_CMD_LFSR (1U<<4)
164 #define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5)
165 #define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */
167 #define ATI_REG_SPDF_DMA_LINKPTR 0x50
168 #define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */
169 #define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */
170 #define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */
171 #define ATI_REG_SPDF_DMA_DT_SIZE 0x60
173 #define ATI_REG_MODEM_MIRROR 0x7c
174 #define ATI_REG_AUDIO_MIRROR 0x80
176 #define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */
177 #define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */
179 #define ATI_REG_FIFO_FLUSH 0x88
180 #define ATI_REG_FIFO_OUT_FLUSH (1U<<0)
181 #define ATI_REG_FIFO_IN_FLUSH (1U<<1)
184 #define ATI_REG_LINKPTR_EN (1U<<0)
186 /* [INT|OUT|SPDIF]_DMA_DT_SIZE */
187 #define ATI_REG_DMA_DT_SIZE (0xffffU<<0)
188 #define ATI_REG_DMA_FIFO_USED (0x1fU<<16)
189 #define ATI_REG_DMA_FIFO_FREE (0x1fU<<21)
190 #define ATI_REG_DMA_STATE (7U<<26)
193 #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
199 typedef struct snd_atiixp atiixp_t;
200 typedef struct snd_atiixp_dma atiixp_dma_t;
201 typedef struct snd_atiixp_dma_ops atiixp_dma_ops_t;
205 * DMA packate descriptor
208 typedef struct atiixp_dma_desc {
209 u32 addr; /* DMA buffer address */
210 u16 status; /* status bits */
211 u16 size; /* size of the packet in dwords */
212 u32 next; /* address of the next packet descriptor */
218 enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, ATI_DMA_SPDIF, NUM_ATI_DMAS }; /* DMAs */
219 enum { ATI_PCM_OUT, ATI_PCM_IN, ATI_PCM_SPDIF, NUM_ATI_PCMS }; /* AC97 pcm slots */
220 enum { ATI_PCMDEV_ANALOG, ATI_PCMDEV_DIGITAL, NUM_ATI_PCMDEVS }; /* pcm devices */
222 #define NUM_ATI_CODECS 3
226 * constants and callbacks for each DMA type
228 struct snd_atiixp_dma_ops {
229 int type; /* ATI_DMA_XXX */
230 unsigned int llp_offset; /* LINKPTR offset */
231 unsigned int dt_cur; /* DT_CUR offset */
232 void (*enable_dma)(atiixp_t *chip, int on); /* called from open callback */
233 void (*enable_transfer)(atiixp_t *chip, int on); /* called from trigger (START/STOP) */
234 void (*flush_dma)(atiixp_t *chip); /* called from trigger (STOP only) */
240 struct snd_atiixp_dma {
241 const atiixp_dma_ops_t *ops;
242 struct snd_dma_buffer desc_buf;
243 snd_pcm_substream_t *substream; /* assigned PCM substream */
244 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
245 unsigned int period_bytes, periods;
249 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
260 void __iomem *remap_addr;
263 ac97_bus_t *ac97_bus;
264 ac97_t *ac97[NUM_ATI_CODECS];
267 spinlock_t ac97_lock;
269 atiixp_dma_t dmas[NUM_ATI_DMAS];
270 struct ac97_pcm *pcms[NUM_ATI_PCMS];
271 snd_pcm_t *pcmdevs[NUM_ATI_PCMDEVS];
273 int max_channels; /* max. channels for PCM out */
275 unsigned int codec_not_ready_bits; /* for codec detection */
277 int spdif_over_aclink; /* passed from the module option */
278 struct semaphore open_mutex; /* playback open mutex */
284 static struct pci_device_id snd_atiixp_ids[] = {
285 { 0x1002, 0x4341, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB200 */
286 { 0x1002, 0x4361, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB300 */
287 { 0x1002, 0x4370, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB400 */
291 MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
299 * update the bits of the given register.
300 * return 1 if the bits changed.
302 static int snd_atiixp_update_bits(atiixp_t *chip, unsigned int reg,
303 unsigned int mask, unsigned int value)
305 void __iomem *addr = chip->remap_addr + reg;
306 unsigned int data, old_data;
307 old_data = data = readl(addr);
310 if (old_data == data)
317 * macros for easy use
319 #define atiixp_write(chip,reg,value) \
320 writel(value, chip->remap_addr + ATI_REG_##reg)
321 #define atiixp_read(chip,reg) \
322 readl(chip->remap_addr + ATI_REG_##reg)
323 #define atiixp_update(chip,reg,mask,val) \
324 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
326 /* delay for one tick */
327 #define do_delay() do { \
328 set_current_state(TASK_UNINTERRUPTIBLE); \
329 schedule_timeout(1); \
334 * handling DMA packets
336 * we allocate a linear buffer for the DMA, and split it to each packet.
337 * in a future version, a scatter-gather buffer should be implemented.
340 #define ATI_DESC_LIST_SIZE \
341 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(atiixp_dma_desc_t))
344 * build packets ring for the given buffer size.
346 * IXP handles the buffer descriptors, which are connected as a linked
347 * list. although we can change the list dynamically, in this version,
348 * a static RING of buffer descriptors is used.
350 * the ring is built in this function, and is set up to the hardware.
352 static int atiixp_build_dma_packets(atiixp_t *chip, atiixp_dma_t *dma,
353 snd_pcm_substream_t *substream,
354 unsigned int periods,
355 unsigned int period_bytes)
361 if (periods > ATI_MAX_DESCRIPTORS)
364 if (dma->desc_buf.area == NULL) {
365 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
366 ATI_DESC_LIST_SIZE, &dma->desc_buf) < 0)
368 dma->period_bytes = dma->periods = 0; /* clear */
371 if (dma->periods == periods && dma->period_bytes == period_bytes)
374 /* reset DMA before changing the descriptor table */
375 spin_lock_irqsave(&chip->reg_lock, flags);
376 writel(0, chip->remap_addr + dma->ops->llp_offset);
377 dma->ops->enable_dma(chip, 0);
378 dma->ops->enable_dma(chip, 1);
379 spin_unlock_irqrestore(&chip->reg_lock, flags);
381 /* fill the entries */
382 addr = (u32)substream->runtime->dma_addr;
383 desc_addr = (u32)dma->desc_buf.addr;
384 for (i = 0; i < periods; i++) {
385 atiixp_dma_desc_t *desc = &((atiixp_dma_desc_t *)dma->desc_buf.area)[i];
386 desc->addr = cpu_to_le32(addr);
388 desc->size = period_bytes >> 2; /* in dwords */
389 desc_addr += sizeof(atiixp_dma_desc_t);
390 if (i == periods - 1)
391 desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
393 desc->next = cpu_to_le32(desc_addr);
394 addr += period_bytes;
397 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
398 chip->remap_addr + dma->ops->llp_offset);
400 dma->period_bytes = period_bytes;
401 dma->periods = periods;
407 * remove the ring buffer and release it if assigned
409 static void atiixp_clear_dma_packets(atiixp_t *chip, atiixp_dma_t *dma, snd_pcm_substream_t *substream)
411 if (dma->desc_buf.area) {
412 writel(0, chip->remap_addr + dma->ops->llp_offset);
413 snd_dma_free_pages(&dma->desc_buf);
414 dma->desc_buf.area = NULL;
421 static int snd_atiixp_acquire_codec(atiixp_t *chip)
425 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
427 snd_printk(KERN_WARNING "atiixp: codec acquire timeout\n");
435 static unsigned short snd_atiixp_codec_read(atiixp_t *chip, unsigned short codec, unsigned short reg)
440 if (snd_atiixp_acquire_codec(chip) < 0)
442 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
443 ATI_REG_PHYS_OUT_ADDR_EN |
444 ATI_REG_PHYS_OUT_RW |
446 atiixp_write(chip, PHYS_OUT_ADDR, data);
447 if (snd_atiixp_acquire_codec(chip) < 0)
451 data = atiixp_read(chip, PHYS_IN_ADDR);
452 if (data & ATI_REG_PHYS_IN_READ_FLAG)
453 return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
456 /* time out may happen during reset */
458 snd_printk(KERN_WARNING "atiixp: codec read timeout (reg %x)\n", reg);
463 static void snd_atiixp_codec_write(atiixp_t *chip, unsigned short codec, unsigned short reg, unsigned short val)
467 if (snd_atiixp_acquire_codec(chip) < 0)
469 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
470 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
471 ATI_REG_PHYS_OUT_ADDR_EN | codec;
472 atiixp_write(chip, PHYS_OUT_ADDR, data);
476 static unsigned short snd_atiixp_ac97_read(ac97_t *ac97, unsigned short reg)
478 atiixp_t *chip = ac97->private_data;
480 spin_lock(&chip->ac97_lock);
481 data = snd_atiixp_codec_read(chip, ac97->num, reg);
482 spin_unlock(&chip->ac97_lock);
487 static void snd_atiixp_ac97_write(ac97_t *ac97, unsigned short reg, unsigned short val)
489 atiixp_t *chip = ac97->private_data;
490 spin_lock(&chip->ac97_lock);
491 snd_atiixp_codec_write(chip, ac97->num, reg, val);
492 spin_unlock(&chip->ac97_lock);
498 static int snd_atiixp_aclink_reset(atiixp_t *chip)
502 /* reset powerdoewn */
503 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
506 /* perform a software reset */
507 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
508 atiixp_read(chip, CMD);
510 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
513 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
514 /* do a hard reset */
515 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
516 ATI_REG_CMD_AC_SYNC);
517 atiixp_read(chip, CMD);
519 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
521 snd_printk(KERN_ERR "atiixp: codec reset timeout\n");
526 /* deassert RESET and assert SYNC to make sure */
527 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
528 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
534 static int snd_atiixp_aclink_down(atiixp_t *chip)
536 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
538 atiixp_update(chip, CMD,
539 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
540 ATI_REG_CMD_POWERDOWN);
546 * auto-detection of codecs
548 * the IXP chip can generate interrupts for the non-existing codecs.
549 * NEW_FRAME interrupt is used to make sure that the interrupt is generated
550 * even if all three codecs are connected.
553 #define ALL_CODEC_NOT_READY \
554 (ATI_REG_ISR_CODEC0_NOT_READY |\
555 ATI_REG_ISR_CODEC1_NOT_READY |\
556 ATI_REG_ISR_CODEC2_NOT_READY)
557 #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
559 static int snd_atiixp_codec_detect(atiixp_t *chip)
563 chip->codec_not_ready_bits = 0;
564 atiixp_write(chip, IER, CODEC_CHECK_BITS);
565 /* wait for the interrupts */
567 while (timeout-- > 0) {
569 if (chip->codec_not_ready_bits)
572 atiixp_write(chip, IER, 0); /* disable irqs */
574 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
575 snd_printk(KERN_ERR "atiixp: no codec detected!\n");
583 * enable DMA and irqs
585 static int snd_atiixp_chip_start(atiixp_t *chip)
589 /* set up spdif, enable burst mode */
590 reg = atiixp_read(chip, CMD);
591 reg |= 0x02 << ATI_REG_CMD_SPDF_THRESHOLD_SHIFT;
592 reg |= ATI_REG_CMD_BURST_EN;
593 atiixp_write(chip, CMD, reg);
595 reg = atiixp_read(chip, SPDF_CMD);
596 reg &= ~(ATI_REG_SPDF_CMD_LFSR|ATI_REG_SPDF_CMD_SINGLE_CH);
597 atiixp_write(chip, SPDF_CMD, reg);
599 /* clear all interrupt source */
600 atiixp_write(chip, ISR, 0xffffffff);
602 atiixp_write(chip, IER,
603 ATI_REG_IER_IO_STATUS_EN |
604 ATI_REG_IER_IN_XRUN_EN |
605 ATI_REG_IER_OUT_XRUN_EN |
606 ATI_REG_IER_SPDF_XRUN_EN |
607 ATI_REG_IER_SPDF_STATUS_EN);
613 * disable DMA and IRQs
615 static int snd_atiixp_chip_stop(atiixp_t *chip)
617 /* clear interrupt source */
618 atiixp_write(chip, ISR, atiixp_read(chip, ISR));
620 atiixp_write(chip, IER, 0);
630 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
631 * position. when SG-buffer is implemented, the offset must be calculated
634 static snd_pcm_uframes_t snd_atiixp_pcm_pointer(snd_pcm_substream_t *substream)
636 atiixp_t *chip = snd_pcm_substream_chip(substream);
637 snd_pcm_runtime_t *runtime = substream->runtime;
638 atiixp_dma_t *dma = (atiixp_dma_t *)runtime->private_data;
641 spin_lock(&chip->reg_lock);
642 curptr = readl(chip->remap_addr + dma->ops->dt_cur);
643 if (curptr < dma->buf_addr) {
644 snd_printdd("curptr = %x, base = %x\n", curptr, dma->buf_addr);
647 curptr -= dma->buf_addr;
648 if (curptr >= dma->buf_bytes) {
649 snd_printdd("curptr = %x, size = %x\n", curptr, dma->buf_bytes);
653 spin_unlock(&chip->reg_lock);
654 return bytes_to_frames(runtime, curptr);
658 * XRUN detected, and stop the PCM substream
660 static void snd_atiixp_xrun_dma(atiixp_t *chip, atiixp_dma_t *dma)
662 if (! dma->substream || ! dma->running)
664 snd_printdd("atiixp: XRUN detected (DMA %d)\n", dma->ops->type);
665 snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN);
669 * the period ack. update the substream.
671 static void snd_atiixp_update_dma(atiixp_t *chip, atiixp_dma_t *dma)
673 if (! dma->substream || ! dma->running)
675 snd_pcm_period_elapsed(dma->substream);
678 /* set BUS_BUSY interrupt bit if any DMA is running */
679 /* call with spinlock held */
680 static void snd_atiixp_check_bus_busy(atiixp_t *chip)
682 unsigned int bus_busy;
683 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_SEND_EN |
684 ATI_REG_CMD_RECEIVE_EN |
685 ATI_REG_CMD_SPDF_OUT_EN))
686 bus_busy = ATI_REG_IER_SET_BUS_BUSY;
689 atiixp_update(chip, IER, ATI_REG_IER_SET_BUS_BUSY, bus_busy);
692 /* common trigger callback
693 * calling the lowlevel callbacks in it
695 static int snd_atiixp_pcm_trigger(snd_pcm_substream_t *substream, int cmd)
697 atiixp_t *chip = snd_pcm_substream_chip(substream);
698 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
701 snd_assert(dma->ops->enable_transfer && dma->ops->flush_dma, return -EINVAL);
703 spin_lock(&chip->reg_lock);
705 case SNDRV_PCM_TRIGGER_START:
706 dma->ops->enable_transfer(chip, 1);
709 case SNDRV_PCM_TRIGGER_STOP:
710 dma->ops->enable_transfer(chip, 0);
718 snd_atiixp_check_bus_busy(chip);
719 if (cmd == SNDRV_PCM_TRIGGER_STOP) {
720 dma->ops->flush_dma(chip);
721 snd_atiixp_check_bus_busy(chip);
724 spin_unlock(&chip->reg_lock);
730 * lowlevel callbacks for each DMA type
732 * every callback is supposed to be called in chip->reg_lock spinlock
735 /* flush FIFO of analog OUT DMA */
736 static void atiixp_out_flush_dma(atiixp_t *chip)
738 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH);
741 /* enable/disable analog OUT DMA */
742 static void atiixp_out_enable_dma(atiixp_t *chip, int on)
745 data = atiixp_read(chip, CMD);
747 if (data & ATI_REG_CMD_OUT_DMA_EN)
749 atiixp_out_flush_dma(chip);
750 data |= ATI_REG_CMD_OUT_DMA_EN;
752 data &= ~ATI_REG_CMD_OUT_DMA_EN;
753 atiixp_write(chip, CMD, data);
756 /* start/stop transfer over OUT DMA */
757 static void atiixp_out_enable_transfer(atiixp_t *chip, int on)
759 atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN,
760 on ? ATI_REG_CMD_SEND_EN : 0);
763 /* enable/disable analog IN DMA */
764 static void atiixp_in_enable_dma(atiixp_t *chip, int on)
766 atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN,
767 on ? ATI_REG_CMD_IN_DMA_EN : 0);
770 /* start/stop analog IN DMA */
771 static void atiixp_in_enable_transfer(atiixp_t *chip, int on)
774 unsigned int data = atiixp_read(chip, CMD);
775 if (! (data & ATI_REG_CMD_RECEIVE_EN)) {
776 data |= ATI_REG_CMD_RECEIVE_EN;
777 #if 0 /* FIXME: this causes the endless loop */
778 /* wait until slot 3/4 are finished */
779 while ((atiixp_read(chip, COUNTER) &
780 ATI_REG_COUNTER_SLOT) != 5)
783 atiixp_write(chip, CMD, data);
786 atiixp_update(chip, CMD, ATI_REG_CMD_RECEIVE_EN, 0);
789 /* flush FIFO of analog IN DMA */
790 static void atiixp_in_flush_dma(atiixp_t *chip)
792 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH);
795 /* enable/disable SPDIF OUT DMA */
796 static void atiixp_spdif_enable_dma(atiixp_t *chip, int on)
798 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN,
799 on ? ATI_REG_CMD_SPDF_DMA_EN : 0);
802 /* start/stop SPDIF OUT DMA */
803 static void atiixp_spdif_enable_transfer(atiixp_t *chip, int on)
806 data = atiixp_read(chip, CMD);
808 data |= ATI_REG_CMD_SPDF_OUT_EN;
810 data &= ~ATI_REG_CMD_SPDF_OUT_EN;
811 atiixp_write(chip, CMD, data);
814 /* flush FIFO of SPDIF OUT DMA */
815 static void atiixp_spdif_flush_dma(atiixp_t *chip)
819 /* DMA off, transfer on */
820 atiixp_spdif_enable_dma(chip, 0);
821 atiixp_spdif_enable_transfer(chip, 1);
825 if (! (atiixp_read(chip, SPDF_DMA_DT_SIZE) & ATI_REG_DMA_FIFO_USED))
828 } while (timeout-- > 0);
830 atiixp_spdif_enable_transfer(chip, 0);
833 /* set up slots and formats for SPDIF OUT */
834 static int snd_atiixp_spdif_prepare(snd_pcm_substream_t *substream)
836 atiixp_t *chip = snd_pcm_substream_chip(substream);
838 spin_lock_irq(&chip->reg_lock);
839 if (chip->spdif_over_aclink) {
841 /* enable slots 10/11 */
842 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK,
843 ATI_REG_CMD_SPDF_CONFIG_01);
844 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
845 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
846 ATI_REG_OUT_DMA_SLOT_BIT(11);
847 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
848 atiixp_write(chip, OUT_DMA_SLOT, data);
849 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
850 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
851 ATI_REG_CMD_INTERLEAVE_OUT : 0);
853 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 0);
854 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_SPDF, 0);
856 spin_unlock_irq(&chip->reg_lock);
860 /* set up slots and formats for analog OUT */
861 static int snd_atiixp_playback_prepare(snd_pcm_substream_t *substream)
863 atiixp_t *chip = snd_pcm_substream_chip(substream);
866 spin_lock_irq(&chip->reg_lock);
867 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
868 switch (substream->runtime->channels) {
870 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
871 ATI_REG_OUT_DMA_SLOT_BIT(11);
874 data |= ATI_REG_OUT_DMA_SLOT_BIT(7) |
875 ATI_REG_OUT_DMA_SLOT_BIT(8);
878 data |= ATI_REG_OUT_DMA_SLOT_BIT(6) |
879 ATI_REG_OUT_DMA_SLOT_BIT(9);
882 data |= ATI_REG_OUT_DMA_SLOT_BIT(3) |
883 ATI_REG_OUT_DMA_SLOT_BIT(4);
887 /* set output threshold */
888 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
889 atiixp_write(chip, OUT_DMA_SLOT, data);
891 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
892 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
893 ATI_REG_CMD_INTERLEAVE_OUT : 0);
896 * enable 6 channel re-ordering bit if needed
898 atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN,
899 substream->runtime->channels >= 6 ? ATI_REG_6CH_REORDER_EN: 0);
901 spin_unlock_irq(&chip->reg_lock);
905 /* set up slots and formats for analog IN */
906 static int snd_atiixp_capture_prepare(snd_pcm_substream_t *substream)
908 atiixp_t *chip = snd_pcm_substream_chip(substream);
910 spin_lock_irq(&chip->reg_lock);
911 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_IN,
912 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
913 ATI_REG_CMD_INTERLEAVE_IN : 0);
914 spin_unlock_irq(&chip->reg_lock);
919 * hw_params - allocate the buffer and set up buffer descriptors
921 static int snd_atiixp_pcm_hw_params(snd_pcm_substream_t *substream,
922 snd_pcm_hw_params_t *hw_params)
924 atiixp_t *chip = snd_pcm_substream_chip(substream);
925 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
928 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
931 dma->buf_addr = substream->runtime->dma_addr;
932 dma->buf_bytes = params_buffer_bytes(hw_params);
934 err = atiixp_build_dma_packets(chip, dma, substream,
935 params_periods(hw_params),
936 params_period_bytes(hw_params));
940 if (dma->ac97_pcm_type >= 0) {
941 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
942 /* PCM is bound to AC97 codec(s)
943 * set up the AC97 codecs
945 if (dma->pcm_open_flag) {
946 snd_ac97_pcm_close(pcm);
947 dma->pcm_open_flag = 0;
949 err = snd_ac97_pcm_open(pcm, params_rate(hw_params),
950 params_channels(hw_params),
953 dma->pcm_open_flag = 1;
959 static int snd_atiixp_pcm_hw_free(snd_pcm_substream_t * substream)
961 atiixp_t *chip = snd_pcm_substream_chip(substream);
962 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
964 if (dma->pcm_open_flag) {
965 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
966 snd_ac97_pcm_close(pcm);
967 dma->pcm_open_flag = 0;
969 atiixp_clear_dma_packets(chip, dma, substream);
970 snd_pcm_lib_free_pages(substream);
976 * pcm hardware definition, identical for all DMA types
978 static snd_pcm_hardware_t snd_atiixp_pcm_hw =
980 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
981 SNDRV_PCM_INFO_BLOCK_TRANSFER |
982 SNDRV_PCM_INFO_RESUME |
983 SNDRV_PCM_INFO_MMAP_VALID),
984 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
985 .rates = SNDRV_PCM_RATE_48000,
990 .buffer_bytes_max = 256 * 1024,
991 .period_bytes_min = 32,
992 .period_bytes_max = 128 * 1024,
994 .periods_max = ATI_MAX_DESCRIPTORS,
997 static int snd_atiixp_pcm_open(snd_pcm_substream_t *substream, atiixp_dma_t *dma, int pcm_type)
999 atiixp_t *chip = snd_pcm_substream_chip(substream);
1000 snd_pcm_runtime_t *runtime = substream->runtime;
1003 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
1007 dma->substream = substream;
1008 runtime->hw = snd_atiixp_pcm_hw;
1009 dma->ac97_pcm_type = pcm_type;
1010 if (pcm_type >= 0) {
1011 runtime->hw.rates = chip->pcms[pcm_type]->rates;
1012 snd_pcm_limit_hw_rates(runtime);
1015 runtime->hw.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE;
1017 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
1019 runtime->private_data = dma;
1021 /* enable DMA bits */
1022 spin_lock_irq(&chip->reg_lock);
1023 dma->ops->enable_dma(chip, 1);
1024 spin_unlock_irq(&chip->reg_lock);
1030 static int snd_atiixp_pcm_close(snd_pcm_substream_t *substream, atiixp_dma_t *dma)
1032 atiixp_t *chip = snd_pcm_substream_chip(substream);
1033 /* disable DMA bits */
1034 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
1035 spin_lock_irq(&chip->reg_lock);
1036 dma->ops->enable_dma(chip, 0);
1037 spin_unlock_irq(&chip->reg_lock);
1038 dma->substream = NULL;
1045 static int snd_atiixp_playback_open(snd_pcm_substream_t *substream)
1047 atiixp_t *chip = snd_pcm_substream_chip(substream);
1050 down(&chip->open_mutex);
1051 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
1052 up(&chip->open_mutex);
1055 substream->runtime->hw.channels_max = chip->max_channels;
1056 if (chip->max_channels > 2)
1057 /* channels must be even */
1058 snd_pcm_hw_constraint_step(substream->runtime, 0,
1059 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1063 static int snd_atiixp_playback_close(snd_pcm_substream_t *substream)
1065 atiixp_t *chip = snd_pcm_substream_chip(substream);
1067 down(&chip->open_mutex);
1068 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1069 up(&chip->open_mutex);
1073 static int snd_atiixp_capture_open(snd_pcm_substream_t *substream)
1075 atiixp_t *chip = snd_pcm_substream_chip(substream);
1076 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
1079 static int snd_atiixp_capture_close(snd_pcm_substream_t *substream)
1081 atiixp_t *chip = snd_pcm_substream_chip(substream);
1082 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
1085 static int snd_atiixp_spdif_open(snd_pcm_substream_t *substream)
1087 atiixp_t *chip = snd_pcm_substream_chip(substream);
1089 down(&chip->open_mutex);
1090 if (chip->spdif_over_aclink) /* share DMA_PLAYBACK */
1091 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 2);
1093 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_SPDIF], -1);
1094 up(&chip->open_mutex);
1098 static int snd_atiixp_spdif_close(snd_pcm_substream_t *substream)
1100 atiixp_t *chip = snd_pcm_substream_chip(substream);
1102 down(&chip->open_mutex);
1103 if (chip->spdif_over_aclink)
1104 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1106 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_SPDIF]);
1107 up(&chip->open_mutex);
1112 static snd_pcm_ops_t snd_atiixp_playback_ops = {
1113 .open = snd_atiixp_playback_open,
1114 .close = snd_atiixp_playback_close,
1115 .ioctl = snd_pcm_lib_ioctl,
1116 .hw_params = snd_atiixp_pcm_hw_params,
1117 .hw_free = snd_atiixp_pcm_hw_free,
1118 .prepare = snd_atiixp_playback_prepare,
1119 .trigger = snd_atiixp_pcm_trigger,
1120 .pointer = snd_atiixp_pcm_pointer,
1124 static snd_pcm_ops_t snd_atiixp_capture_ops = {
1125 .open = snd_atiixp_capture_open,
1126 .close = snd_atiixp_capture_close,
1127 .ioctl = snd_pcm_lib_ioctl,
1128 .hw_params = snd_atiixp_pcm_hw_params,
1129 .hw_free = snd_atiixp_pcm_hw_free,
1130 .prepare = snd_atiixp_capture_prepare,
1131 .trigger = snd_atiixp_pcm_trigger,
1132 .pointer = snd_atiixp_pcm_pointer,
1135 /* SPDIF playback */
1136 static snd_pcm_ops_t snd_atiixp_spdif_ops = {
1137 .open = snd_atiixp_spdif_open,
1138 .close = snd_atiixp_spdif_close,
1139 .ioctl = snd_pcm_lib_ioctl,
1140 .hw_params = snd_atiixp_pcm_hw_params,
1141 .hw_free = snd_atiixp_pcm_hw_free,
1142 .prepare = snd_atiixp_spdif_prepare,
1143 .trigger = snd_atiixp_pcm_trigger,
1144 .pointer = snd_atiixp_pcm_pointer,
1147 static struct ac97_pcm atiixp_pcm_defs[] __devinitdata = {
1152 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1153 (1 << AC97_SLOT_PCM_RIGHT) |
1154 (1 << AC97_SLOT_PCM_CENTER) |
1155 (1 << AC97_SLOT_PCM_SLEFT) |
1156 (1 << AC97_SLOT_PCM_SRIGHT) |
1157 (1 << AC97_SLOT_LFE)
1166 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1167 (1 << AC97_SLOT_PCM_RIGHT)
1171 /* S/PDIF OUT (optional) */
1176 .slots = (1 << AC97_SLOT_SPDIF_LEFT2) |
1177 (1 << AC97_SLOT_SPDIF_RIGHT2)
1183 static atiixp_dma_ops_t snd_atiixp_playback_dma_ops = {
1184 .type = ATI_DMA_PLAYBACK,
1185 .llp_offset = ATI_REG_OUT_DMA_LINKPTR,
1186 .dt_cur = ATI_REG_OUT_DMA_DT_CUR,
1187 .enable_dma = atiixp_out_enable_dma,
1188 .enable_transfer = atiixp_out_enable_transfer,
1189 .flush_dma = atiixp_out_flush_dma,
1192 static atiixp_dma_ops_t snd_atiixp_capture_dma_ops = {
1193 .type = ATI_DMA_CAPTURE,
1194 .llp_offset = ATI_REG_IN_DMA_LINKPTR,
1195 .dt_cur = ATI_REG_IN_DMA_DT_CUR,
1196 .enable_dma = atiixp_in_enable_dma,
1197 .enable_transfer = atiixp_in_enable_transfer,
1198 .flush_dma = atiixp_in_flush_dma,
1201 static atiixp_dma_ops_t snd_atiixp_spdif_dma_ops = {
1202 .type = ATI_DMA_SPDIF,
1203 .llp_offset = ATI_REG_SPDF_DMA_LINKPTR,
1204 .dt_cur = ATI_REG_SPDF_DMA_DT_CUR,
1205 .enable_dma = atiixp_spdif_enable_dma,
1206 .enable_transfer = atiixp_spdif_enable_transfer,
1207 .flush_dma = atiixp_spdif_flush_dma,
1211 static int __devinit snd_atiixp_pcm_new(atiixp_t *chip)
1214 ac97_bus_t *pbus = chip->ac97_bus;
1215 int err, i, num_pcms;
1217 /* initialize constants */
1218 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
1219 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
1220 if (! chip->spdif_over_aclink)
1221 chip->dmas[ATI_DMA_SPDIF].ops = &snd_atiixp_spdif_dma_ops;
1223 /* assign AC97 pcm */
1224 if (chip->spdif_over_aclink)
1228 err = snd_ac97_pcm_assign(pbus, num_pcms, atiixp_pcm_defs);
1231 for (i = 0; i < num_pcms; i++)
1232 chip->pcms[i] = &pbus->pcms[i];
1234 chip->max_channels = 2;
1235 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_PCM_SLEFT)) {
1236 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_LFE))
1237 chip->max_channels = 6;
1239 chip->max_channels = 4;
1242 /* PCM #0: analog I/O */
1243 err = snd_pcm_new(chip->card, "ATI IXP AC97", ATI_PCMDEV_ANALOG, 1, 1, &pcm);
1246 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
1247 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
1248 pcm->private_data = chip;
1249 strcpy(pcm->name, "ATI IXP AC97");
1250 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
1252 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1253 snd_dma_pci_data(chip->pci), 64*1024, 128*1024);
1255 /* no SPDIF support on codec? */
1256 if (chip->pcms[ATI_PCM_SPDIF] && ! chip->pcms[ATI_PCM_SPDIF]->rates)
1259 /* FIXME: non-48k sample rate doesn't work on my test machine with AD1888 */
1260 if (chip->pcms[ATI_PCM_SPDIF])
1261 chip->pcms[ATI_PCM_SPDIF]->rates = SNDRV_PCM_RATE_48000;
1263 /* PCM #1: spdif playback */
1264 err = snd_pcm_new(chip->card, "ATI IXP IEC958", ATI_PCMDEV_DIGITAL, 1, 0, &pcm);
1267 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_spdif_ops);
1268 pcm->private_data = chip;
1269 if (chip->spdif_over_aclink)
1270 strcpy(pcm->name, "ATI IXP IEC958 (AC97)");
1272 strcpy(pcm->name, "ATI IXP IEC958 (Direct)");
1273 chip->pcmdevs[ATI_PCMDEV_DIGITAL] = pcm;
1275 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1276 snd_dma_pci_data(chip->pci), 64*1024, 128*1024);
1278 /* pre-select AC97 SPDIF slots 10/11 */
1279 for (i = 0; i < NUM_ATI_CODECS; i++) {
1281 snd_ac97_update_bits(chip->ac97[i], AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4);
1292 static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1294 atiixp_t *chip = dev_id;
1295 unsigned int status;
1297 status = atiixp_read(chip, ISR);
1302 /* process audio DMA */
1303 if (status & ATI_REG_ISR_OUT_XRUN)
1304 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1305 else if (status & ATI_REG_ISR_OUT_STATUS)
1306 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1307 if (status & ATI_REG_ISR_IN_XRUN)
1308 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1309 else if (status & ATI_REG_ISR_IN_STATUS)
1310 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1311 if (! chip->spdif_over_aclink) {
1312 if (status & ATI_REG_ISR_SPDF_XRUN)
1313 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1314 else if (status & ATI_REG_ISR_SPDF_STATUS)
1315 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1318 /* for codec detection */
1319 if (status & CODEC_CHECK_BITS) {
1320 unsigned int detected;
1321 detected = status & CODEC_CHECK_BITS;
1322 spin_lock(&chip->reg_lock);
1323 chip->codec_not_ready_bits |= detected;
1324 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
1325 spin_unlock(&chip->reg_lock);
1329 atiixp_write(chip, ISR, status);
1336 * ac97 mixer section
1339 static int __devinit snd_atiixp_mixer_new(atiixp_t *chip, int clock)
1342 ac97_template_t ac97;
1345 static ac97_bus_ops_t ops = {
1346 .write = snd_atiixp_ac97_write,
1347 .read = snd_atiixp_ac97_read,
1349 static unsigned int codec_skip[NUM_ATI_CODECS] = {
1350 ATI_REG_ISR_CODEC0_NOT_READY,
1351 ATI_REG_ISR_CODEC1_NOT_READY,
1352 ATI_REG_ISR_CODEC2_NOT_READY,
1355 if (snd_atiixp_codec_detect(chip) < 0)
1358 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
1360 pbus->clock = clock;
1361 pbus->shared_type = AC97_SHARED_TYPE_ATIIXP; /* shared with modem driver */
1362 chip->ac97_bus = pbus;
1365 for (i = 0; i < NUM_ATI_CODECS; i++) {
1366 if (chip->codec_not_ready_bits & codec_skip[i])
1368 memset(&ac97, 0, sizeof(ac97));
1369 ac97.private_data = chip;
1370 ac97.pci = chip->pci;
1372 ac97.scaps = AC97_SCAP_SKIP_MODEM;
1373 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
1374 chip->ac97[i] = NULL; /* to be sure */
1375 snd_printdd("atiixp: codec %d not available for audio\n", i);
1381 if (! codec_count) {
1382 snd_printk(KERN_ERR "atiixp: no codec available\n");
1386 /* snd_ac97_tune_hardware(chip->ac97, ac97_quirks); */
1396 static int snd_atiixp_suspend(snd_card_t *card, unsigned int state)
1398 atiixp_t *chip = card->pm_private_data;
1401 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1402 if (chip->pcmdevs[i])
1403 snd_pcm_suspend_all(chip->pcmdevs[i]);
1404 for (i = 0; i < NUM_ATI_CODECS; i++)
1406 snd_ac97_suspend(chip->ac97[i]);
1407 snd_atiixp_aclink_down(chip);
1408 snd_atiixp_chip_stop(chip);
1410 pci_set_power_state(chip->pci, 3);
1411 pci_disable_device(chip->pci);
1412 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1416 static int snd_atiixp_resume(snd_card_t *card, unsigned int state)
1418 atiixp_t *chip = card->pm_private_data;
1421 pci_enable_device(chip->pci);
1422 pci_set_power_state(chip->pci, 0);
1423 pci_set_master(chip->pci);
1425 snd_atiixp_aclink_reset(chip);
1426 snd_atiixp_chip_start(chip);
1428 for (i = 0; i < NUM_ATI_CODECS; i++)
1430 snd_ac97_resume(chip->ac97[i]);
1432 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1435 #endif /* CONFIG_PM */
1439 * proc interface for register dump
1442 static void snd_atiixp_proc_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
1444 atiixp_t *chip = entry->private_data;
1447 for (i = 0; i < 256; i += 4)
1448 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
1451 static void __devinit snd_atiixp_proc_init(atiixp_t *chip)
1453 snd_info_entry_t *entry;
1455 if (! snd_card_proc_new(chip->card, "atiixp", &entry))
1456 snd_info_set_text_ops(entry, chip, 1024, snd_atiixp_proc_read);
1465 static int snd_atiixp_free(atiixp_t *chip)
1469 snd_atiixp_chip_stop(chip);
1470 synchronize_irq(chip->irq);
1473 free_irq(chip->irq, (void *)chip);
1474 if (chip->remap_addr)
1475 iounmap(chip->remap_addr);
1476 pci_release_regions(chip->pci);
1477 pci_disable_device(chip->pci);
1482 static int snd_atiixp_dev_free(snd_device_t *device)
1484 atiixp_t *chip = device->device_data;
1485 return snd_atiixp_free(chip);
1489 * constructor for chip instance
1491 static int __devinit snd_atiixp_create(snd_card_t *card,
1492 struct pci_dev *pci,
1495 static snd_device_ops_t ops = {
1496 .dev_free = snd_atiixp_dev_free,
1501 if ((err = pci_enable_device(pci)) < 0)
1504 chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
1506 pci_disable_device(pci);
1510 spin_lock_init(&chip->reg_lock);
1511 spin_lock_init(&chip->ac97_lock);
1512 init_MUTEX(&chip->open_mutex);
1516 if ((err = pci_request_regions(pci, "ATI IXP AC97")) < 0) {
1517 pci_disable_device(pci);
1521 chip->addr = pci_resource_start(pci, 0);
1522 chip->remap_addr = ioremap_nocache(chip->addr, pci_resource_len(pci, 0));
1523 if (chip->remap_addr == NULL) {
1524 snd_printk(KERN_ERR "AC'97 space ioremap problem\n");
1525 snd_atiixp_free(chip);
1529 if (request_irq(pci->irq, snd_atiixp_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
1530 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1531 snd_atiixp_free(chip);
1534 chip->irq = pci->irq;
1535 pci_set_master(pci);
1536 synchronize_irq(chip->irq);
1538 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1539 snd_atiixp_free(chip);
1543 snd_card_set_dev(card, &pci->dev);
1550 static int __devinit snd_atiixp_probe(struct pci_dev *pci,
1551 const struct pci_device_id *pci_id)
1556 unsigned char revision;
1559 if (dev >= SNDRV_CARDS)
1566 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1570 pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
1572 strcpy(card->driver, spdif_aclink[dev] ? "ATIIXP" : "ATIIXP-SPDMA");
1573 strcpy(card->shortname, "ATI IXP");
1574 if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
1577 if ((err = snd_atiixp_aclink_reset(chip)) < 0)
1580 chip->spdif_over_aclink = spdif_aclink[dev];
1582 if ((err = snd_atiixp_mixer_new(chip, ac97_clock[dev])) < 0)
1585 if ((err = snd_atiixp_pcm_new(chip)) < 0)
1588 snd_atiixp_proc_init(chip);
1590 snd_atiixp_chip_start(chip);
1592 snprintf(card->longname, sizeof(card->longname),
1593 "%s rev %x with %s at %#lx, irq %i", card->shortname, revision,
1594 chip->ac97[0] ? snd_ac97_get_short_name(chip->ac97[0]) : "?",
1595 chip->addr, chip->irq);
1597 snd_card_set_pm_callback(card, snd_atiixp_suspend, snd_atiixp_resume, chip);
1599 if ((err = snd_card_register(card)) < 0)
1602 pci_set_drvdata(pci, card);
1607 snd_card_free(card);
1611 static void __devexit snd_atiixp_remove(struct pci_dev *pci)
1613 snd_card_free(pci_get_drvdata(pci));
1614 pci_set_drvdata(pci, NULL);
1617 static struct pci_driver driver = {
1618 .name = "ATI IXP AC97 controller",
1619 .id_table = snd_atiixp_ids,
1620 .probe = snd_atiixp_probe,
1621 .remove = __devexit_p(snd_atiixp_remove),
1622 SND_PCI_PM_CALLBACKS
1626 static int __init alsa_card_atiixp_init(void)
1628 return pci_module_init(&driver);
1631 static void __exit alsa_card_atiixp_exit(void)
1633 pci_unregister_driver(&driver);
1636 module_init(alsa_card_atiixp_init)
1637 module_exit(alsa_card_atiixp_exit)