2 * ALSA driver for ATI IXP 150/200/250 AC97 controllers
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <sound/driver.h>
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
26 #include <linux/init.h>
27 #include <linux/pci.h>
28 #include <linux/slab.h>
29 #include <linux/moduleparam.h>
30 #include <sound/core.h>
31 #include <sound/pcm.h>
32 #include <sound/pcm_params.h>
33 #include <sound/info.h>
34 #include <sound/ac97_codec.h>
35 #include <sound/initval.h>
37 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
38 MODULE_DESCRIPTION("ATI IXP AC97 controller");
39 MODULE_LICENSE("GPL");
40 MODULE_CLASSES("{sound}");
41 MODULE_DEVICES("{{ATI,IXP150/200/250/300}}");
43 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
44 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
45 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
46 static int ac97_clock[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 48000};
47 static int spdif_aclink[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1};
50 module_param_array(index, int, boot_devs, 0444);
51 MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
52 MODULE_PARM_SYNTAX(index, SNDRV_INDEX_DESC);
53 module_param_array(id, charp, boot_devs, 0444);
54 MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
55 MODULE_PARM_SYNTAX(id, SNDRV_ID_DESC);
56 module_param_array(enable, bool, boot_devs, 0444);
57 MODULE_PARM_DESC(enable, "Enable audio part of ATI IXP controller.");
58 MODULE_PARM_SYNTAX(enable, SNDRV_ENABLE_DESC);
59 module_param_array(ac97_clock, int, boot_devs, 0444);
60 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
61 MODULE_PARM_SYNTAX(ac97_clock, SNDRV_ENABLED ",default:48000");
62 module_param_array(spdif_aclink, bool, boot_devs, 0444);
63 MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link.");
64 MODULE_PARM_SYNTAX(spdif_aclink, SNDRV_ENABLED "," SNDRV_BOOLEAN_TRUE_DESC);
70 #define ATI_REG_ISR 0x00 /* interrupt source */
71 #define ATI_REG_ISR_IN_XRUN (1U<<0)
72 #define ATI_REG_ISR_IN_STATUS (1U<<1)
73 #define ATI_REG_ISR_OUT_XRUN (1U<<2)
74 #define ATI_REG_ISR_OUT_STATUS (1U<<3)
75 #define ATI_REG_ISR_SPDF_XRUN (1U<<4)
76 #define ATI_REG_ISR_SPDF_STATUS (1U<<5)
77 #define ATI_REG_ISR_PHYS_INTR (1U<<8)
78 #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
79 #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
80 #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
81 #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
82 #define ATI_REG_ISR_NEW_FRAME (1U<<13)
84 #define ATI_REG_IER 0x04 /* interrupt enable */
85 #define ATI_REG_IER_IN_XRUN_EN (1U<<0)
86 #define ATI_REG_IER_IO_STATUS_EN (1U<<1)
87 #define ATI_REG_IER_OUT_XRUN_EN (1U<<2)
88 #define ATI_REG_IER_OUT_XRUN_COND (1U<<3)
89 #define ATI_REG_IER_SPDF_XRUN_EN (1U<<4)
90 #define ATI_REG_IER_SPDF_STATUS_EN (1U<<5)
91 #define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
92 #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
93 #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
94 #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
95 #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
96 #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
97 #define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */
99 #define ATI_REG_CMD 0x08 /* command */
100 #define ATI_REG_CMD_POWERDOWN (1U<<0)
101 #define ATI_REG_CMD_RECEIVE_EN (1U<<1)
102 #define ATI_REG_CMD_SEND_EN (1U<<2)
103 #define ATI_REG_CMD_STATUS_MEM (1U<<3)
104 #define ATI_REG_CMD_SPDF_OUT_EN (1U<<4)
105 #define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5)
106 #define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6)
107 #define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6
108 #define ATI_REG_CMD_IN_DMA_EN (1U<<8)
109 #define ATI_REG_CMD_OUT_DMA_EN (1U<<9)
110 #define ATI_REG_CMD_SPDF_DMA_EN (1U<<10)
111 #define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11)
112 #define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12)
113 #define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12)
114 #define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12)
115 #define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12)
116 #define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12)
117 #define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16)
118 #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
119 #define ATI_REG_CMD_INTERLEAVE_IN (1U<<21)
120 #define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22)
121 #define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
122 #define ATI_REG_CMD_PACKED_DIS (1U<<24)
123 #define ATI_REG_CMD_BURST_EN (1U<<25)
124 #define ATI_REG_CMD_PANIC_EN (1U<<26)
125 #define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
126 #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
127 #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
128 #define ATI_REG_CMD_AC_SYNC (1U<<30)
129 #define ATI_REG_CMD_AC_RESET (1U<<31)
131 #define ATI_REG_PHYS_OUT_ADDR 0x0c
132 #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
133 #define ATI_REG_PHYS_OUT_RW (1U<<2)
134 #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
135 #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
136 #define ATI_REG_PHYS_OUT_DATA_SHIFT 16
138 #define ATI_REG_PHYS_IN_ADDR 0x10
139 #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
140 #define ATI_REG_PHYS_IN_ADDR_SHIFT 9
141 #define ATI_REG_PHYS_IN_DATA_SHIFT 16
143 #define ATI_REG_SLOTREQ 0x14
145 #define ATI_REG_COUNTER 0x18
146 #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
147 #define ATI_REG_COUNTER_BITCLOCK (31U<<8)
149 #define ATI_REG_IN_FIFO_THRESHOLD 0x1c
151 #define ATI_REG_IN_DMA_LINKPTR 0x20
152 #define ATI_REG_IN_DMA_DT_START 0x24 /* RO */
153 #define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */
154 #define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */
155 #define ATI_REG_IN_DMA_DT_SIZE 0x30
157 #define ATI_REG_OUT_DMA_SLOT 0x34
158 #define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3))
159 #define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff
160 #define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800
161 #define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11
163 #define ATI_REG_OUT_DMA_LINKPTR 0x38
164 #define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */
165 #define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */
166 #define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */
167 #define ATI_REG_OUT_DMA_DT_SIZE 0x48
169 #define ATI_REG_SPDF_CMD 0x4c
170 #define ATI_REG_SPDF_CMD_LFSR (1U<<4)
171 #define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5)
172 #define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */
174 #define ATI_REG_SPDF_DMA_LINKPTR 0x50
175 #define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */
176 #define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */
177 #define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */
178 #define ATI_REG_SPDF_DMA_DT_SIZE 0x60
180 #define ATI_REG_MODEM_MIRROR 0x7c
181 #define ATI_REG_AUDIO_MIRROR 0x80
183 #define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */
184 #define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */
186 #define ATI_REG_FIFO_FLUSH 0x88
187 #define ATI_REG_FIFO_OUT_FLUSH (1U<<0)
188 #define ATI_REG_FIFO_IN_FLUSH (1U<<1)
191 #define ATI_REG_LINKPTR_EN (1U<<0)
193 /* [INT|OUT|SPDIF]_DMA_DT_SIZE */
194 #define ATI_REG_DMA_DT_SIZE (0xffffU<<0)
195 #define ATI_REG_DMA_FIFO_USED (0x1fU<<16)
196 #define ATI_REG_DMA_FIFO_FREE (0x1fU<<21)
197 #define ATI_REG_DMA_STATE (7U<<26)
200 #define ATI_MEM_REGION 256 /* i/o memory size */
201 #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
207 typedef struct snd_atiixp atiixp_t;
208 typedef struct snd_atiixp_dma atiixp_dma_t;
209 typedef struct snd_atiixp_dma_ops atiixp_dma_ops_t;
210 #define chip_t atiixp_t
214 * DMA packate descriptor
217 typedef struct atiixp_dma_desc {
218 u32 addr; /* DMA buffer address */
219 u16 status; /* status bits */
220 u16 size; /* size of the packet in dwords */
221 u32 next; /* address of the next packet descriptor */
227 enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, ATI_DMA_SPDIF, NUM_ATI_DMAS }; /* DMAs */
228 enum { ATI_PCM_OUT, ATI_PCM_IN, ATI_PCM_SPDIF, NUM_ATI_PCMS }; /* AC97 pcm slots */
229 enum { ATI_PCMDEV_ANALOG, ATI_PCMDEV_DIGITAL, NUM_ATI_PCMDEVS }; /* pcm devices */
231 #define NUM_ATI_CODECS 3
235 * constants and callbacks for each DMA type
237 struct snd_atiixp_dma_ops {
238 int type; /* ATI_DMA_XXX */
239 unsigned int llp_offset; /* LINKPTR offset */
240 unsigned int dt_cur; /* DT_CUR offset */
241 void (*enable_dma)(atiixp_t *chip, int on); /* called from open callback */
242 void (*enable_transfer)(atiixp_t *chip, int on); /* called from trigger (START/STOP) */
243 void (*flush_dma)(atiixp_t *chip); /* called from trigger (STOP only) */
249 struct snd_atiixp_dma {
250 const atiixp_dma_ops_t *ops;
251 struct snd_dma_device desc_dev;
252 struct snd_dma_buffer desc_buf;
253 snd_pcm_substream_t *substream; /* assigned PCM substream */
254 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
255 unsigned int period_bytes, periods;
259 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
269 struct resource *res; /* memory i/o */
271 unsigned long remap_addr;
274 ac97_bus_t *ac97_bus;
275 ac97_t *ac97[NUM_ATI_CODECS];
278 spinlock_t ac97_lock;
280 atiixp_dma_t dmas[NUM_ATI_DMAS];
281 struct ac97_pcm *pcms[NUM_ATI_PCMS];
282 snd_pcm_t *pcmdevs[NUM_ATI_PCMDEVS];
284 int max_channels; /* max. channels for PCM out */
286 unsigned int codec_not_ready_bits; /* for codec detection */
288 int spdif_over_aclink; /* passed from the module option */
289 struct semaphore open_mutex; /* playback open mutex */
299 static struct pci_device_id snd_atiixp_ids[] = {
300 { 0x1002, 0x4341, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB200 */
301 { 0x1002, 0x4361, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB300 */
305 MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
313 * update the bits of the given register.
314 * return 1 if the bits changed.
316 static int snd_atiixp_update_bits(atiixp_t *chip, unsigned int reg,
317 unsigned int mask, unsigned int value)
319 unsigned long addr = chip->remap_addr + reg;
320 unsigned int data, old_data;
321 old_data = data = readl(addr);
324 if (old_data == data)
331 * macros for easy use
333 #define atiixp_write(chip,reg,value) \
334 writel(value, chip->remap_addr + ATI_REG_##reg)
335 #define atiixp_read(chip,reg) \
336 readl(chip->remap_addr + ATI_REG_##reg)
337 #define atiixp_update(chip,reg,mask,val) \
338 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
340 /* delay for one tick */
341 #define do_delay() do { \
342 set_current_state(TASK_UNINTERRUPTIBLE); \
343 schedule_timeout(1); \
348 * handling DMA packets
350 * we allocate a linear buffer for the DMA, and split it to each packet.
351 * in a future version, a scatter-gather buffer should be implemented.
354 #define ATI_DESC_LIST_SIZE \
355 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(atiixp_dma_desc_t))
358 * build packets ring for the given buffer size.
360 * IXP handles the buffer descriptors, which are connected as a linked
361 * list. although we can change the list dynamically, in this version,
362 * a static RING of buffer descriptors is used.
364 * the ring is built in this function, and is set up to the hardware.
366 static int atiixp_build_dma_packets(atiixp_t *chip, atiixp_dma_t *dma,
367 snd_pcm_substream_t *substream,
368 unsigned int periods,
369 unsigned int period_bytes)
375 if (periods > ATI_MAX_DESCRIPTORS)
378 if (dma->desc_buf.area == NULL) {
379 memset(&dma->desc_dev, 0, sizeof(dma->desc_dev));
380 dma->desc_dev.type = SNDRV_DMA_TYPE_DEV;
381 dma->desc_dev.dev = snd_dma_pci_data(chip->pci);
382 if (snd_dma_alloc_pages(&dma->desc_dev, ATI_DESC_LIST_SIZE, &dma->desc_buf) < 0)
384 dma->period_bytes = dma->periods = 0; /* clear */
387 if (dma->periods == dma->periods && dma->period_bytes == period_bytes)
390 /* reset DMA before changing the descriptor table */
391 spin_lock_irqsave(&chip->reg_lock, flags);
392 writel(0, chip->remap_addr + dma->ops->llp_offset);
393 dma->ops->enable_dma(chip, 0);
394 dma->ops->enable_dma(chip, 1);
395 spin_unlock_irqrestore(&chip->reg_lock, flags);
397 /* fill the entries */
398 addr = (u32)substream->runtime->dma_addr;
399 desc_addr = (u32)dma->desc_buf.addr;
400 for (i = 0; i < periods; i++) {
401 atiixp_dma_desc_t *desc = &((atiixp_dma_desc_t *)dma->desc_buf.area)[i];
402 desc->addr = cpu_to_le32(addr);
404 desc->size = period_bytes >> 2; /* in dwords */
405 desc_addr += sizeof(atiixp_dma_desc_t);
406 if (i == periods - 1)
407 desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
409 desc->next = cpu_to_le32(desc_addr);
410 addr += period_bytes;
413 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
414 chip->remap_addr + dma->ops->llp_offset);
416 dma->period_bytes = period_bytes;
417 dma->periods = periods;
423 * remove the ring buffer and release it if assigned
425 static void atiixp_clear_dma_packets(atiixp_t *chip, atiixp_dma_t *dma, snd_pcm_substream_t *substream)
427 if (dma->desc_buf.area) {
428 writel(0, chip->remap_addr + dma->ops->llp_offset);
429 snd_dma_free_pages(&dma->desc_dev, &dma->desc_buf);
430 dma->desc_buf.area = NULL;
437 static int snd_atiixp_acquire_codec(atiixp_t *chip)
441 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
443 snd_printk(KERN_WARNING "atiixp: codec acquire timeout\n");
451 static unsigned short snd_atiixp_codec_read(atiixp_t *chip, unsigned short codec, unsigned short reg)
456 if (snd_atiixp_acquire_codec(chip) < 0)
458 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
459 ATI_REG_PHYS_OUT_ADDR_EN |
460 ATI_REG_PHYS_OUT_RW |
462 atiixp_write(chip, PHYS_OUT_ADDR, data);
463 if (snd_atiixp_acquire_codec(chip) < 0)
467 data = atiixp_read(chip, PHYS_IN_ADDR);
468 if (data & ATI_REG_PHYS_IN_READ_FLAG)
469 return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
472 /* time out may happen during reset */
474 snd_printk(KERN_WARNING "atiixp: codec read timeout (reg %x)\n", reg);
479 static void snd_atiixp_codec_write(atiixp_t *chip, unsigned short codec, unsigned short reg, unsigned short val)
483 if (snd_atiixp_acquire_codec(chip) < 0)
485 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
486 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
487 ATI_REG_PHYS_OUT_ADDR_EN | codec;
488 atiixp_write(chip, PHYS_OUT_ADDR, data);
492 static unsigned short snd_atiixp_ac97_read(ac97_t *ac97, unsigned short reg)
494 atiixp_t *chip = snd_magic_cast(atiixp_t, ac97->private_data, return 0xffff);
496 spin_lock(&chip->ac97_lock);
497 data = snd_atiixp_codec_read(chip, ac97->num, reg);
498 spin_unlock(&chip->ac97_lock);
503 static void snd_atiixp_ac97_write(ac97_t *ac97, unsigned short reg, unsigned short val)
505 atiixp_t *chip = snd_magic_cast(atiixp_t, ac97->private_data, return);
506 spin_lock(&chip->ac97_lock);
507 snd_atiixp_codec_write(chip, ac97->num, reg, val);
508 spin_unlock(&chip->ac97_lock);
514 static int snd_atiixp_aclink_reset(atiixp_t *chip)
518 /* reset powerdoewn */
519 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
522 /* perform a software reset */
523 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
524 atiixp_read(chip, CMD);
526 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
529 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
530 /* do a hard reset */
531 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
532 ATI_REG_CMD_AC_SYNC);
533 atiixp_read(chip, CMD);
535 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
537 snd_printk(KERN_ERR "atiixp: codec reset timeout\n");
542 /* deassert RESET and assert SYNC to make sure */
543 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
544 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
550 static int snd_atiixp_aclink_down(atiixp_t *chip)
552 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
554 atiixp_update(chip, CMD,
555 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
556 ATI_REG_CMD_POWERDOWN);
562 * auto-detection of codecs
564 * the IXP chip can generate interrupts for the non-existing codecs.
565 * NEW_FRAME interrupt is used to make sure that the interrupt is generated
566 * even if all three codecs are connected.
569 #define ALL_CODEC_NOT_READY \
570 (ATI_REG_ISR_CODEC0_NOT_READY |\
571 ATI_REG_ISR_CODEC1_NOT_READY |\
572 ATI_REG_ISR_CODEC2_NOT_READY)
573 #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
575 static int snd_atiixp_codec_detect(atiixp_t *chip)
579 chip->codec_not_ready_bits = 0;
580 atiixp_write(chip, IER, CODEC_CHECK_BITS);
581 /* wait for the interrupts */
583 while (timeout-- > 0) {
585 if (chip->codec_not_ready_bits)
588 atiixp_write(chip, IER, 0); /* disable irqs */
590 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
591 snd_printk(KERN_ERR "atiixp: no codec detected!\n");
599 * enable DMA and irqs
601 static int snd_atiixp_chip_start(atiixp_t *chip)
605 /* set up spdif, enable burst mode */
606 reg = atiixp_read(chip, CMD);
607 reg |= 0x02 << ATI_REG_CMD_SPDF_THRESHOLD_SHIFT;
608 reg |= ATI_REG_CMD_BURST_EN;
609 atiixp_write(chip, CMD, reg);
611 reg = atiixp_read(chip, SPDF_CMD);
612 reg &= ~(ATI_REG_SPDF_CMD_LFSR|ATI_REG_SPDF_CMD_SINGLE_CH);
613 atiixp_write(chip, SPDF_CMD, reg);
615 /* clear all interrupt source */
616 atiixp_write(chip, ISR, 0xffffffff);
618 atiixp_write(chip, IER,
619 ATI_REG_IER_IO_STATUS_EN |
620 ATI_REG_IER_IN_XRUN_EN |
621 ATI_REG_IER_OUT_XRUN_EN |
622 ATI_REG_IER_SPDF_XRUN_EN |
623 ATI_REG_IER_SPDF_STATUS_EN);
629 * disable DMA and IRQs
631 static int snd_atiixp_chip_stop(atiixp_t *chip)
633 /* clear interrupt source */
634 atiixp_write(chip, ISR, atiixp_read(chip, ISR));
636 atiixp_write(chip, IER, 0);
646 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
647 * position. when SG-buffer is implemented, the offset must be calculated
650 static snd_pcm_uframes_t snd_atiixp_pcm_pointer(snd_pcm_substream_t *substream)
652 atiixp_t *chip = snd_pcm_substream_chip(substream);
653 snd_pcm_runtime_t *runtime = substream->runtime;
654 atiixp_dma_t *dma = (atiixp_dma_t *)runtime->private_data;
658 spin_lock_irqsave(&chip->reg_lock, flags);
659 curptr = readl(chip->remap_addr + dma->ops->dt_cur);
660 if (curptr < dma->buf_addr) {
661 snd_printdd("curptr = %x, base = %x\n", curptr, dma->buf_addr);
664 curptr -= dma->buf_addr;
665 if (curptr >= dma->buf_bytes) {
666 snd_printdd("curptr = %x, size = %x\n", curptr, dma->buf_bytes);
670 spin_unlock_irqrestore(&chip->reg_lock, flags);
671 return bytes_to_frames(runtime, curptr);
675 * XRUN detected, and stop the PCM substream
677 static void snd_atiixp_xrun_dma(atiixp_t *chip, atiixp_dma_t *dma)
679 if (! dma->substream || ! dma->running)
681 snd_printdd("atiixp: XRUN detected (DMA %d)\n", dma->ops->type);
682 snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN);
686 * the period ack. update the substream.
688 static void snd_atiixp_update_dma(atiixp_t *chip, atiixp_dma_t *dma)
690 if (! dma->substream || ! dma->running)
692 snd_pcm_period_elapsed(dma->substream);
695 /* set BUS_BUSY interrupt bit if any DMA is running */
696 /* call with spinlock held */
697 static void snd_atiixp_check_bus_busy(atiixp_t *chip)
699 unsigned int bus_busy;
700 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_SEND_EN |
701 ATI_REG_CMD_RECEIVE_EN |
702 ATI_REG_CMD_SPDF_OUT_EN))
703 bus_busy = ATI_REG_IER_SET_BUS_BUSY;
706 atiixp_update(chip, IER, ATI_REG_IER_SET_BUS_BUSY, bus_busy);
709 /* common trigger callback
710 * calling the lowlevel callbacks in it
712 static int snd_atiixp_pcm_trigger(snd_pcm_substream_t *substream, int cmd)
714 atiixp_t *chip = snd_pcm_substream_chip(substream);
715 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
718 snd_assert(dma->ops->enable_transfer && dma->ops->flush_dma, return -EINVAL);
720 spin_lock(&chip->reg_lock);
722 case SNDRV_PCM_TRIGGER_START:
723 dma->ops->enable_transfer(chip, 1);
726 case SNDRV_PCM_TRIGGER_STOP:
727 dma->ops->enable_transfer(chip, 0);
735 snd_atiixp_check_bus_busy(chip);
736 if (cmd == SNDRV_PCM_TRIGGER_STOP) {
737 dma->ops->flush_dma(chip);
738 snd_atiixp_check_bus_busy(chip);
741 spin_unlock(&chip->reg_lock);
747 * lowlevel callbacks for each DMA type
749 * every callback is supposed to be called in chip->reg_lock spinlock
752 /* flush FIFO of analog OUT DMA */
753 static void atiixp_out_flush_dma(atiixp_t *chip)
755 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH);
758 /* enable/disable analog OUT DMA */
759 static void atiixp_out_enable_dma(atiixp_t *chip, int on)
762 data = atiixp_read(chip, CMD);
764 if (data & ATI_REG_CMD_OUT_DMA_EN)
766 atiixp_out_flush_dma(chip);
767 data |= ATI_REG_CMD_OUT_DMA_EN;
769 data &= ~ATI_REG_CMD_OUT_DMA_EN;
770 atiixp_write(chip, CMD, data);
773 /* start/stop transfer over OUT DMA */
774 static void atiixp_out_enable_transfer(atiixp_t *chip, int on)
776 atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN,
777 on ? ATI_REG_CMD_SEND_EN : 0);
780 /* enable/disable analog IN DMA */
781 static void atiixp_in_enable_dma(atiixp_t *chip, int on)
783 atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN,
784 on ? ATI_REG_CMD_IN_DMA_EN : 0);
787 /* start/stop analog IN DMA */
788 static void atiixp_in_enable_transfer(atiixp_t *chip, int on)
791 unsigned int data = atiixp_read(chip, CMD);
792 if (! (data & ATI_REG_CMD_RECEIVE_EN)) {
793 data |= ATI_REG_CMD_RECEIVE_EN;
794 #if 0 /* FIXME: this causes the endless loop */
795 /* wait until slot 3/4 are finished */
796 while ((atiixp_read(chip, COUNTER) &
797 ATI_REG_COUNTER_SLOT) != 5)
800 atiixp_write(chip, CMD, data);
803 atiixp_update(chip, CMD, ATI_REG_CMD_RECEIVE_EN, 0);
806 /* flush FIFO of analog IN DMA */
807 static void atiixp_in_flush_dma(atiixp_t *chip)
809 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH);
812 /* enable/disable SPDIF OUT DMA */
813 static void atiixp_spdif_enable_dma(atiixp_t *chip, int on)
815 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN,
816 on ? ATI_REG_CMD_SPDF_DMA_EN : 0);
819 /* start/stop SPDIF OUT DMA */
820 static void atiixp_spdif_enable_transfer(atiixp_t *chip, int on)
823 data = atiixp_read(chip, CMD);
825 data |= ATI_REG_CMD_SPDF_OUT_EN;
827 data &= ~ATI_REG_CMD_SPDF_OUT_EN;
828 atiixp_write(chip, CMD, data);
831 /* flush FIFO of SPDIF OUT DMA */
832 static void atiixp_spdif_flush_dma(atiixp_t *chip)
836 /* DMA off, transfer on */
837 atiixp_spdif_enable_dma(chip, 0);
838 atiixp_spdif_enable_transfer(chip, 1);
842 if (! (atiixp_read(chip, SPDF_DMA_DT_SIZE) & ATI_REG_DMA_FIFO_USED))
845 } while (timeout-- > 0);
847 atiixp_spdif_enable_transfer(chip, 0);
850 /* set up slots and formats for SPDIF OUT */
851 static int snd_atiixp_spdif_prepare(snd_pcm_substream_t *substream)
853 atiixp_t *chip = snd_pcm_substream_chip(substream);
855 spin_lock(&chip->reg_lock);
856 if (chip->spdif_over_aclink) {
858 /* enable slots 10/11 */
859 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK,
860 ATI_REG_CMD_SPDF_CONFIG_01);
861 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
862 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
863 ATI_REG_OUT_DMA_SLOT_BIT(11);
864 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
865 atiixp_write(chip, OUT_DMA_SLOT, data);
866 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
867 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
868 ATI_REG_CMD_INTERLEAVE_OUT : 0);
870 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 0);
871 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_SPDF, 0);
873 spin_unlock(&chip->reg_lock);
877 /* set up slots and formats for analog OUT */
878 static int snd_atiixp_playback_prepare(snd_pcm_substream_t *substream)
880 atiixp_t *chip = snd_pcm_substream_chip(substream);
883 spin_lock(&chip->reg_lock);
884 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
885 switch (substream->runtime->channels) {
887 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
888 ATI_REG_OUT_DMA_SLOT_BIT(11);
891 data |= ATI_REG_OUT_DMA_SLOT_BIT(7) |
892 ATI_REG_OUT_DMA_SLOT_BIT(8);
895 data |= ATI_REG_OUT_DMA_SLOT_BIT(6) |
896 ATI_REG_OUT_DMA_SLOT_BIT(9);
899 data |= ATI_REG_OUT_DMA_SLOT_BIT(3) |
900 ATI_REG_OUT_DMA_SLOT_BIT(4);
904 /* set output threshold */
905 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
906 atiixp_write(chip, OUT_DMA_SLOT, data);
908 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
909 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
910 ATI_REG_CMD_INTERLEAVE_OUT : 0);
913 * enable 6 channel re-ordering bit if needed
915 atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN,
916 substream->runtime->channels >= 6 ? ATI_REG_6CH_REORDER_EN: 0);
918 spin_unlock(&chip->reg_lock);
922 /* set up slots and formats for analog IN */
923 static int snd_atiixp_capture_prepare(snd_pcm_substream_t *substream)
925 atiixp_t *chip = snd_pcm_substream_chip(substream);
927 spin_lock(&chip->reg_lock);
928 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_IN,
929 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
930 ATI_REG_CMD_INTERLEAVE_IN : 0);
931 spin_unlock(&chip->reg_lock);
936 * hw_params - allocate the buffer and set up buffer descriptors
938 static int snd_atiixp_pcm_hw_params(snd_pcm_substream_t *substream,
939 snd_pcm_hw_params_t *hw_params)
941 atiixp_t *chip = snd_pcm_substream_chip(substream);
942 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
945 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
948 dma->buf_addr = substream->runtime->dma_addr;
949 dma->buf_bytes = params_buffer_bytes(hw_params);
951 err = atiixp_build_dma_packets(chip, dma, substream,
952 params_periods(hw_params),
953 params_period_bytes(hw_params));
957 if (dma->ac97_pcm_type >= 0) {
958 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
959 /* PCM is bound to AC97 codec(s)
960 * set up the AC97 codecs
962 if (dma->pcm_open_flag) {
963 snd_ac97_pcm_close(pcm);
964 dma->pcm_open_flag = 0;
966 err = snd_ac97_pcm_open(pcm, params_rate(hw_params),
967 params_channels(hw_params),
970 dma->pcm_open_flag = 1;
976 static int snd_atiixp_pcm_hw_free(snd_pcm_substream_t * substream)
978 atiixp_t *chip = snd_pcm_substream_chip(substream);
979 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
981 if (dma->pcm_open_flag) {
982 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
983 snd_ac97_pcm_close(pcm);
984 dma->pcm_open_flag = 0;
986 atiixp_clear_dma_packets(chip, dma, substream);
987 snd_pcm_lib_free_pages(substream);
993 * pcm hardware definition, identical for all DMA types
995 static snd_pcm_hardware_t snd_atiixp_pcm_hw =
997 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
998 SNDRV_PCM_INFO_BLOCK_TRANSFER |
999 SNDRV_PCM_INFO_MMAP_VALID),
1000 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
1001 .rates = SNDRV_PCM_RATE_48000,
1006 .buffer_bytes_max = 256 * 1024,
1007 .period_bytes_min = 32,
1008 .period_bytes_max = 128 * 1024,
1010 .periods_max = ATI_MAX_DESCRIPTORS,
1013 static int snd_atiixp_pcm_open(snd_pcm_substream_t *substream, atiixp_dma_t *dma, int pcm_type)
1015 atiixp_t *chip = snd_pcm_substream_chip(substream);
1016 snd_pcm_runtime_t *runtime = substream->runtime;
1017 unsigned long flags;
1020 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
1024 dma->substream = substream;
1025 runtime->hw = snd_atiixp_pcm_hw;
1026 dma->ac97_pcm_type = pcm_type;
1027 if (pcm_type >= 0) {
1028 runtime->hw.rates = chip->pcms[pcm_type]->rates;
1029 snd_pcm_limit_hw_rates(runtime);
1032 runtime->hw.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE;
1034 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
1036 runtime->private_data = dma;
1038 /* enable DMA bits */
1039 spin_lock_irqsave(&chip->reg_lock, flags);
1040 dma->ops->enable_dma(chip, 1);
1041 spin_unlock_irqrestore(&chip->reg_lock, flags);
1047 static int snd_atiixp_pcm_close(snd_pcm_substream_t *substream, atiixp_dma_t *dma)
1049 atiixp_t *chip = snd_pcm_substream_chip(substream);
1050 /* disable DMA bits */
1051 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
1052 spin_lock_irq(&chip->reg_lock);
1053 dma->ops->enable_dma(chip, 0);
1054 spin_unlock_irq(&chip->reg_lock);
1055 dma->substream = NULL;
1062 static int snd_atiixp_playback_open(snd_pcm_substream_t *substream)
1064 atiixp_t *chip = snd_pcm_substream_chip(substream);
1067 down(&chip->open_mutex);
1068 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
1069 up(&chip->open_mutex);
1072 substream->runtime->hw.channels_max = chip->max_channels;
1073 if (chip->max_channels > 2)
1074 /* channels must be even */
1075 snd_pcm_hw_constraint_step(substream->runtime, 0,
1076 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1080 static int snd_atiixp_playback_close(snd_pcm_substream_t *substream)
1082 atiixp_t *chip = snd_pcm_substream_chip(substream);
1084 down(&chip->open_mutex);
1085 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1086 up(&chip->open_mutex);
1090 static int snd_atiixp_capture_open(snd_pcm_substream_t *substream)
1092 atiixp_t *chip = snd_pcm_substream_chip(substream);
1093 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
1096 static int snd_atiixp_capture_close(snd_pcm_substream_t *substream)
1098 atiixp_t *chip = snd_pcm_substream_chip(substream);
1099 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
1102 static int snd_atiixp_spdif_open(snd_pcm_substream_t *substream)
1104 atiixp_t *chip = snd_pcm_substream_chip(substream);
1106 down(&chip->open_mutex);
1107 if (chip->spdif_over_aclink) /* share DMA_PLAYBACK */
1108 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 2);
1110 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_SPDIF], -1);
1111 up(&chip->open_mutex);
1115 static int snd_atiixp_spdif_close(snd_pcm_substream_t *substream)
1117 atiixp_t *chip = snd_pcm_substream_chip(substream);
1119 down(&chip->open_mutex);
1120 if (chip->spdif_over_aclink)
1121 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1123 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_SPDIF]);
1124 up(&chip->open_mutex);
1129 static snd_pcm_ops_t snd_atiixp_playback_ops = {
1130 .open = snd_atiixp_playback_open,
1131 .close = snd_atiixp_playback_close,
1132 .ioctl = snd_pcm_lib_ioctl,
1133 .hw_params = snd_atiixp_pcm_hw_params,
1134 .hw_free = snd_atiixp_pcm_hw_free,
1135 .prepare = snd_atiixp_playback_prepare,
1136 .trigger = snd_atiixp_pcm_trigger,
1137 .pointer = snd_atiixp_pcm_pointer,
1141 static snd_pcm_ops_t snd_atiixp_capture_ops = {
1142 .open = snd_atiixp_capture_open,
1143 .close = snd_atiixp_capture_close,
1144 .ioctl = snd_pcm_lib_ioctl,
1145 .hw_params = snd_atiixp_pcm_hw_params,
1146 .hw_free = snd_atiixp_pcm_hw_free,
1147 .prepare = snd_atiixp_capture_prepare,
1148 .trigger = snd_atiixp_pcm_trigger,
1149 .pointer = snd_atiixp_pcm_pointer,
1152 /* SPDIF playback */
1153 static snd_pcm_ops_t snd_atiixp_spdif_ops = {
1154 .open = snd_atiixp_spdif_open,
1155 .close = snd_atiixp_spdif_close,
1156 .ioctl = snd_pcm_lib_ioctl,
1157 .hw_params = snd_atiixp_pcm_hw_params,
1158 .hw_free = snd_atiixp_pcm_hw_free,
1159 .prepare = snd_atiixp_spdif_prepare,
1160 .trigger = snd_atiixp_pcm_trigger,
1161 .pointer = snd_atiixp_pcm_pointer,
1164 static struct ac97_pcm atiixp_pcm_defs[] __devinitdata = {
1169 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1170 (1 << AC97_SLOT_PCM_RIGHT) |
1171 (1 << AC97_SLOT_PCM_CENTER) |
1172 (1 << AC97_SLOT_PCM_SLEFT) |
1173 (1 << AC97_SLOT_PCM_SRIGHT) |
1174 (1 << AC97_SLOT_LFE)
1183 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1184 (1 << AC97_SLOT_PCM_RIGHT)
1188 /* S/PDIF OUT (optional) */
1193 .slots = (1 << AC97_SLOT_SPDIF_LEFT2) |
1194 (1 << AC97_SLOT_SPDIF_RIGHT2)
1200 static atiixp_dma_ops_t snd_atiixp_playback_dma_ops = {
1201 .type = ATI_DMA_PLAYBACK,
1202 .llp_offset = ATI_REG_OUT_DMA_LINKPTR,
1203 .dt_cur = ATI_REG_OUT_DMA_DT_CUR,
1204 .enable_dma = atiixp_out_enable_dma,
1205 .enable_transfer = atiixp_out_enable_transfer,
1206 .flush_dma = atiixp_out_flush_dma,
1209 static atiixp_dma_ops_t snd_atiixp_capture_dma_ops = {
1210 .type = ATI_DMA_CAPTURE,
1211 .llp_offset = ATI_REG_IN_DMA_LINKPTR,
1212 .dt_cur = ATI_REG_IN_DMA_DT_CUR,
1213 .enable_dma = atiixp_in_enable_dma,
1214 .enable_transfer = atiixp_in_enable_transfer,
1215 .flush_dma = atiixp_in_flush_dma,
1218 static atiixp_dma_ops_t snd_atiixp_spdif_dma_ops = {
1219 .type = ATI_DMA_SPDIF,
1220 .llp_offset = ATI_REG_SPDF_DMA_LINKPTR,
1221 .dt_cur = ATI_REG_SPDF_DMA_DT_CUR,
1222 .enable_dma = atiixp_spdif_enable_dma,
1223 .enable_transfer = atiixp_spdif_enable_transfer,
1224 .flush_dma = atiixp_spdif_flush_dma,
1228 static int __devinit snd_atiixp_pcm_new(atiixp_t *chip)
1231 ac97_bus_t *pbus = chip->ac97_bus;
1232 int err, i, num_pcms;
1234 /* initialize constants */
1235 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
1236 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
1237 if (! chip->spdif_over_aclink)
1238 chip->dmas[ATI_DMA_SPDIF].ops = &snd_atiixp_spdif_dma_ops;
1240 /* assign AC97 pcm */
1241 if (chip->spdif_over_aclink)
1245 err = snd_ac97_pcm_assign(pbus, num_pcms, atiixp_pcm_defs);
1248 for (i = 0; i < num_pcms; i++)
1249 chip->pcms[i] = &pbus->pcms[i];
1251 chip->max_channels = 2;
1252 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_PCM_SLEFT)) {
1253 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_LFE))
1254 chip->max_channels = 6;
1256 chip->max_channels = 4;
1259 /* PCM #0: analog I/O */
1260 err = snd_pcm_new(chip->card, "ATI IXP AC97", ATI_PCMDEV_ANALOG, 1, 1, &pcm);
1263 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
1264 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
1265 pcm->private_data = chip;
1266 strcpy(pcm->name, "ATI IXP AC97");
1267 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
1269 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1270 snd_dma_pci_data(chip->pci), 64*1024, 128*1024);
1272 /* no SPDIF support on codec? */
1273 if (chip->pcms[ATI_PCM_SPDIF] && ! chip->pcms[ATI_PCM_SPDIF]->rates)
1276 /* FIXME: non-48k sample rate doesn't work on my test machine with AD1888 */
1277 if (chip->pcms[ATI_PCM_SPDIF])
1278 chip->pcms[ATI_PCM_SPDIF]->rates = SNDRV_PCM_RATE_48000;
1280 /* PCM #1: spdif playback */
1281 err = snd_pcm_new(chip->card, "ATI IXP IEC958", ATI_PCMDEV_DIGITAL, 1, 0, &pcm);
1284 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_spdif_ops);
1285 pcm->private_data = chip;
1286 if (chip->spdif_over_aclink)
1287 strcpy(pcm->name, "ATI IXP IEC958 (AC97)");
1289 strcpy(pcm->name, "ATI IXP IEC958 (Direct)");
1290 chip->pcmdevs[ATI_PCMDEV_DIGITAL] = pcm;
1292 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1293 snd_dma_pci_data(chip->pci), 64*1024, 128*1024);
1295 /* pre-select AC97 SPDIF slots 10/11 */
1296 for (i = 0; i < NUM_ATI_CODECS; i++) {
1298 snd_ac97_update_bits(chip->ac97[i], AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4);
1309 static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1311 atiixp_t *chip = snd_magic_cast(atiixp_t, dev_id, return IRQ_NONE);
1312 unsigned int status;
1314 status = atiixp_read(chip, ISR);
1319 /* process audio DMA */
1320 if (status & ATI_REG_ISR_OUT_XRUN)
1321 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1322 else if (status & ATI_REG_ISR_OUT_STATUS)
1323 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1324 if (status & ATI_REG_ISR_IN_XRUN)
1325 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1326 else if (status & ATI_REG_ISR_IN_STATUS)
1327 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1328 if (! chip->spdif_over_aclink) {
1329 if (status & ATI_REG_ISR_SPDF_XRUN)
1330 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1331 else if (status & ATI_REG_ISR_SPDF_STATUS)
1332 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1335 /* for codec detection */
1336 if (status & CODEC_CHECK_BITS) {
1337 unsigned int detected;
1338 detected = status & CODEC_CHECK_BITS;
1339 spin_lock(&chip->reg_lock);
1340 chip->codec_not_ready_bits |= detected;
1341 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
1342 spin_unlock(&chip->reg_lock);
1346 atiixp_write(chip, ISR, status);
1353 * ac97 mixer section
1356 static int __devinit snd_atiixp_mixer_new(atiixp_t *chip, int clock)
1358 ac97_bus_t bus, *pbus;
1362 static unsigned int codec_skip[NUM_ATI_CODECS] = {
1363 ATI_REG_ISR_CODEC0_NOT_READY,
1364 ATI_REG_ISR_CODEC1_NOT_READY,
1365 ATI_REG_ISR_CODEC2_NOT_READY,
1368 if (snd_atiixp_codec_detect(chip) < 0)
1371 memset(&bus, 0, sizeof(bus));
1372 bus.write = snd_atiixp_ac97_write;
1373 bus.read = snd_atiixp_ac97_read;
1374 bus.private_data = chip;
1376 if ((err = snd_ac97_bus(chip->card, &bus, &pbus)) < 0)
1378 chip->ac97_bus = pbus;
1381 for (i = 0; i < NUM_ATI_CODECS; i++) {
1382 if (chip->codec_not_ready_bits & codec_skip[i])
1384 memset(&ac97, 0, sizeof(ac97));
1385 ac97.private_data = chip;
1386 ac97.pci = chip->pci;
1388 ac97.scaps = AC97_SCAP_SKIP_MODEM;
1389 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
1390 if (chip->codec_not_ready_bits)
1391 /* codec(s) was detected but not available.
1396 /* codec(s) was NOT detected, so just ignore here */
1397 chip->ac97[i] = NULL; /* to be sure */
1398 snd_printd("atiixp: codec %d not found\n", i);
1405 if (! codec_count) {
1406 snd_printk(KERN_ERR "atiixp: no codec available\n");
1410 /* snd_ac97_tune_hardware(chip->ac97, ac97_quirks); */
1420 static int snd_atiixp_suspend(snd_card_t *card, unsigned int state)
1422 atiixp_t *chip = snd_magic_cast(atiixp_t, card->pm_private_data, return -EINVAL);
1425 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1426 if (chip->pcmdevs[i])
1427 snd_pcm_suspend_all(chip->pcmdevs[i]);
1428 for (i = 0; i < NUM_ATI_CODECS; i++)
1430 snd_ac97_suspend(chip->ac97[i]);
1431 snd_atiixp_aclink_down(chip);
1432 snd_atiixp_chip_stop(chip);
1434 pci_save_state(chip->pci, chip->pci_state);
1435 pci_set_power_state(chip->pci, 3);
1436 pci_disable_device(chip->pci);
1437 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1441 static int snd_atiixp_resume(snd_card_t *card, unsigned int state)
1443 atiixp_t *chip = snd_magic_cast(atiixp_t, card->pm_private_data, return -EINVAL);
1446 pci_enable_device(chip->pci);
1447 pci_restore_state(chip->pci, chip->pci_state);
1448 pci_set_power_state(chip->pci, 0);
1450 snd_atiixp_aclink_reset(chip);
1451 snd_atiixp_chip_start(chip);
1453 for (i = 0; i < NUM_ATI_CODECS; i++)
1455 snd_ac97_resume(chip->ac97[i]);
1457 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1460 #endif /* CONFIG_PM */
1464 * proc interface for register dump
1467 static void snd_atiixp_proc_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
1469 atiixp_t *chip = snd_magic_cast(atiixp_t, entry->private_data, return);
1472 for (i = 0; i < 256; i += 4)
1473 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
1476 static void __devinit snd_atiixp_proc_init(atiixp_t *chip)
1478 snd_info_entry_t *entry;
1480 if (! snd_card_proc_new(chip->card, "atiixp", &entry))
1481 snd_info_set_text_ops(entry, chip, 1024, snd_atiixp_proc_read);
1490 static int snd_atiixp_free(atiixp_t *chip)
1494 snd_atiixp_chip_stop(chip);
1495 synchronize_irq(chip->irq);
1497 if (chip->remap_addr)
1498 iounmap((void *) chip->remap_addr);
1500 release_resource(chip->res);
1501 kfree_nocheck(chip->res);
1504 free_irq(chip->irq, (void *)chip);
1505 snd_magic_kfree(chip);
1509 static int snd_atiixp_dev_free(snd_device_t *device)
1511 atiixp_t *chip = snd_magic_cast(atiixp_t, device->device_data, return -ENXIO);
1512 return snd_atiixp_free(chip);
1516 * constructor for chip instance
1518 static int __devinit snd_atiixp_create(snd_card_t *card,
1519 struct pci_dev *pci,
1522 static snd_device_ops_t ops = {
1523 .dev_free = snd_atiixp_dev_free,
1528 if ((err = pci_enable_device(pci)) < 0)
1531 chip = snd_magic_kcalloc(atiixp_t, 0, GFP_KERNEL);
1535 spin_lock_init(&chip->reg_lock);
1536 spin_lock_init(&chip->ac97_lock);
1537 init_MUTEX(&chip->open_mutex);
1541 chip->addr = pci_resource_start(pci, 0);
1542 if ((chip->res = request_mem_region(chip->addr, ATI_MEM_REGION, "ATI IXP AC97")) == NULL) {
1543 snd_printk(KERN_ERR "unable to grab I/O memory 0x%lx\n", chip->addr);
1544 snd_atiixp_free(chip);
1547 chip->remap_addr = (unsigned long) ioremap_nocache(chip->addr, ATI_MEM_REGION);
1548 if (chip->remap_addr == 0) {
1549 snd_printk(KERN_ERR "AC'97 space ioremap problem\n");
1550 snd_atiixp_free(chip);
1554 if (request_irq(pci->irq, snd_atiixp_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
1555 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1556 snd_atiixp_free(chip);
1559 chip->irq = pci->irq;
1560 pci_set_master(pci);
1561 synchronize_irq(chip->irq);
1563 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1564 snd_atiixp_free(chip);
1568 snd_card_set_dev(card, &pci->dev);
1575 static int __devinit snd_atiixp_probe(struct pci_dev *pci,
1576 const struct pci_device_id *pci_id)
1581 unsigned char revision;
1584 if (dev >= SNDRV_CARDS)
1591 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1595 pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
1597 strcpy(card->driver, spdif_aclink[dev] ? "ATIIXP" : "ATIIXP-SPDMA");
1598 strcpy(card->shortname, "ATI IXP");
1599 if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
1602 if ((err = snd_atiixp_aclink_reset(chip)) < 0)
1605 chip->spdif_over_aclink = spdif_aclink[dev];
1607 if ((err = snd_atiixp_mixer_new(chip, ac97_clock[dev])) < 0)
1610 if ((err = snd_atiixp_pcm_new(chip)) < 0)
1613 snd_atiixp_proc_init(chip);
1615 snd_atiixp_chip_start(chip);
1617 sprintf(card->longname, "%s rev %x at 0x%lx, irq %i",
1618 card->shortname, revision, chip->addr, chip->irq);
1620 snd_card_set_pm_callback(card, snd_atiixp_suspend, snd_atiixp_resume, chip);
1622 if ((err = snd_card_register(card)) < 0)
1625 pci_set_drvdata(pci, card);
1630 snd_card_free(card);
1634 static void __devexit snd_atiixp_remove(struct pci_dev *pci)
1636 snd_card_free(pci_get_drvdata(pci));
1637 pci_set_drvdata(pci, NULL);
1640 static struct pci_driver driver = {
1641 .name = "ATI IXP AC97 controller",
1642 .id_table = snd_atiixp_ids,
1643 .probe = snd_atiixp_probe,
1644 .remove = __devexit_p(snd_atiixp_remove),
1645 SND_PCI_PM_CALLBACKS
1649 static int __init alsa_card_atiixp_init(void)
1651 return pci_module_init(&driver);
1654 static void __exit alsa_card_atiixp_exit(void)
1656 pci_unregister_driver(&driver);
1659 module_init(alsa_card_atiixp_init)
1660 module_exit(alsa_card_atiixp_exit)