2 * ALSA driver for ATI IXP 150/200/250 AC97 controllers
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <sound/driver.h>
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
26 #include <linux/init.h>
27 #include <linux/pci.h>
28 #include <linux/slab.h>
29 #include <sound/core.h>
30 #include <sound/pcm.h>
31 #include <sound/pcm_params.h>
32 #include <sound/info.h>
33 #include <sound/ac97_codec.h>
35 #include <sound/initval.h>
37 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
38 MODULE_DESCRIPTION("ATI IXP AC97 controller");
39 MODULE_LICENSE("GPL");
40 MODULE_CLASSES("{sound}");
41 MODULE_DEVICES("{{ATI,IXP150/200/250}}");
43 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
44 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
45 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
46 static int ac97_clock[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 48000};
47 static int spdif_aclink[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1};
49 MODULE_PARM(index, "1-" __MODULE_STRING(SNDRV_CARDS) "i");
50 MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
51 MODULE_PARM_SYNTAX(index, SNDRV_INDEX_DESC);
52 MODULE_PARM(id, "1-" __MODULE_STRING(SNDRV_CARDS) "s");
53 MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
54 MODULE_PARM_SYNTAX(id, SNDRV_ID_DESC);
55 MODULE_PARM(enable, "1-" __MODULE_STRING(SNDRV_CARDS) "i");
56 MODULE_PARM_DESC(enable, "Enable audio part of ATI IXP controller.");
57 MODULE_PARM_SYNTAX(enable, SNDRV_ENABLE_DESC);
58 MODULE_PARM(ac97_clock, "1-" __MODULE_STRING(SNDRV_CARDS) "i");
59 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
60 MODULE_PARM_SYNTAX(ac97_clock, SNDRV_ENABLED ",default:48000");
61 MODULE_PARM(spdif_aclink, "1-" __MODULE_STRING(SNDRV_CARDS) "i");
62 MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link.");
63 MODULE_PARM_SYNTAX(spdif_aclink, SNDRV_ENABLED "," SNDRV_BOOLEAN_TRUE_DESC);
69 #define ATI_REG_ISR 0x00 /* interrupt source */
70 #define ATI_REG_ISR_IN_XRUN (1U<<0)
71 #define ATI_REG_ISR_IN_STATUS (1U<<1)
72 #define ATI_REG_ISR_OUT_XRUN (1U<<2)
73 #define ATI_REG_ISR_OUT_STATUS (1U<<3)
74 #define ATI_REG_ISR_SPDF_XRUN (1U<<4)
75 #define ATI_REG_ISR_SPDF_STATUS (1U<<5)
76 #define ATI_REG_ISR_PHYS_INTR (1U<<8)
77 #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
78 #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
79 #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
80 #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
81 #define ATI_REG_ISR_NEW_FRAME (1U<<13)
83 #define ATI_REG_IER 0x04 /* interrupt enable */
84 #define ATI_REG_IER_IN_XRUN_EN (1U<<0)
85 #define ATI_REG_IER_IO_STATUS_EN (1U<<1)
86 #define ATI_REG_IER_OUT_XRUN_EN (1U<<2)
87 #define ATI_REG_IER_OUT_XRUN_COND (1U<<3)
88 #define ATI_REG_IER_SPDF_XRUN_EN (1U<<4)
89 #define ATI_REG_IER_SPDF_STATUS_EN (1U<<5)
90 #define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
91 #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
92 #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
93 #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
94 #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
95 #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
96 #define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */
98 #define ATI_REG_CMD 0x08 /* command */
99 #define ATI_REG_CMD_POWERDOWN (1U<<0)
100 #define ATI_REG_CMD_RECEIVE_EN (1U<<1)
101 #define ATI_REG_CMD_SEND_EN (1U<<2)
102 #define ATI_REG_CMD_STATUS_MEM (1U<<3)
103 #define ATI_REG_CMD_SPDF_OUT_EN (1U<<4)
104 #define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5)
105 #define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6)
106 #define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6
107 #define ATI_REG_CMD_IN_DMA_EN (1U<<8)
108 #define ATI_REG_CMD_OUT_DMA_EN (1U<<9)
109 #define ATI_REG_CMD_SPDF_DMA_EN (1U<<10)
110 #define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11)
111 #define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12)
112 #define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12)
113 #define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12)
114 #define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12)
115 #define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12)
116 #define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16)
117 #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
118 #define ATI_REG_CMD_INTERLEAVE_IN (1U<<21)
119 #define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22)
120 #define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
121 #define ATI_REG_CMD_PACKED_DIS (1U<<24)
122 #define ATI_REG_CMD_BURST_EN (1U<<25)
123 #define ATI_REG_CMD_PANIC_EN (1U<<26)
124 #define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
125 #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
126 #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
127 #define ATI_REG_CMD_AC_SYNC (1U<<30)
128 #define ATI_REG_CMD_AC_RESET (1U<<31)
130 #define ATI_REG_PHYS_OUT_ADDR 0x0c
131 #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
132 #define ATI_REG_PHYS_OUT_RW (1U<<2)
133 #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
134 #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
135 #define ATI_REG_PHYS_OUT_DATA_SHIFT 16
137 #define ATI_REG_PHYS_IN_ADDR 0x10
138 #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
139 #define ATI_REG_PHYS_IN_ADDR_SHIFT 9
140 #define ATI_REG_PHYS_IN_DATA_SHIFT 16
142 #define ATI_REG_SLOTREQ 0x14
144 #define ATI_REG_COUNTER 0x18
145 #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
146 #define ATI_REG_COUNTER_BITCLOCK (31U<<8)
148 #define ATI_REG_IN_FIFO_THRESHOLD 0x1c
150 #define ATI_REG_IN_DMA_LINKPTR 0x20
151 #define ATI_REG_IN_DMA_DT_START 0x24 /* RO */
152 #define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */
153 #define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */
154 #define ATI_REG_IN_DMA_DT_SIZE 0x30
156 #define ATI_REG_OUT_DMA_SLOT 0x34
157 #define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3))
158 #define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff
159 #define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800
160 #define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11
162 #define ATI_REG_OUT_DMA_LINKPTR 0x38
163 #define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */
164 #define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */
165 #define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */
166 #define ATI_REG_OUT_DMA_DT_SIZE 0x48
168 #define ATI_REG_SPDF_CMD 0x4c
169 #define ATI_REG_SPDF_CMD_LFSR (1U<<4)
170 #define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5)
171 #define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */
173 #define ATI_REG_SPDF_DMA_LINKPTR 0x50
174 #define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */
175 #define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */
176 #define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */
177 #define ATI_REG_SPDF_DMA_DT_SIZE 0x60
179 #define ATI_REG_MODEM_MIRROR 0x7c
180 #define ATI_REG_AUDIO_MIRROR 0x80
182 #define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */
183 #define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */
185 #define ATI_REG_FIFO_FLUSH 0x88
186 #define ATI_REG_FIFO_OUT_FLUSH (1U<<0)
187 #define ATI_REG_FIFO_IN_FLUSH (1U<<1)
190 #define ATI_REG_LINKPTR_EN (1U<<0)
192 /* [INT|OUT|SPDIF]_DMA_DT_SIZE */
193 #define ATI_REG_DMA_DT_SIZE (0xffffU<<0)
194 #define ATI_REG_DMA_FIFO_USED (0x1fU<<16)
195 #define ATI_REG_DMA_FIFO_FREE (0x1fU<<21)
196 #define ATI_REG_DMA_STATE (7U<<26)
199 #define ATI_MEM_REGION 256 /* i/o memory size */
200 #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
206 typedef struct snd_atiixp atiixp_t;
207 typedef struct snd_atiixp_dma atiixp_dma_t;
208 typedef struct snd_atiixp_dma_ops atiixp_dma_ops_t;
209 #define chip_t atiixp_t
213 * DMA packate descriptor
216 typedef struct atiixp_dma_desc {
217 u32 addr; /* DMA buffer address */
218 u16 status; /* status bits */
219 u16 size; /* size of the packet in dwords */
220 u32 next; /* address of the next packet descriptor */
226 enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, ATI_DMA_SPDIF };
229 * constants and callbacks for each DMA type
231 struct snd_atiixp_dma_ops {
232 int type; /* ATI_DMA_XXX */
233 unsigned int llp_offset; /* LINKPTR offset */
234 void (*enable_dma)(atiixp_t *chip, int on); /* called from open callback */
235 void (*enable_transfer)(atiixp_t *chip, int on); /* called from trigger (START/STOP) */
236 void (*flush_dma)(atiixp_t *chip); /* called from trigger (STOP only) */
242 struct snd_atiixp_dma {
243 const atiixp_dma_ops_t *ops;
244 struct snd_dma_device desc_dev;
245 struct snd_dma_buffer desc_buf;
246 snd_pcm_substream_t *substream; /* assigned PCM substream */
247 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
248 unsigned int period_bytes, periods;
250 struct ac97_pcm *pcm;
261 struct resource *res; /* memory i/o */
263 unsigned long remap_addr;
266 ac97_bus_t *ac97_bus;
267 ac97_t *ac97[3]; /* IXP can have up to 3 codecs */
270 spinlock_t ac97_lock;
272 atiixp_dma_t dmas[3]; /* playback, capture, spdif */
274 int max_channels; /* max. channels for PCM out */
276 unsigned int codec_not_ready_bits; /* for codec detection */
278 int spdif_over_aclink; /* passed from the module option */
284 static struct pci_device_id snd_atiixp_ids[] = {
285 { 0x1002, 0x4341, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
288 MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
296 * update the bits of the given register.
297 * return 1 if the bits changed.
299 static int snd_atiixp_update_bits(atiixp_t *chip, unsigned int reg,
300 unsigned int mask, unsigned int value)
302 unsigned long addr = chip->remap_addr + reg;
303 unsigned int data, old_data;
304 old_data = data = readl(addr);
307 if (old_data == data)
314 * macros for easy use
316 #define atiixp_write(chip,reg,value) \
317 writel(value, chip->remap_addr + ATI_REG_##reg)
318 #define atiixp_read(chip,reg) \
319 readl(chip->remap_addr + ATI_REG_##reg)
320 #define atiixp_update(chip,reg,mask,val) \
321 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
323 /* delay for one tick */
324 #define do_delay() do { \
325 set_current_state(TASK_UNINTERRUPTIBLE); \
326 schedule_timeout(1); \
331 * handling DMA packets
333 * we allocate a linear buffer for the DMA, and split it to each packet.
334 * in a future version, a scatter-gather buffer should be implemented.
337 #define ATI_DESC_LIST_SIZE \
338 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(atiixp_dma_desc_t))
341 * build packets ring for the given buffer size.
343 * IXP handles the buffer descriptors, which are connected as a linked
344 * list. although we can change the list dynamically, in this version,
345 * a static RING of buffer descriptors is used.
347 * the ring is built in this function, and is set up to the hardware.
349 static int atiixp_build_dma_packets(atiixp_t *chip, atiixp_dma_t *dma,
350 snd_pcm_substream_t *substream,
351 unsigned int periods,
352 unsigned int period_bytes)
358 if (periods > ATI_MAX_DESCRIPTORS)
361 if (dma->desc_buf.area == NULL) {
362 memset(&dma->desc_dev, 0, sizeof(dma->desc_dev));
363 dma->desc_dev.type = SNDRV_DMA_TYPE_DEV;
364 dma->desc_dev.dev = snd_dma_pci_data(chip->pci);
365 if (snd_dma_alloc_pages(&dma->desc_dev, ATI_DESC_LIST_SIZE, &dma->desc_buf) < 0)
367 dma->period_bytes = dma->periods = 0; /* clear */
370 if (dma->periods == dma->periods && dma->period_bytes == period_bytes)
373 /* reset DMA before changing the descriptor table */
374 spin_lock_irqsave(&chip->reg_lock, flags);
375 writel(0, chip->remap_addr + dma->ops->llp_offset);
376 dma->ops->enable_dma(chip, 0);
377 dma->ops->enable_dma(chip, 1);
378 spin_unlock_irqrestore(&chip->reg_lock, flags);
380 /* fill the entries */
381 addr = (u32)substream->runtime->dma_addr;
382 desc_addr = (u32)dma->desc_buf.addr;
383 for (i = 0; i < periods; i++) {
384 atiixp_dma_desc_t *desc = &((atiixp_dma_desc_t *)dma->desc_buf.area)[i];
385 desc->addr = cpu_to_le32(addr);
387 desc->size = period_bytes >> 2; /* in dwords */
388 desc_addr += sizeof(atiixp_dma_desc_t);
389 if (i == periods - 1)
390 desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
392 desc->next = cpu_to_le32(desc_addr);
393 addr += period_bytes;
396 writel(cpu_to_le32((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN),
397 chip->remap_addr + dma->ops->llp_offset);
399 dma->period_bytes = period_bytes;
400 dma->periods = periods;
406 * remove the ring buffer and release it if assigned
408 static void atiixp_clear_dma_packets(atiixp_t *chip, atiixp_dma_t *dma, snd_pcm_substream_t *substream)
410 if (dma->desc_buf.area) {
411 writel(0, chip->remap_addr + dma->ops->llp_offset);
412 snd_dma_free_pages(&dma->desc_dev, &dma->desc_buf);
413 dma->desc_buf.area = NULL;
420 static int snd_atiixp_acquire_codec(atiixp_t *chip)
424 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
426 snd_printk(KERN_WARNING "atiixp: codec acquire timeout\n");
434 static unsigned short snd_atiixp_codec_read(atiixp_t *chip, unsigned short codec, unsigned short reg)
439 if (snd_atiixp_acquire_codec(chip) < 0)
441 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
442 ATI_REG_PHYS_OUT_ADDR_EN |
443 ATI_REG_PHYS_OUT_RW |
445 atiixp_write(chip, PHYS_OUT_ADDR, data);
446 if (snd_atiixp_acquire_codec(chip) < 0)
450 data = atiixp_read(chip, PHYS_IN_ADDR);
451 if (data & ATI_REG_PHYS_IN_READ_FLAG)
452 return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
455 snd_printk(KERN_WARNING "atiixp: codec read timeout\n");
460 static void snd_atiixp_codec_write(atiixp_t *chip, unsigned short codec, unsigned short reg, unsigned short val)
464 if (snd_atiixp_acquire_codec(chip) < 0)
466 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
467 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
468 ATI_REG_PHYS_OUT_ADDR_EN | codec;
469 atiixp_write(chip, PHYS_OUT_ADDR, data);
473 static unsigned short snd_atiixp_ac97_read(ac97_t *ac97, unsigned short reg)
475 atiixp_t *chip = snd_magic_cast(atiixp_t, ac97->private_data, return 0xffff);
477 spin_lock(&chip->ac97_lock);
478 data = snd_atiixp_codec_read(chip, ac97->num, reg);
479 spin_unlock(&chip->ac97_lock);
484 static void snd_atiixp_ac97_write(ac97_t *ac97, unsigned short reg, unsigned short val)
486 atiixp_t *chip = snd_magic_cast(atiixp_t, ac97->private_data, return);
487 spin_lock(&chip->ac97_lock);
488 snd_atiixp_codec_write(chip, ac97->num, reg, val);
489 spin_unlock(&chip->ac97_lock);
495 static int snd_atiixp_aclink_reset(atiixp_t *chip)
499 /* reset powerdoewn */
500 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
503 /* perform a software reset */
504 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
505 atiixp_read(chip, CMD);
507 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
510 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
511 /* do a hard reset */
512 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
513 ATI_REG_CMD_AC_SYNC);
514 atiixp_read(chip, CMD);
516 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
518 snd_printk(KERN_ERR "atiixp: codec reset timeout\n");
523 /* deassert RESET and assert SYNC to make sure */
524 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
525 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
531 static int snd_atiixp_aclink_down(atiixp_t *chip)
535 if (atiixp_read(chip, MODEM_MIRROR) & ATI_REG_MODEM_MIRROR_RUNNING)
537 atiixp_update(chip, CMD,
538 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
539 ATI_REG_CMD_POWERDOWN);
545 * auto-detection of codecs
547 * the IXP chip can generate interrupts for the non-existing codecs.
548 * NEW_FRAME interrupt is used to make sure that the interrupt is generated
549 * even if all three codecs are connected.
552 #define ALL_CODEC_NOT_READY \
553 (ATI_REG_ISR_CODEC0_NOT_READY |\
554 ATI_REG_ISR_CODEC1_NOT_READY |\
555 ATI_REG_ISR_CODEC2_NOT_READY)
556 #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
558 static int snd_atiixp_codec_detect(atiixp_t *chip)
562 chip->codec_not_ready_bits = 0;
563 atiixp_write(chip, IER, CODEC_CHECK_BITS);
564 /* wait for the interrupts */
566 while (timeout-- > 0) {
568 if (chip->codec_not_ready_bits)
571 atiixp_write(chip, IER, 0); /* disable irqs */
573 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
574 snd_printk(KERN_ERR "atiixp: no codec detected!\n");
582 * enable DMA and irqs
584 static int snd_atiixp_chip_start(atiixp_t *chip)
588 /* enable burst mode */
589 reg = atiixp_read(chip, CMD);
590 reg |= 0x02 << ATI_REG_CMD_SPDF_THRESHOLD_SHIFT;
591 reg |= ATI_REG_CMD_BURST_EN;
592 atiixp_write(chip, CMD, reg);
594 /* clear all interrupt source */
595 atiixp_write(chip, ISR, 0xffffffff);
597 atiixp_write(chip, IER,
598 ATI_REG_IER_IO_STATUS_EN |
599 ATI_REG_IER_IN_XRUN_EN |
600 ATI_REG_IER_OUT_XRUN_EN |
601 ATI_REG_IER_SPDF_XRUN_EN |
602 ATI_REG_IER_SPDF_STATUS_EN);
608 * disable DMA and IRQs
610 static int snd_atiixp_chip_stop(atiixp_t *chip)
612 /* clear interrupt source */
613 atiixp_write(chip, ISR, atiixp_read(chip, ISR));
615 atiixp_write(chip, IER, 0);
625 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
626 * position. when SG-buffer is implemented, the offset must be calculated
629 static snd_pcm_uframes_t snd_atiixp_pcm_pointer(snd_pcm_substream_t *substream)
631 atiixp_t *chip = snd_pcm_substream_chip(substream);
632 snd_pcm_runtime_t *runtime = substream->runtime;
633 atiixp_dma_t *dma = (atiixp_dma_t *)runtime->private_data;
637 spin_lock_irqsave(&chip->reg_lock, flags);
638 curptr = readl(chip->remap_addr + dma->ops->llp_offset + 12); /* XXX_DMA_DT_CUR */
639 if (curptr < dma->buf_addr) {
640 snd_printdd("curptr = %x, base = %x\n", curptr, dma->buf_addr);
643 curptr -= dma->buf_addr;
644 if (curptr >= dma->buf_bytes) {
645 snd_printdd("curptr = %x, size = %x\n", curptr, dma->buf_bytes);
649 spin_unlock_irqrestore(&chip->reg_lock, flags);
650 return bytes_to_frames(runtime, curptr);
654 * XRUN detected, and stop the PCM substream
656 static void snd_atiixp_xrun_dma(atiixp_t *chip, atiixp_dma_t *dma)
658 if (! dma->substream || ! dma->running)
660 snd_printd(KERN_DEBUG "atiixp: XRUN detected (DMA %d)\n", dma->ops->type);
661 snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN);
665 * the period ack. update the substream.
667 static void snd_atiixp_update_dma(atiixp_t *chip, atiixp_dma_t *dma)
669 if (! dma->substream || ! dma->running)
671 snd_pcm_period_elapsed(dma->substream);
674 /* set BUS_BUSY interrupt bit if any DMA is running */
675 /* call with spinlock held */
676 static void snd_atiixp_check_bus_busy(atiixp_t *chip)
678 unsigned int bus_busy;
679 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_SEND_EN |
680 ATI_REG_CMD_RECEIVE_EN |
681 ATI_REG_CMD_SPDF_OUT_EN))
682 bus_busy = ATI_REG_IER_SET_BUS_BUSY;
685 atiixp_update(chip, IER, ATI_REG_IER_SET_BUS_BUSY, bus_busy);
688 /* common trigger callback
689 * calling the lowlevel callbacks in it
691 static int snd_atiixp_pcm_trigger(snd_pcm_substream_t *substream, int cmd)
693 atiixp_t *chip = snd_pcm_substream_chip(substream);
694 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
697 snd_assert(dma->ops->enable_transfer && dma->ops->flush_dma, return -EINVAL);
699 spin_lock(&chip->reg_lock);
701 case SNDRV_PCM_TRIGGER_START:
702 dma->ops->enable_transfer(chip, 1);
705 case SNDRV_PCM_TRIGGER_STOP:
706 dma->ops->enable_transfer(chip, 0);
714 snd_atiixp_check_bus_busy(chip);
715 if (cmd == SNDRV_PCM_TRIGGER_STOP) {
716 dma->ops->flush_dma(chip);
717 snd_atiixp_check_bus_busy(chip);
720 spin_unlock(&chip->reg_lock);
726 * lowlevel callbacks for each DMA type
728 * every callback is supposed to be called in chip->reg_lock spinlock
731 /* flush FIFO of analog OUT DMA */
732 static void atiixp_out_flush_dma(atiixp_t *chip)
734 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH);
737 /* enable/disable analog OUT DMA */
738 static void atiixp_out_enable_dma(atiixp_t *chip, int on)
741 data = atiixp_read(chip, CMD);
743 if (data & ATI_REG_CMD_OUT_DMA_EN)
745 atiixp_out_flush_dma(chip);
746 data |= ATI_REG_CMD_OUT_DMA_EN;
748 data &= ~ATI_REG_CMD_OUT_DMA_EN;
749 atiixp_write(chip, CMD, data);
752 /* start/stop transfer over OUT DMA */
753 static void atiixp_out_enable_transfer(atiixp_t *chip, int on)
755 atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN,
756 on ? ATI_REG_CMD_SEND_EN : 0);
759 /* enable/disable analog IN DMA */
760 static void atiixp_in_enable_dma(atiixp_t *chip, int on)
762 atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN,
763 on ? ATI_REG_CMD_IN_DMA_EN : 0);
766 /* start/stop analog IN DMA */
767 static void atiixp_in_enable_transfer(atiixp_t *chip, int on)
770 unsigned int data = atiixp_read(chip, CMD);
771 if (! (data & ATI_REG_CMD_RECEIVE_EN)) {
772 data |= ATI_REG_CMD_RECEIVE_EN;
773 #if 0 /* FIXME: this causes the endless loop */
774 /* wait until slot 3/4 are finished */
775 while ((atiixp_read(chip, COUNTER) &
776 ATI_REG_COUNTER_SLOT) != 5)
779 atiixp_write(chip, CMD, data);
782 atiixp_update(chip, CMD, ATI_REG_CMD_RECEIVE_EN, 0);
785 /* flush FIFO of analog IN DMA */
786 static void atiixp_in_flush_dma(atiixp_t *chip)
788 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH);
791 /* enable/disable SPDIF OUT DMA */
792 static void atiixp_spdif_enable_dma(atiixp_t *chip, int on)
794 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN,
795 on ? ATI_REG_CMD_SPDF_DMA_EN : 0);
798 /* start/stop SPDIF OUT DMA */
799 static void atiixp_spdif_enable_transfer(atiixp_t *chip, int on)
802 data = atiixp_read(chip, CMD);
804 data |= ATI_REG_CMD_SPDF_OUT_EN;
805 if (chip->spdif_over_aclink)
806 data |= ATI_REG_CMD_SEND_EN;
808 data &= ~ATI_REG_CMD_SPDF_OUT_EN;
809 if (chip->spdif_over_aclink)
810 data &= ~ATI_REG_CMD_SEND_EN;
812 atiixp_write(chip, CMD, data);
815 /* flush FIFO of SPDIF OUT DMA */
816 static void atiixp_spdif_flush_dma(atiixp_t *chip)
820 /* DMA off, transfer on */
821 atiixp_spdif_enable_dma(chip, 0);
822 atiixp_spdif_enable_transfer(chip, 1);
826 if (! (atiixp_read(chip, SPDF_DMA_DT_SIZE) & ATI_REG_DMA_FIFO_USED))
829 } while (timeout-- > 0);
831 atiixp_spdif_enable_transfer(chip, 0);
834 /* set up slots and formats for SPDIF OUT */
835 static int snd_atiixp_spdif_prepare(snd_pcm_substream_t *substream)
837 atiixp_t *chip = snd_pcm_substream_chip(substream);
840 spin_lock(&chip->reg_lock);
841 if (chip->spdif_over_aclink) {
842 /* enable slots 10/11 */
843 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK,
844 ATI_REG_CMD_SPDF_CONFIG_01);
845 data = atiixp_read(chip, OUT_DMA_SLOT);
846 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
847 ATI_REG_OUT_DMA_SLOT_BIT(11);
848 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
849 atiixp_write(chip, OUT_DMA_SLOT, data);
851 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 0);
854 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_SPDF,
855 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
856 ATI_REG_CMD_INTERLEAVE_SPDF : 0);
857 spin_unlock(&chip->reg_lock);
861 /* set up slots and formats for analog OUT */
862 static int snd_atiixp_playback_prepare(snd_pcm_substream_t *substream)
864 atiixp_t *chip = snd_pcm_substream_chip(substream);
867 spin_lock(&chip->reg_lock);
868 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
869 switch (substream->runtime->channels) {
871 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
872 ATI_REG_OUT_DMA_SLOT_BIT(11);
875 data |= ATI_REG_OUT_DMA_SLOT_BIT(7) |
876 ATI_REG_OUT_DMA_SLOT_BIT(8);
879 data |= ATI_REG_OUT_DMA_SLOT_BIT(6) |
880 ATI_REG_OUT_DMA_SLOT_BIT(9);
883 data |= ATI_REG_OUT_DMA_SLOT_BIT(3) |
884 ATI_REG_OUT_DMA_SLOT_BIT(4);
888 /* set output threshold */
889 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
890 atiixp_write(chip, OUT_DMA_SLOT, data);
892 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
893 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
894 ATI_REG_CMD_INTERLEAVE_OUT : 0);
897 * enable 6 channel re-ordering bit if needed
899 atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN,
900 substream->runtime->channels >= 6 ? ATI_REG_6CH_REORDER_EN: 0);
902 spin_unlock(&chip->reg_lock);
906 /* set up slots and formats for analog IN */
907 static int snd_atiixp_capture_prepare(snd_pcm_substream_t *substream)
909 atiixp_t *chip = snd_pcm_substream_chip(substream);
911 spin_lock(&chip->reg_lock);
912 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_IN,
913 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
914 ATI_REG_CMD_INTERLEAVE_IN : 0);
915 spin_unlock(&chip->reg_lock);
920 * hw_params - allocate the buffer and set up buffer descriptors
922 static int snd_atiixp_pcm_hw_params(snd_pcm_substream_t *substream,
923 snd_pcm_hw_params_t *hw_params)
925 atiixp_t *chip = snd_pcm_substream_chip(substream);
926 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
929 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
932 dma->buf_addr = substream->runtime->dma_addr;
933 dma->buf_bytes = params_buffer_bytes(hw_params);
935 err = atiixp_build_dma_packets(chip, dma, substream,
936 params_periods(hw_params),
937 params_period_bytes(hw_params));
942 /* PCM is bound to AC97 codec(s)
943 * set up the AC97 codecs
945 if (dma->pcm_open_flag) {
946 snd_ac97_pcm_close(dma->pcm);
947 dma->pcm_open_flag = 0;
949 err = snd_ac97_pcm_open(dma->pcm, params_rate(hw_params),
950 params_channels(hw_params),
951 dma->pcm->r[0].slots);
953 dma->pcm_open_flag = 1;
959 static int snd_atiixp_pcm_hw_free(snd_pcm_substream_t * substream)
961 atiixp_t *chip = snd_pcm_substream_chip(substream);
962 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
964 if (dma->pcm_open_flag) {
965 snd_ac97_pcm_close(dma->pcm);
966 dma->pcm_open_flag = 0;
968 atiixp_clear_dma_packets(chip, dma, substream);
969 snd_pcm_lib_free_pages(substream);
975 * pcm hardware definition, identical for all DMA types
977 static snd_pcm_hardware_t snd_atiixp_pcm_hw =
979 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
980 SNDRV_PCM_INFO_BLOCK_TRANSFER |
981 SNDRV_PCM_INFO_MMAP_VALID),
982 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
983 .rates = SNDRV_PCM_RATE_48000,
988 .buffer_bytes_max = 256 * 1024,
989 .period_bytes_min = 32,
990 .period_bytes_max = 128 * 1024,
992 .periods_max = ATI_MAX_DESCRIPTORS,
995 static int snd_atiixp_pcm_open(snd_pcm_substream_t *substream, atiixp_dma_t *dma)
997 atiixp_t *chip = snd_pcm_substream_chip(substream);
998 snd_pcm_runtime_t *runtime = substream->runtime;
1002 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
1004 dma->substream = substream;
1005 runtime->hw = snd_atiixp_pcm_hw;
1007 runtime->hw.rates = dma->pcm->rates;
1008 snd_pcm_limit_hw_rates(runtime);
1011 runtime->hw.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_32000;
1012 runtime->hw.rate_min = 32000;
1014 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
1016 runtime->private_data = dma;
1018 /* enable DMA bits */
1019 spin_lock_irqsave(&chip->reg_lock, flags);
1020 dma->ops->enable_dma(chip, 1);
1021 spin_unlock_irqrestore(&chip->reg_lock, flags);
1026 static int snd_atiixp_pcm_close(snd_pcm_substream_t *substream, atiixp_dma_t *dma)
1028 atiixp_t *chip = snd_pcm_substream_chip(substream);
1029 /* disable DMA bits */
1030 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
1031 spin_lock_irq(&chip->reg_lock);
1032 dma->ops->enable_dma(chip, 0);
1033 spin_unlock_irq(&chip->reg_lock);
1034 dma->substream = NULL;
1040 static int snd_atiixp_playback_open(snd_pcm_substream_t *substream)
1042 atiixp_t *chip = snd_pcm_substream_chip(substream);
1045 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1046 substream->runtime->hw.channels_max = chip->max_channels;
1047 if (chip->max_channels > 2)
1048 /* channels must be even */
1049 snd_pcm_hw_constraint_step(substream->runtime, 0,
1050 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1055 static int snd_atiixp_playback_close(snd_pcm_substream_t *substream)
1057 atiixp_t *chip = snd_pcm_substream_chip(substream);
1058 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1061 static int snd_atiixp_capture_open(snd_pcm_substream_t *substream)
1063 atiixp_t *chip = snd_pcm_substream_chip(substream);
1064 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE]);
1067 static int snd_atiixp_capture_close(snd_pcm_substream_t *substream)
1069 atiixp_t *chip = snd_pcm_substream_chip(substream);
1070 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
1073 static int snd_atiixp_spdif_open(snd_pcm_substream_t *substream)
1075 atiixp_t *chip = snd_pcm_substream_chip(substream);
1076 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_SPDIF]);
1079 static int snd_atiixp_spdif_close(snd_pcm_substream_t *substream)
1081 atiixp_t *chip = snd_pcm_substream_chip(substream);
1082 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_SPDIF]);
1086 static snd_pcm_ops_t snd_atiixp_playback_ops = {
1087 .open = snd_atiixp_playback_open,
1088 .close = snd_atiixp_playback_close,
1089 .ioctl = snd_pcm_lib_ioctl,
1090 .hw_params = snd_atiixp_pcm_hw_params,
1091 .hw_free = snd_atiixp_pcm_hw_free,
1092 .prepare = snd_atiixp_playback_prepare,
1093 .trigger = snd_atiixp_pcm_trigger,
1094 .pointer = snd_atiixp_pcm_pointer,
1098 static snd_pcm_ops_t snd_atiixp_capture_ops = {
1099 .open = snd_atiixp_capture_open,
1100 .close = snd_atiixp_capture_close,
1101 .ioctl = snd_pcm_lib_ioctl,
1102 .hw_params = snd_atiixp_pcm_hw_params,
1103 .hw_free = snd_atiixp_pcm_hw_free,
1104 .prepare = snd_atiixp_capture_prepare,
1105 .trigger = snd_atiixp_pcm_trigger,
1106 .pointer = snd_atiixp_pcm_pointer,
1109 /* SPDIF playback */
1110 static snd_pcm_ops_t snd_atiixp_spdif_ops = {
1111 .open = snd_atiixp_spdif_open,
1112 .close = snd_atiixp_spdif_close,
1113 .ioctl = snd_pcm_lib_ioctl,
1114 .hw_params = snd_atiixp_pcm_hw_params,
1115 .hw_free = snd_atiixp_pcm_hw_free,
1116 .prepare = snd_atiixp_spdif_prepare,
1117 .trigger = snd_atiixp_pcm_trigger,
1118 .pointer = snd_atiixp_pcm_pointer,
1121 static struct ac97_pcm atiixp_pcm_defs[] __devinitdata = {
1126 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1127 (1 << AC97_SLOT_PCM_RIGHT) |
1128 (1 << AC97_SLOT_PCM_CENTER) |
1129 (1 << AC97_SLOT_PCM_SLEFT) |
1130 (1 << AC97_SLOT_PCM_SRIGHT) |
1131 (1 << AC97_SLOT_LFE)
1140 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1141 (1 << AC97_SLOT_PCM_RIGHT)
1145 /* S/PDIF OUT (optional) */
1150 .slots = (1 << AC97_SLOT_SPDIF_LEFT2) |
1151 (1 << AC97_SLOT_SPDIF_RIGHT2)
1157 static atiixp_dma_ops_t snd_atiixp_playback_dma_ops = {
1158 .type = ATI_DMA_PLAYBACK,
1159 .llp_offset = ATI_REG_OUT_DMA_LINKPTR,
1160 .enable_dma = atiixp_out_enable_dma,
1161 .enable_transfer = atiixp_out_enable_transfer,
1162 .flush_dma = atiixp_out_flush_dma,
1165 static atiixp_dma_ops_t snd_atiixp_capture_dma_ops = {
1166 .type = ATI_DMA_CAPTURE,
1167 .llp_offset = ATI_REG_IN_DMA_LINKPTR,
1168 .enable_dma = atiixp_in_enable_dma,
1169 .enable_transfer = atiixp_in_enable_transfer,
1170 .flush_dma = atiixp_in_flush_dma,
1173 static atiixp_dma_ops_t snd_atiixp_spdif_dma_ops = {
1174 .type = ATI_DMA_SPDIF,
1175 .llp_offset = ATI_REG_SPDF_DMA_LINKPTR,
1176 .enable_dma = atiixp_spdif_enable_dma,
1177 .enable_transfer = atiixp_spdif_enable_transfer,
1178 .flush_dma = atiixp_spdif_flush_dma,
1182 static int __devinit snd_atiixp_pcm_new(atiixp_t *chip)
1185 ac97_bus_t *pbus = chip->ac97_bus;
1186 int err, i, num_pcms;
1188 /* initialize constants */
1189 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
1190 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
1191 chip->dmas[ATI_DMA_SPDIF].ops = &snd_atiixp_spdif_dma_ops;
1193 /* assign AC97 pcm */
1194 if (chip->spdif_over_aclink)
1198 err = snd_ac97_pcm_assign(pbus, num_pcms, atiixp_pcm_defs);
1202 chip->max_channels = 2;
1203 if (pbus->pcms[0].r[0].slots & (1 << AC97_SLOT_PCM_SLEFT)) {
1204 if (pbus->pcms[0].r[0].slots & (1 << AC97_SLOT_LFE))
1205 chip->max_channels = 6;
1207 chip->max_channels = 4;
1210 chip->dmas[ATI_DMA_PLAYBACK].pcm = &pbus->pcms[0];
1211 chip->dmas[ATI_DMA_CAPTURE].pcm = &pbus->pcms[1];
1212 if (chip->spdif_over_aclink)
1213 chip->dmas[ATI_DMA_SPDIF].pcm = &pbus->pcms[2];
1215 /* PCM #0: analog I/O */
1216 err = snd_pcm_new(chip->card, "ATI IXP AC97", 0, 1, 1, &pcm);
1219 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
1220 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
1221 pcm->private_data = chip;
1222 strcpy(pcm->name, "ATI IXP AC97");
1224 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1225 snd_dma_pci_data(chip->pci), 64*1024, 128*1024);
1227 /* no SPDIF support on codec? */
1228 if (chip->dmas[ATI_DMA_SPDIF].pcm && ! chip->dmas[ATI_DMA_SPDIF].pcm->rates)
1231 /* PCM #1: spdif playback */
1232 err = snd_pcm_new(chip->card, "ATI IXP IEC958", 1, 1, 0, &pcm);
1235 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_spdif_ops);
1236 pcm->private_data = chip;
1237 strcpy(pcm->name, "ATI IXP IEC958");
1239 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1240 snd_dma_pci_data(chip->pci), 64*1024, 128*1024);
1242 /* pre-select AC97 SPDIF slots 10/11 */
1243 for (i = 0; i < 3; i++) {
1245 snd_ac97_update_bits(chip->ac97[i], AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4);
1256 static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1258 atiixp_t *chip = snd_magic_cast(atiixp_t, dev_id, return IRQ_NONE);
1259 unsigned int status;
1261 status = atiixp_read(chip, ISR);
1266 /* process audio DMA */
1267 if (status & ATI_REG_ISR_OUT_XRUN)
1268 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1269 else if (status & ATI_REG_ISR_OUT_STATUS)
1270 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1271 if (status & ATI_REG_ISR_IN_XRUN)
1272 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1273 else if (status & ATI_REG_ISR_IN_STATUS)
1274 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1275 if (status & ATI_REG_ISR_SPDF_XRUN)
1276 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1277 else if (status & ATI_REG_ISR_SPDF_STATUS)
1278 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1280 /* for codec detection */
1281 if (status & CODEC_CHECK_BITS) {
1282 unsigned int detected;
1283 detected = status & CODEC_CHECK_BITS;
1284 spin_lock(&chip->reg_lock);
1285 chip->codec_not_ready_bits |= detected;
1286 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
1287 spin_unlock(&chip->reg_lock);
1291 atiixp_write(chip, ISR, status);
1298 * ac97 mixer section
1301 static int __devinit snd_atiixp_mixer_new(atiixp_t *chip, int clock)
1303 ac97_bus_t bus, *pbus;
1306 static unsigned int codec_skip[3] = {
1307 ATI_REG_ISR_CODEC0_NOT_READY,
1308 ATI_REG_ISR_CODEC1_NOT_READY,
1309 ATI_REG_ISR_CODEC2_NOT_READY,
1312 if (snd_atiixp_codec_detect(chip) < 0)
1315 memset(&bus, 0, sizeof(bus));
1316 bus.write = snd_atiixp_ac97_write;
1317 bus.read = snd_atiixp_ac97_read;
1318 bus.private_data = chip;
1320 if ((err = snd_ac97_bus(chip->card, &bus, &pbus)) < 0)
1322 chip->ac97_bus = pbus;
1324 for (i = 0; i < 3; i++) {
1325 if (chip->codec_not_ready_bits & codec_skip[i])
1327 memset(&ac97, 0, sizeof(ac97));
1328 ac97.private_data = chip;
1329 ac97.pci = chip->pci;
1331 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0)
1335 /* snd_ac97_tune_hardware(chip->ac97, ac97_quirks); */
1342 * proc interface for register dump
1345 static void snd_atiixp_proc_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
1347 atiixp_t *chip = snd_magic_cast(atiixp_t, entry->private_data, return);
1350 for (i = 0; i < 256; i += 4)
1351 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
1354 static void __devinit snd_atiixp_proc_init(atiixp_t *chip)
1356 snd_info_entry_t *entry;
1358 if (! snd_card_proc_new(chip->card, "atiixp", &entry))
1359 snd_info_set_text_ops(entry, chip, 1024, snd_atiixp_proc_read);
1368 static int snd_atiixp_free(atiixp_t *chip)
1372 snd_atiixp_chip_stop(chip);
1373 synchronize_irq(chip->irq);
1375 if (chip->remap_addr)
1376 iounmap((void *) chip->remap_addr);
1378 release_resource(chip->res);
1379 kfree_nocheck(chip->res);
1382 free_irq(chip->irq, (void *)chip);
1383 snd_magic_kfree(chip);
1387 static int snd_atiixp_dev_free(snd_device_t *device)
1389 atiixp_t *chip = snd_magic_cast(atiixp_t, device->device_data, return -ENXIO);
1390 return snd_atiixp_free(chip);
1394 * constructor for chip instance
1396 static int __devinit snd_atiixp_create(snd_card_t *card,
1397 struct pci_dev *pci,
1400 static snd_device_ops_t ops = {
1401 .dev_free = snd_atiixp_dev_free,
1406 if ((err = pci_enable_device(pci)) < 0)
1409 chip = snd_magic_kcalloc(atiixp_t, 0, GFP_KERNEL);
1413 spin_lock_init(&chip->reg_lock);
1414 spin_lock_init(&chip->ac97_lock);
1418 chip->addr = pci_resource_start(pci, 0);
1419 if ((chip->res = request_mem_region(chip->addr, ATI_MEM_REGION, "ATI IXP AC97")) == NULL) {
1420 snd_printk("unable to grab I/O memory 0x%lx\n", chip->addr);
1421 snd_atiixp_free(chip);
1424 chip->remap_addr = (unsigned long) ioremap_nocache(chip->addr, ATI_MEM_REGION);
1425 if (chip->remap_addr == 0) {
1426 snd_printk("AC'97 space ioremap problem\n");
1427 snd_atiixp_free(chip);
1431 if (request_irq(pci->irq, snd_atiixp_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
1432 snd_printk("unable to grab IRQ %d\n", pci->irq);
1433 snd_atiixp_free(chip);
1436 chip->irq = pci->irq;
1437 pci_set_master(pci);
1438 synchronize_irq(chip->irq);
1440 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1441 snd_atiixp_free(chip);
1445 snd_card_set_dev(card, &pci->dev);
1452 static int __devinit snd_atiixp_probe(struct pci_dev *pci,
1453 const struct pci_device_id *pci_id)
1458 unsigned char revision;
1461 if (dev >= SNDRV_CARDS)
1468 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1472 pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
1474 strcpy(card->driver, "ATIIXP");
1475 strcpy(card->shortname, "ATI IXP");
1476 if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
1479 if ((err = snd_atiixp_aclink_reset(chip)) < 0)
1482 chip->spdif_over_aclink = spdif_aclink[dev];
1484 if ((err = snd_atiixp_mixer_new(chip, ac97_clock[dev])) < 0)
1487 if ((err = snd_atiixp_pcm_new(chip)) < 0)
1490 snd_atiixp_proc_init(chip);
1492 snd_atiixp_chip_start(chip);
1494 sprintf(card->longname, "%s rev %x at 0x%lx, irq %i",
1495 card->shortname, revision, chip->addr, chip->irq);
1497 if ((err = snd_card_register(card)) < 0)
1500 pci_set_drvdata(pci, chip);
1505 snd_card_free(card);
1509 static void __devexit snd_atiixp_remove(struct pci_dev *pci)
1511 atiixp_t *chip = snd_magic_cast(atiixp_t, pci_get_drvdata(pci), return);
1513 snd_card_free(chip->card);
1514 pci_set_drvdata(pci, NULL);
1517 static struct pci_driver driver = {
1518 .name = "ATI IXP AC97 controller",
1519 .id_table = snd_atiixp_ids,
1520 .probe = snd_atiixp_probe,
1521 .remove = __devexit_p(snd_atiixp_remove),
1525 static int __init alsa_card_atiixp_init(void)
1529 if ((err = pci_module_init(&driver)) < 0) {
1531 printk(KERN_ERR "ATI IXP AC97 controller not found or device busy\n");
1539 static void __exit alsa_card_atiixp_exit(void)
1541 pci_unregister_driver(&driver);
1544 module_init(alsa_card_atiixp_init)
1545 module_exit(alsa_card_atiixp_exit)
1549 /* format is: snd-atiixp=enable,index,id,ac97_clock,spdif_aclink */
1551 static int __init alsa_card_atiixp_setup(char *str)
1553 static unsigned __initdata nr_dev = 0;
1555 if (nr_dev >= SNDRV_CARDS)
1557 (void)(get_option(&str,&enable[nr_dev]) == 2 &&
1558 get_option(&str,&index[nr_dev]) == 2 &&
1559 get_id(&str,&id[nr_dev]) == 2 &&
1560 get_option(&str,&ac97_clock[nr_dev]) == 2 &&
1561 get_option(&str,&spdif_aclink[nr_dev]) == 2
1567 __setup("snd-atiixp=", alsa_card_atiixp_setup);
1569 #endif /* ifndef MODULE */